SERVICE MANUAL. HF/50MHz ALL MODE TRANSCEIVER. i756pro

Transcription

1 SRVI MANUAL HF/0MHz ALL MOD TRANSIVR ipro

2 INTRODUTION This service manual describes the latest service information for the I-PRO HF/0MHz ALL MOD TRANSIVR. DANGR NVR connect the transceiver to an A outlet or to a D power supply that uses more than V. This will ruin the transceiver. DO NOT expose the transceiver to rain, snow or any liquids. MODL I-PRO VRSION U.S.A. urope France SYMOL USA UR FRA DO NOT reverse the polarities of the power supply when conecting the transceiver. DO NOT apply an RF signal of more than 0 dm (00 mw) to the antenna connector. This could damage the transceier s front end. To upgrade quality, any electrical or mechanical parts and internal circuits are subject to change without notice or obligation. ING PARTS e sure to include the following four points when ordering replacement parts:. 0-digit order numbers. omponent part number and name. quipment model name and unit name. Quantity required <SL > S.I NJMM I-PRO MAIN UNIT pieces 0000 Screw ih M ZK I-PRO Top cover 0 pieces Addresses are provided on the inside back cover for your convenience. RPAIR NOTS. Make sure a problem is internal before disassembling the transceiver.. DO NOT open the transceiver until the transceiver is disconnected from its power source.. DO NOT force any of the variable components. Turn them slowly and smoothly.. DO NOT short any circuits or electronic parts. An insulated tuning tool MUST be used for all adjustments.. DO NOT keep power ON for a long time when the transceiver is defective.. DO NOT transmit power into a signal generator or a sweep generator.. ALWAYS connect a 0 d to 0 d attenuator between the transceiver and a deviation meter or spectrum analyzer when using such test equipment.. RAD the instructions of test equipment thoroughly before connecting equipment to the transceiver.

3 TAL OF ONTNTS STION SPIFIATIONS STION INSID VIWS STION IRUIT - RIVR IRUITS TRANSMITTR IRUITS PLL IRUITS ANTNNA TUNR IRUITS SOP IRUIT POWR SUPPLY IRUITS LOGI IRUITS STION ADJUSTMNT PRODURS - PRPARATION FOR SRVIING PLL ADJUSTMNTS RIVR ADJUSTMNTS TRANSMITTR ADJUSTMNTS TUNR ADJUSTMNT STION PARTS LIST STION MHANIAL PARTS STION SMI-ONDUTOR INFORMATION STION OARD LAYOUTS - PT, RIT AND MI OARDS DISPLAY OARD MOD, PHON, KY AND TN-KY OARDS RF UNIT PLL UNIT MAIN UNIT DSP OARD MMORY OARD PA UNIT FILTR UNIT TUNR OARD TRL UNIT STION LOK DIAGRAM STION 0 VOLTAG DIAGRAM 0 - FRONT UNIT DSP OARD TUNR, MMORY OARDS AND TRL UNIT MAIN UNIT () MAIN UNIT () PLL UNIT PA AND FILTR UNITS RF UNIT

4 STION SPIFIATIONS GNRAL Frequency coverage: Receive MHz*, * Transmit.00. MHz*.00. MHz* MHz* 00 0 MHz* MHz*.0. MHz* MHz*.0.0 MHz* MHz* MHz* * Some frequency bands are not guaranteed. * Depending on version. Mode : US, LS, W, RTTY, AM, FM Number of memory channels : 0 ( regular, scan edges) Antenna connector : SO- and phono [(RA); 0 Ω] Usable temp. range: 0 to +0 ( F to F) Frequency stability : Less than ±0. ppm from min. after power ON. Freq. resolution : Hz Power supply :. V D ± % (negative ground) requirement urrent consumption: Transmit max. power A Receive stand-by.0 A (typical) max. audio. A (typical) Dimensions : 0 (W) (H) (D) mm (W) (H) (D) in Weight :. kg ( lb oz) A connector : -pin DIN connector A connector : -pin DIN connector I-V connector : -conductor.(d) mm ( ") Display : -inch (diagonal) TFT color LD TRANSMITTR Output power : SS/W/RTTY/FM 00 W AM 0 W Modulation system : SS PSN modulation AM Low power modulation FM Phase modulation Spurious emission : Less than 0 d (HF bands) Less than 0 d (0 MHz band) arrier suppression: More than 0 d Unwanted sideband suppression: More than d TX variable range : ±. khz Mic. connector : -pin connector (00 Ω) L-KY connector: -conductor.(d) mm ( ") KY connector : -conductor.(d) mm ( ") SND connector : Phono (RA) AL connector : Phono (RA) RIVR Receive system : Triple-conversion superheterodyne Intermediate frequencies: st IF frequency. MHz nd IF frequency khz rd IF frequency khz Sensitivity : SS, W, RTTY (at. khz bandwidth).. MHz* µv (0 d S/N) MHz* µv (0 d S/N) AM (at.0 khz bandwidth) 0.. MHz µv (0 d S/N).. MHz*.0 µv (0 d S/N) MHz*.0 µv (0 d S/N) FM (at khz bandwidth).0. MHz* 0. µv ( d SINAD) MHz* 0. µv ( d SINAD) * Pre-amp ON * Pre-amp ON Squelch sensitivity : (Pre-amp OFF) SS/W/RTTY Less than. µv FM Less than.0 µv Selectivity : SS/RTTY (at. khz bandwidth) More than. khz/ d Less than. khz/ 0 d W (at 00 Hz bandwidth) More than 00 Hz/ d Less than 00 Hz/ 0 d AM (at khz bandwidth) More than.0 khz/ d Less than.0 khz/ 0 d FM (at khz bandwidth) More than khz/ d Less than 0 khz/ 0 d Spurious and image: More than 0 d rejection ratio (except IF through in 0 MHz band) RIT variable range : ±. khz Audio output power : More than.0 W at 0 % distortion (at. V D) with an Ω load PHONS connector: -conductor. (d) mm ( ") XT SP connector : -conductor. (d) mm ( ") Ω ANTNNA TUNR Matching impedance range: HF bands. to 0 Ω unbalanced* 0 MHz band 0 to Ω unbalanced* * Less than VSWR :; * Less than VSWR.: Minimum operating input power: HF bands : W 0 MHz band : W Tuning accuracy : VSWR.: or less Insertion loss : Less than.0 d (after tuning) All stated specifications are subject to change without notice or obligation. -

5 STION INSID VIWS OTTOM VIW VO- circuit VO-A circuit PLL unit MMORY board DSP board YGR amplifier (I: µpg) Pre amplifier (I: µpg) FM IF I (I: TAFN) eramic filter (FI: FJK) RF unit st IF filter (FI: SFP-T0) nd IF filter (FI: FK0) rd mixer (I: NJMV) MAIN unit -

6 TOP VIW Fan control circuit FAN TUNR unit Antenna tuner PU (I: M0M-FP) PA unit Drive amplifier FILTR unit ommon filter (L0, L0: LR-) TRL unit urrent transformer (L: LR-) -MOS I (I: TA0F) -

7 STION IRUIT - RIVR IRUITS -- RF SWITHING IRUIT (TRL AND RF UNITS) The RF switching circuit leads receive signals to bandpass filters from an antenna connector while receiving. However, the circuit leads the signal from the RF power amplifier to the antenna connector while transmitting. Used RF filter ontrol and signal 0.0. MHz. MHz MHz MHz 0 Input diode N/A D D D and MHz MHz 0 MHz 0 0 MHz ontrol signal 0W Input diode D D D D RF signals from [ANT ] or [ANT ] pass through the antenna selector (RL), transmit/receive switching relays (RL, RL, RL), and low-pass filter (L, L,, 0), and are then applied to the RF unit via J. MHz MHz MHz D D D 0 MHz 0 MHz 0 0W D D The signals from the TRL unit either bypass or pass through the d (RF unit, RL, R) and/or d (RF unit, RL, R) attenuators via the antenna selector (RL0). y selecting the attenuators, 0 (bypass),, and d attenuations are obtained. The signals are then applied to the RF filters. When the [RX ANT] is selected, the RF signals are passed through the low-pass filter (RF unit, L, L, ), then applied to the antenna selector (RF unit, RL0). -- RF ANDPASS FILTR IRUIT (RF UNIT) RF bandpass filters pass only the desired band signals and suppress any undesired band signals. The RF circuit has bandpass filters and low-pass filter. () 0.0. MHz The signals pass through the low-pass filter (L L, ), attenuator (R R), and are then applied to the RF amplifiers (Q0, Q0). (). 0 MHz The signals pass through the high-pass filter (L L, ) to suppress excessively strong signals below. MHz. The filtered signals are applied to one of bandpass filters as below, and then applied to or bypassed the pre-amplifier circuit. -- PR-LIFIR IRUITS (RF UNIT) The I-PRO has gain levels of pre-amplifier circuits. One has 0 d gain over a wide band frequency range and the other one has d gain for the MHz bands. When the [PR] switch is set to [PR] or [PR], the signals are applied to the pre-amplifier (Q, Q) or pre-amplifier (I) circuit, respectively. Pre-amplified or bypassed signals are applied to the RF amplifier circuits (Q0, Q0). -- RF LIFIR AND ST MIXR IRUITS (RF UNIT) The st mixer circuit mixes the receive signals with the st LO signal to convert the receive signal frequencies into a. MHz st IF signal. The I-PRO has two st mixer circuits for the dualwatch function. The signals from the pre-amplifier circuit, or signals which bypass the pre-amplifiers, are divided at L. ach signal is applied to a 0 MHz cut-off low-pass filter, RF amplifier (Q0, Q0) and then to a st mixer (Q Q or Q Q). ach st LO signal (.0.0 MHz) enters the RF unit from the PLL unit via J or J. The LO signals are amplified at the LO amplifier (Q or Q), filtered by a low-pass filter, and then applied to each st mixer. Receiver construction LPF or PF MHz st mixer Q Q st LO FI rystal filter. MHz st mixer A Q Q st LO A nd mixer Q Q nd LO.0 MHz RF UNIT FI, FI eramic filter khz MAIN UNIT rd mixer I khz DSP board rd LO khz to squelch gate (I0) -

8 -- ST IF IRUIT (RF UNIT) The st IF circuit filters and amplifies the st IF signal. The st IF signal combined at L is applied to an MF (Monolithic rystal Filter; FIa/b) to suppress out-of-band signals. The converted st IF signal level is adjusted at PIN attenuators (D D, D or D D, D) controlled by the [AL] controller for the dualwatch function. The signal is applied to the st IF amplifier (Q or Q) and then combined at L. The combined signal passes through the MFs (FIa/b) and PIN attenuator (D, D). The signal is amplified at the st IF amplifier (Q). The amplified signal is then applied to the nd mixer circuit. -- ND MIXR IRUIT (RF UNIT) The nd mixer circuit mixes the amplified st IF signal and nd LO signal (.00 MHz) for conversion into the nd IF signal. The st IF signal from the st IF amplifier (Q) is converted into a khz nd IF signal at the nd mixer circuit (Q Q). The nd IF signal is applied to the ceramic filter (MAIN unit, FI) to suppress un-desired signals, and then applied to the noise blanker gate. Some D voltage from the noise detector circuit is fed back to the noise amplifiers (Q Q) via the D amplifiers (Q, Q). The D amplifiers function as an AG circuit to reduce average noise. Therefore, the noise blanker function shuts off pulse-type noise only. -- ND IF IRUIT (MAIN UNIT) The nd IF circuit filters and applies the nd IF signal to the rd mixer circuit. The nd IF signal from the noise blanker gate (D, D) is passed through the another ceramic filter (FI). The filtered signal is applied to the rd mixer circuit. -- RD MIXR AND RD IF IRUITS (MAIN UNIT) The rd mixer circuit mixes the nd IF signal and the rd LO signal to obtain the rd IF ( khz) signal. The nd IF signal from the ceramic filter (FI) is applied to the rd mixer circuit (I, pin ). The rd LO signal from the PLL unit is applied to the rd mixer (I, pin 0). The mixed signal is output from pin. The rd IF signal is amplified at the rd IF amplifier (I0b), and is passed through the low-pass filter (I0a) The filtered signal is then applied to the DSP board via DRIF line. -- NOIS LANKR IRUIT (MAIN UNIT) The noise blanker circuit detects pulse-type noise, and turns OFF the signal line when the noise appears. The nd IF signal from the ceramic filter (FI) is applied to the noise blanker gate (D, D). A portion of the signal from FI is amplified at the noise amplifiers (Q Q), and is then detected at the noise detector (D) to convert the noise components to D voltages. The signal is then applied to the noise blanker switch (Q, Q). At the moment the detected voltage exceeds Q s threshold level, Q outputs a blanking signal to close the noise blanker gate (D, D). The PLL unlock signal are also applied to Q, to control the noise blanker gate. --0 DSP RIVR IRUIT (DSP OARD) The DSP (Digital Signal Processor) board enables digital IF filter, digital noise reduction, digital PSN (Phase Shift Network)/Low Power/Phase demodulation, digital automatic notch, and etc. The khz rd IF signal from the low-pass filter (MAIN unit, I0a) is amplified at the differential amplifiers (I0a/b) after being passed through the T/R switch (I), and is then applied to the A/D converter (I). The coverted signal is level shifted V to. V at the level converter (I0). DSP receiver circuit rd IF signal DRIF khz I TXS signal I0/A Differential converter I A/D converter I0 Level converter I00 DSP I I0 Level converter I D/A converter T/R switch MAIN unit DSP board IX IZ MAIN unit I0 IA IY I I Mixer DRAF LPF HPF AF amplifier signals TXS signal 0 TXS signal -

9 The level shifted signal is applied to the DSP I (I00) for khz digital IF filter, demodulation, automatic notch and noise reduction, etc. The output signal is level shifted. V to V at the level converter (I0), and is applied to the D/A converter (I) to convert into the analog audio signals. The converted audio signals are passed through the active filter (Ia), AF amplifier (Ib), analog switches (I, pins, and pins, ) then applied to the lowpass filter (I0). The filtered signals are passed through the analog switches (I, pins, and I), highpass filter (IA) and mixer amplifier (IA), and then applied to the MAIN unit via J00 (pin ) as the DTAF signal. -- TWIN PT IRUIT (DSP OARD) General PT (Passband Tuning) circuit shifts the center frequency of IF signal to electronically narrow the passband width. The I-PRO uses the DSP circuit for the digital PT function and actually shifts the both lower and higher passbands of rd IF filter within ±. khz. The twin PT circuit in DSP I (I00) controlled by the [TWIN PT] controller adjusts the rd IF passband width and rejects interference. -- AG IRUIT (DSP OARD) The AG (Automatic Gain ontrol) circuit reduces IF amplifier gain and attenuates IF signal to keep the audio output at a constant level. The receiver gain is determined by the voltage on the AG line (I, pin ). The D/A converter for AG (I) supplies control voltage to the AG line and sets the receiver gain with the [RF/SQL] control. The rd IF signal from the level converter (I0) is detected at the AG detector section in DSP I (I00), and is applied to the D/A converter for AG via the level converter (I0). The AG voltage is amplified at the buffer amplifier (Ib) and is applied to the MAIN unit to control the AG line. When receiving strong signals, the detected voltage increases and the AG voltage decreases via the buffer amplifier (Ib). As the AG voltage is used for the bias voltage of the IF amplifier (RF unit; Q), IF amplifier gain is decreased. And also AG voltage is amplified at the AG amplifier (RF unit; Ic) and applied to the ATT driver (Q, D) to drive the PIN attenuator (D, D). -- S-MTR IRUIT (MAIN UNIT) The S-meter circuit indicates the relative received signal strength while receiving by utilizing the AG voltage which changes depending on the received signal strength. A portion of the AG bias voltage from the DSP board is applied to the differential amplifier (I0a, pin ) where the difference between the AG and reference voltage is detected. The detected voltage is passed through the analog switch (I, pins, ) as the SML signal and applied to the main PU (I0, pin 0) to activate the S/RF meter via the sub PU (I0) on the DISPLAY board. -- SQULH IRUIT (MAIN UNIT) The squelch circuit mutes audio output when the S-meter signal is lower than the [RF/SQL] setting level. The S-meter signal is applied to the main PU (I0, pin 0) and is compared with the threshold level set by the [RF/SQL] control. The [RF/SQL] setting signal is applied to the main PU via the sub PU (DISPLAY board; I0, pin ). The main PU analyzes the compared signal and outputs control signal to the squelch gate (I0, pin ) via the interface I (I, pin ) to open or close the squelch as the SQLS signal. -- AF LIFIR IRUIT (MAIN UNIT) The AF amplifier amplifies the audio signals to a suitable driving level for the speaker. The AF signals (DRAF) from the DSP board are passed through the squelch gate (I0) and amplified at the AF amplifier section of I (pins, ) and volume is controlled by the AFGV signal at the VA section (pins ). The volume controlled AF signals are passed through the AF mute gate (I, pins, ), then applied to the AF power amplifier (I, pin ) via the ripple filter (Q). The amplified audio signals are passed through the [PHONS] and [XT SP] jacks then applied to the internal speaker when no plug is connected to the jacks. The AF mute gate is controlled by the [AF] control via the sub and main PUs. AF amplifier circuit DRAF SQLS signal I0 I VA Squelch gate AFGV signal I Mute switch AFMS signal Q Ripple filter AF power amp. I [PHONS] [XT SP] DSP board MAIN unit Int. speaker -

10 - TRANSMITTR IRUITS -- MIROPHON LIFIR IRUIT (MAIN UNIT) The microphone amplifier circuit amplifies microphone audio signals to a level needed for the DSP. Audio signals from the [MI] connector (MI board; J, pin ) are amplified at the audio amplifier section in I (pins ) via the analog switch (I00, pins, ), then applied to the buffer amplifier section (I, pin ) and VA section. The gain controlled signals are output from (I, pin ) and passed through the analog switch (I00, pins, ) and then applied to the DSP circuit as the DTAF signal. The VA section in I (pins ) controls microphone input gain according to the [MI GAIN] control level using the MIGV signal coming from the main PU via the I/O expander (I, pin ). -- VOX IRUIT (MAIN UNIT) The VOX (Voice-Operated Transmission) circuit sets transmitting conditions according to voice input. A portion of the amplified audio signals from the AF amplifier section in I are again amplified at the VOX amplifier section I (pin ), also gain contolloed signals at the VA section (pin ) are amplified at the AF amplifier (I00b, pins, ), and then applied to the main PU (I0, pin 0) after passing through the analog switch (I, pins, ) as the VOXL signal. The VOGV signal is applied to the VA section in I00 (pin ) from the main PU via the I/O expander (I, pin ) to adjust VOX actionable sensitivity. This is controlled by the VOX gain set in the VOX ST mode. The filtered signals are then applied to the differential amplifiers (I0a/b) via the analog switch (I0) and T/R switch (I). () When FM/AM modes The audio signals from the analog switch (I0, pin ) are applied to the deviation adjustment pots (R: FM mode, R: AM mode) via the limitter amplifier, pre-emphasis circuit (only FM mode) and splatter filter consist of I. The level adjusted signals are applied to the differential amplifiers (I0a/b) after being passed through the analog switch (I0) and T/R switch (I). When AM mode the pre-emphasis circuit is cancelled by Q0, Q0, Q. The amplified signals at the differential amplifiers (I0a/b) are applied to the A/D converter (I). The coverted signals are level shifted V to. V at the level converter (I0). The level shifted signal is applied to the DSP I (I00) and modulated at the DSP I to produce the khz transmit IF signal. The modulated IF signal from the DSP I is level shifted. V to V at the level converter (I0), and is applied to the D/A converter (I) to convert into the analog IF signal. The converted IF signal is passed through the active filter (Ia), buffer amplifier (Ib), analog switch (I, pins, ) then applied to the low-pass filter (Ic/d). The filtered signal is applied to the MAIN unit via J00 (pin ) as the DTIF signal. A portion of the filtered signal from the low-pass filter (Ic/d) is amplified at the IF amplifier (Ib) and applied to the transmit monitor circuit for the monitor function. -- DSP TRANSMITTR IRUIT (DSP OARD) The microphone audio signals from the MAIN unit via the DTAF line are passed through the analog switch (I0, pins and or ) and applied to the each modulation circuits. () When SS mode The audio signals from the analog switch (I0, pin ) are amplified at the limitter amplifier (Ib) and applied to the low-pass filter (Id/c) to limit the transmit passband width. -- SPH OMPRSSOR IRUIT (DSP OARD) The speech compressor compresses the transmitter audio input signals to increase the average output level (average talk power). When the [OMP] switch is ON, the level shifted signal from the level converter (I0) is applied to the DSP I (I00) and compressed at the DSP I to obtain an average audio level. At the same time, the compressed signals are modulated at the DSP I and applied to the level converter (I0). Transmitter construction I00X MI VA I MOSL signal DTAF DSP board khz IF I DTIF khz rd LO ( khz) FM/AM modes other modes FI eramic filter FI eramic filter MAIN UNIT D. khz nd LO (.00 MHz) FI rystal filter andwidth khz D st LO LPF RF UNIT PFs -

11 -- IF LIFIR AND MIXR IRUITS (MAIN AND RF UNITS) The modulated rd IF signal from the DSP board (DTIF: khz) is applied to the rd mixer circuit (MAIN unit; I). The applied rd IF signal is mixed with the rd LO signal from the DDS circuit (PLL unit; I0) to produce a khz nd IF signal. The nd IF signal is output from pin and amplified at the IF amplifier (MAIN unit; Q). The amplified signal is passed through the ceramic bandpass filter (MAIN unit; FI: FM/AM modes, FI: other modes) for unwanted signals are suppressed. The filtered nd IF signal is ampllified at IF amplifier (MAIN unit; Q) and applied to the nd mixer circuit on the RF unit via J0. The nd IF signal is mixed with the MHz nd LO signal, coming from the PLL unit, at the nd mixer circuit (RF unit; D) to obtain a. MHz st IF signal. The st IF signal is passed through the MF (RF unit; FI) to cut-off the undesired signals then amplified at the IF amplifier (RF unit; Q) via the T/R switch (RF unit; D). The amplified st IF signal is applied to the st IF mixer circuit (RF unit; D). The operating (transmitting) frequency is produced at the st IF mixer circuit (RF unit; D) by mixing the st IF and st LO signals. The mixed signal is then applied to the RF circuit. -- RF IRUIT (RF AND PA UNITS) The RF circuit amplifies operating (transmitting) frequency to obtain 00 W of RF output. The signal from the st IF mixer is passed through the lowpass filter (RF unit; L, L, ) and amplified at the RF amplifier (RF unit; I). The amplified signal is again amplified at the wide-band YGR amplifier (RF unit, I) after passing through one of bandpass (Refer to page - for bandpass filters used) and high-pass filters, and is then applied to the PA unit via J. The signal applied from the RF unit is amplified at the predrive (Q), drive (Q, Q) and power amplifiers (Q, Q) in sequence to obtain a stable 00 W of RF output power. The amplified signal is applied to one of low-pass filters in the FILTR unit. -- LOW-PASS FILTR IRUIT (FILTR UNIT) The low-pass filter circuit contains hebyschev low-pass filters to suppress the higher harmonic components. The signal from the power amplifiers in the PA unit is applied to one of the low-pass filters, which is selected by the I/O expander (I) in the TRL unit via the buffer-amplifier (TRL unit; I). The filtered signal is then applied to one of antenna connectors via the TRL only/and TUNR unit/s. -- AL IRUIT (MAIN UNIT) The AL (Automatic Level ontrol) circuit controls the gain of IF amplifiers in order for the transceiver to output a constant RF power set by the [RF POWR] control even when the supplied voltage shifts, etc. The RF power level is detected at one of the AP detector circuits (TRL unit; D) to be converted into D voltage and applied to the MAIN unit as the FORV signal. The FORV signal from the TRL unit is applied to the comparator (Ib, pin ). The POV signal, controlled by the [RF POWR] control via the I/O expander (I, pin ), is also applied to the other input (pin ) for reference. The compared signal is output from pin and applied to the IF amplifiers in the MAIN (Q) and RF (Q) units to control amplifying gain. When the FORV signal exceeds the POV voltage, AL bias voltage from the comparator controls the IF amplifiers. This adjusts the output power to a specified level from the [RF POWR] control until the FORV and POV voltages are equalized. In AM mode, the comparator operates as an averaging AL amplifier. Q0 turns ON and the POV voltage is shifted for 0 W AM output power (maximum) through R0. DSP Transmitter circuit AF signal I0Z DTAF Mode switch SS mode FM/AM mode MODS signal I I/D Limitter IA Limitter LPF I LPF I I0X T/R switch Mode switch TXS signal I0A/ Differential converter MAIN unit I A/D converter DSP board I0 Level converter I00 DSP I I0 Level converter I D/A converter TXS signal IX ID/ LPF DTIF khz IF MAIN unit -

12 The AL bias voltage is also applied to the AL meter amplifier (Ia, pin ) to obtain an AL meter signal (ALL). The amplified signal is passed through the analog switch (I, pins, ) and applied to the main PU (I0, pin 0) to drive the S/RF meter via the sub PU (I0) on the DISPLAY board. An external AL input from the [AL] jack or [A] sockets is applied to the buffer amplifier (Q). xternal AL operation is identical to that of the internal AL. The FORV signal is also applied to the power meter amplifier (Ia, pin ). The amplified signal is passed through the analog switch (I, pins, ) as an FORL signal and applied to the main PU (I0, pin 0) to drive the S/RF meter when the power meter is selected. -- AP IRUIT (MAIN UNIT) The AP (Automatic Power ontrol) circuit protects the power amplifiers on the PA unit from high SWR and excessive current. The reflected wave signal appears and increases when the connected antenna is mismatched to 0 Ω. The AP detector circuit (TRL unit; D and L) detects the reflected signal, and applies it to the AP circuit (Ic, pin ) as a V signal. When the V signal level increases, the AP circuit decreases the AL voltage to activate the AP. For the current AP, the power transistor current is obtained by detecting the voltages (IH and IL) which appear at both terminals of the current detector (PA unit, R). The detected voltages are applied to the differential amplifier (Id, pins, ). When the current of transistors is increased, the amplifier controls the AL line to prevent excessive current flow. A portion of the V signal is applied to the SWR meter amplifier (Ib, pin ). The amplified signal is passed through the analog switch (I, pins, ) as an L signal and applied to the main PU (I0, pin 0) to drive the S/RF meter when the SWR meter is selected. --0 TMPRATUR PROTTION IRUIT (PA UNIT) The cooling fan (MF) is activated while transmitting or when the temperature of the power amplifier exceeds the preset value. The temperature protection circuit consists of Q0 Q and R0. While transmitting, Q0 and Q are turned ON, and provide a voltage to the cooling fan to rotate at medium speed. The thermistor detects the temperature of Q, and activates Q and Q to accelerate the cooling fan when the detected temperature exceeds 0 ( F). The cooling fan rotates at high speed at 0 ( F) or more. The thermistor keeps the cooling fan rotating even while receiving until the Q temperature drops to 0 (0 F) or below. -- MONITOR IRUIT (DSP OARD AND MAIN UNIT) The microphone audio signals can be monitored to check voice characteristics. () When FM/AM modes (MAIN UNIT) A portion of the microphone audio signals from the VA section in I are applied to the analog switch (I). The selected audio signals are applied to I (pin ), and the output signals from pin are applied to the AF amplifier circuit (I, pin ). () When SS/RTTY modes (DSP OARD) A portion of the transmit IF signal from the low-pass filter (Ic/d) is amplified at the IF (Ib) and buffer (Ia) amplifiers and applied to the digital mixer circuit (I0). The applied signal is mixed with a khz LO signal from I to demodulate into the AF signals. The demodulated signals are passed through the buffer amplifier (Ia), low-pass filter (Ib/c) and AF amplifier (Id), and then applied to the MAIN unit as the DMAF signal. The DMAF signal from the DSP board is amplified at AL amplifier (MAIN unit; I) and applied to the VA section of I (MAIN unit). The volume controlled AF signals is applied to the AF amplifier circuit (MAIN unit; I, pin ). - PLL IRUITS -- GNRAL The PLL unit generates a pair of st LO frequencies (.. MHz) for dualwatch and spectrum scope functions; a nd LO frequency ( MHz), rd LO frequency ( khz) and sweep LO frequency for the spectrum scope function. The st LO PLLs adopt a mixer-less dual loop PLL system and has VO circuits. The LOs, except the nd, use DDSs while the nd LO uses the fixed frequency of the crystal oscillator. -- ST LO PLL IRUIT The st LO PLLs contain a main and reference loop as a dual loop system. oth PLLs have equivalent circuits this manual describes only the st LO PLL A circuit. The reference loop generates a 0. to 0. MHz frequency using a DDS circuit, and the main loop generates a. to. MHz frequency using the reference loop frequency. () R LOOP PLL The oscillated signal at the reference VO (Q, D) is amplified at the amplifiers (Q, Q0) and is then applied to the DDS I (I0, pin ). The signal is then divided and detected on phase with the DDS generated frequency. The detected signal output from the DDS I (pin ) is converted into D voltage (lock voltage) at the loop filter (R R,, ) and then fed back to the reference VO circuit (Q, D). -

13 () MAIN LOOP PLL The oscillated signal at one of the main loop VOs (Q0, D0, D0), (Q, D, D), (Q, D D) and (Q, D D) is amplified at the buffer amplifiers (Q0, I0) and is then applied to the PLL I (I, pin ). The signal is then divided and detected on phase with the reference loop output frequency. The detected signal output from the PLL I (pin ) is converted into a D voltage (lock voltage) at the loop filter and then fed back to one of the VO circuits (Q0, D0, D0), (Q, D, D), (Q, D D) and (Q, D D). The oscillated signal is amplified at the buffer amplifiers (Q0, I0) and then applied to the RF unit as a st LO A signal after being passed through the bandpass filter (L0, L L, 0 0,, 0). -- ND LO AND R OSILLATOR IRUITS The reference oscillator (X, Q) generates a.000 MHz frequency for the DDS circuits as a system clock and for the LO output. The oscillated signal is doubled at the doubler circuit (Q, Q) and the.0 MHz frequency is picked up at the double tuned filter (L, L). The.0 MHz signal is applied to the RF unit as a nd LO signal. -- RD LO IRUIT The DDS I (I0) generates a 0-bit digital signal using the MHz system clock. The digital signal is converted into an analog wave signal at the D/A converter (R0 R0). The converted analog wave is passed through the bandpass filter (L0, L0, 0 ) and then applied to the MAIN unit as the rd LO signal. -- MARKR IRUIT The divided signal at the DDS circuit (I0) is used for the marker signals with the I-PRO. The reference signal for the DDS circuit (.0 MHz) is divided to produce an acceptable frequency signal, MHz, with the programmable divider then divided again by 0 to obtain 00 khz cycle square-wave signals. The generated marker signals are output from pin of the DDS I (I0), and are then applied to the RF unit via the mute switch (I) and J as the MKR signal. PLL IRUIT ANT st mixer A Q Q RF unit. MHz nd mixer Q Q MAIN unit rd mixer I rystal filter to DSP board LOA Q0 Q Q Q I Ref. loop PLL Q.. MHz /N divider Phase detector MHz st LO PLL A circuit Main loop PLL / bit D/A st mixer LO.0 MHz.. MHz st LO PLL circuit PLL unit LO Q Q khz LO PF D/A to scope circuit (RF unit, I) LPF D/A SLO. MHz to scope circuit (RF unit, D) LPF Loop filter SLO Q0. MHz I0 Phase detector DDS DDS I0 DDS I0 PLL I I0 Reference oscillator X:.0 MHz -

14 - ANTNNA TUNR IRUITS -- MATHING IRUIT (TUNR UNIT) The matching circuit is a T-network. Using tuning motors, the matching circuit obtains rapid overall tuning speed. Using relays (RL RL), the relay control signals from the antenna tuner PU (TRL unit; I) via the buffer-amplifier (I, I) ground one of the taps of L L and add capacitors ( ). After selecting the coils and capacitors, motors (TRL unit; MF, MF) adjust and using the antenna tuner PU (TRL unit; I) and the motor controller (TRL unit; Q Q, D D) to obtain a low SWR (Standing Wave Ratio). -- DTTOR IRUIT (TRL UNIT) () SWR detector Forward and reflected power are picked up by a current transformer (L), detected by D and D, and then amplified at Ia and Ib, respectively. The amplified voltages are applied to the antenna tuner PU (I, pins, ). The tuner PU detects the SWR. () Reactance components detector Reactance components are picked up by comparing the phases of the RF current and RF voltage. The RF current is detected by L and R and buffer-amplified at Ie and Ia and then applied to the phase comparator (Ia). RF voltages are detected by and then applied to the phase comparator (Ib) after being amplified at the bufferamplifiers (Ic, Ib). The output signal from the phase comparator (Ia, pin for RF current, Ib pin for RF voltage) is rectified at D and D for conversion into D voltage. The rectified voltage signals are combined, then amplified at the inverter amplifier (Ib), then applied to the antenna tuner PU (I, pin ). A -MOS I is used for the buffer-amplifier (I) to improve functionable sensitivity; the inverter amplifier (I) is very responsive even with a low signal level input. Together, these ensure quick and stable signal detection even at low RF signal level input. () Resistance components detector Resistance components are picked up by L, and detected by D, D and Q. The detected resistance components are amplified at the inverter amplifier (Ia), and then applied to the antenna tuner PU (I, pin ). -- MOTOR ONTROL IRUIT (TRL AND TUNR UNITS) The control circuit of the internal antenna tuner consists of the PU, PROM*, tuning motors and tuning relays. *lectronically-rasable Programmable Read Only Memory () Tuning relays (TUNR unit) According to the operating frequency band and antenna condition, tuning relays select the capacitors and coils. -- ANTNNA TUNR PU PORT ALLOATION (TRL unit; I) Pin Port number name Description R Input port for the resistance components detection voltage. Input port for the reflected RF power voltage. FOR PWRS Inpout port for the forward RF power voltage. Input port for the transceiver power OFF. Inputs low level signal when operating STDU the antenna tuner in 0 MHz band., STI KY START THRU SND L, L Input port for reference voltage setting. Outputs tuner data signal. Input port for the serial signal. Input port for the [TUNR] ON/OFF signal. Input port for the TX/RX switching signal. Input port for the antenna tunner PU system clock. Outputs the coil selection signal. DUAL High : While 0 MHz band is displayed. 0 LM, LM, LM, L0M, LM, L.M O, O, O, I, I, I PZ, PY, PX, PW, RZ, RY, RX, RW P Output the coil selection signal. Output the capacitor selection signal. Output pulse-type control signals for the tuning motors (M, M). Input port for the reactance components detection voltage. () PU and PROM (TRL unit) The antenna tuner PU (I) controls the tuning motors via the motor controller (Q Q, D D) and tuning relays, and memorizes the best preset position in 00 khz steps. The memory contents are stored in the PROM (I) without a backup battery. () Tuning motors (TRL and TUNR units) A motor controller (Q Q, D D) rotates the tuning motors (TUNR unit; MF, MF) to obtain a low SWR. -

15 - SOP IRUITS -- SOP RIVR IRUIT (RF UNIT) A portion of the. MHz st IF signal from the st mixer circuit (Q Q: while receiving) or IF amplifier (Q: while transmitting) is amplified at the IF amplifiers (Q, Q), then mixed with the. MHz scope nd LO signal at the mixer circuit (D) to produce the. MHz IF signal. The mixed IF signal is passed through the ceramic bandpass filters (FI, FI) to suppress unwanted signals. The filtered IF signal is applied to the FM IF I (I, pin ). The applied MHz IF signal is mixed with the sweep LO signals from the PLL unit at the FM IF I (I), which includes the RSSI terminal. The mixed IF signals are filtered at the ceramic bandpass filter (FI) then applied to the limiter amplifier section in the FM IF I (I, pin ). The applied IF signals are converted into D voltages according to the applied IF signal strength at the RSSI section in the I. The converted voltages are amplified at Ib then applied to the MAIN unit as the SPL signal. - POWR SUPPLY IRUITS -- PA UNIT LIN PHV HV V VA V V HV The voltage from an external power supply via the common filter circuit (FILTR unit, L0, L0). The same voltage as the PHV line passed through a fuse (F). The same voltage as the HV line passed through the switching relay (RL). The same voltage as the V line is applied to the AF power amplifier (MAIN unit, I). ommon V converted from the V line and regulated by the + regulator circuit (I). ommon V converted from the V line and regulated by the + regulator circuit (I). ommon V converted from the V line and regulated by the HV regulator circuit (I). Some of the D voltages from the FM IF I are amplified at Ia to produce AG voltages for the IF amplifiers (Q, Q), producing wider dynamic range. -- FRONT UNIT LIN y sweeping LO signals (SLO) are applied to the mixer section in the FM IF I, the spectrum scope function is activated. -- SWP LO IRUIT (PLL UNIT) The sweep LO signals (SLO) are generated by the DDS I (I0) using the MHz system clock. A 0-bit digital signal is converted into analog wave signals at the D/A converter (R0 R0). The converted analog wave is passed through the bandpass filter (L0, L0, 0 ) then applied to the RF unit after being amplified at the buffer amplifier (Q0). V V V V +V ommon V converted from the V line and regulated by the + regulator circuit (I). ommon V converted from the V line and converted by the D-D converter circuit (I, Q, D). The voltage is applied to the V, V regulator circuits and etc. ommon V converted from the V line and regulated by the regulator circuit (I0). ommon V converted from the V line and regulated by the V regulator circuit (I). ommon V converted from the V line and converted by the V D-D converter circuit (I, Q, D). SOP IRUIT DIAGRAM st LO signal to nd mixer circuit SLO signal (.. MHz*) Q Q SLO signal (.0 MHz) I Mixer RF signals IF amp. IF amp. eramic PF eramic PF FI st mixer A Q Q D FI FI Ia Limiter amp. eramic PF AG RF unit to the MAIN unit SPL signal amp. RSSI Ib *depending on sweeping passband width -

16 -- MAIN UNIT LIN RV TV Receive V converted from the V line and regulated by the RV regulator circuit (Q0, Q0, D0). Transmit V converted from the V line and regulated by the TV regulator circuit (Q, Q, D). -- TRL AND PLL UNITS LIN ommon V for the antenna tuner PU (TRL unit; I) and the PROM (TRL unit; I), V converted from the V line and regulated by the + regulator circuit (TRL unit; I). V ommon V for each of the PLL-A and PLL- circuits regulated from the V line and regulated by the + regulator circuit (PLL unit; I: PLL- A, I: PLL-). - LOGI IRUITS -- AND SLTION DATA (RF, TRL AND PLL UNITS) To select the correct bandpass, low-pass filters and VOs on the RF, FILTR and PLL units, the main PU (MAIN unit, I0) outputs the following band selection data via the I/O expander (RF unit, I0, I0, TRL unit, I) or DDS I (PLL unit, I0, I0) depending on the displayed frequency. Frequency [MHz] I0, I0 I I0 I0 (RF unit) (TRL) (PLL) (PLL) PF LPF VO-A VO- 0 LS LS VAS VS LS LS VAS VS 0W 0 0W LS LS L VAS VAS VS VS The D/A convertor (MAIN unit, I) output signal from pin is amplified at I0b (pins ) to obtain the band voltage for external equipment via the [A ] connector pin. - 0

17 STION ADJUSTMNT PRODURS - PRPARATION FOR SARVIING RQUIRD TST QUIPMNT QUIPMNT GRD AND RANG QUIPMNT GRD AND RNG D power supply RF power meter (terminated type) Frequency counter RF voltmeter FM deviation meter Modulation analyzer Distortion meter Oscilloscope Output voltage :. V D urrent capacity : 0 A or more Measuring range : 0 00 W Frequency range :. 00 MHz Impedance : 0 Ω SWR : Less than. : Frequency range : 00 MHz Frequency accuracy : ±0. ppm or better Sensitivity : 00 mv or better Frequency range : 00 MHz Measuring range : V Frequency range : D 00 MHz Measuring range : 0 to ± khz Frequency range : At least 0 MHz Measuring range : 0 00 % Frequency range : khz ±0 % Measuring range : 00 % Frequency range : D 0 MHz Measuring range : V Audio generator Standard signal generator (SSG) Digital multimeter A millivoltmeter D voltmeter D ammeter Spectram analyzer Attenuator xternal speaker Terminator Frequency range Measuring range Frequency range Output level Imput impeadance Measuring range Input impedance : Hz : 00 mv : 00 MHz : µv mv ( to dm) : 0 MΩ/D or beter : 0 mv 0 V : 0 kω/v D or better Measurement capability: A/0 A Frequency range : At least 0 MHz Spectraum bandwidth : 00 khz or more Power attenuation : 0 or 0 d apacity : 0 W or more Input impedance : Ω apacity : W or more Resistance : 0 and 0 Ω apacity : 0 W or more ONNTIONS Standard signal generator FM deviation meter AUTION! DO NOT transmit while an SSG is connected to the antenna connector. D power supply Distortion meter Ammeter to [XT SP] to [D. V] to the antenna connector Attenuator Modulation analyzer Spectrum analyzer RF power meter Speaker [ANT] [ANT] Audio generator,. PTT [MI] -

18 - PLL ADJUSTMNTS ADJUSTMNT R FRQUY LPL-A LOK VOLTAG VO-A LOK VOLTAG LO-A OUTPUT LVL LPL- LOK VOLTAG VO- LOK VOLTAG LO- OUTPUT LVL LO OUTPUT LVL SLO OUTPUT LVL ADJUSTMNT ONDITION Display frequency: Any Turn L on the PLL unit to rotation downside for presetting. Receiving Display frequency: MHz Mode : US Receiving Display frequency:. MHz Mode : US Receiving Display frequency:. MHz Mode : US Receiving Display frequency:. MHz Mode : US Receiving Display frequency: MHz Mode : US Receiving Display frequency: MHz,. MHz MHz,. MHz MHz,. MHz MHz, MHz Receiving Sub display freq. : MHz Mode : US Receiving Sub display freq. :. MHz Mode : US Receiving Sub display freq. :. MHz Mode : US Receiving Display frequency:. MHz Mode : US Receiving Display frequency: MHz Mode : US Receiving Sub display freq. : MHz,. MHz MHz,. MHz MHz,. MHz MHz, MHz Receiving Display frequency: Any Receiving Display frequency: Any Receiving ADJUSTMNT MASURMNT VALU POINT UNIT LOATION UNIT ADJUST PLL PLL PLL PLL PLL PLL PLL PLL PLL onnect a frequency counter to check point P. onnect an RF voltmeter to check point P. onnect a digital multimeter or oscilloscope to check point LPA. onnect a digital multimeter or oscilloscope to check point LVA. onnect an RF voltmeter to check point P. onnect a digital multimeter or oscilloscope to check point LP. onnect a digital multimeter or oscilloscope to check point LV. onnect an RF voltmeter to check point P. onnect an RF voltmeter to check point P0. onnect an RF voltmeter to check point P MHz Maximum level (0 d or more).0 V. V. V. V. V 0 dm or more.0 V. V. V. V. V 0 dm or more dm or more dm or more PLL PLL PLL PLL PLL L (R for critical adjustment) L, L 0 Verify 0 Verify Verify Verify -

19 PLL ADJUSTMNTS continued ADJUSTMNT SLO OUTPUT LVL MARKR OUTPUT LVL ADJUSTMNT ONDITION Display frequency: Any Receiving Display frequency: Any Receiving ADJUSTMNT MASURMNT VALU POINT UNIT LOATION UNIT ADJUST PLL PLL onnect an RF voltmeter to check point P0. onnect an oscilloscope to check point P. 0 dm or more Vp-p or more Verify Verify PLL unit PLL unit ottom view of the transceiver LV VO- lock voltage check point P LO- output level check point 0 R Reference frequency adjustment LVA VO-A lock voltage check point P LO-A output level check point VO- lock voltage adjustment VO-A lock voltage adjustment 0 LPL- lock voltage adjustment LP LPL- lock voltage check point P0 SLO output level check point LPL-A lock voltage adkustment P Marker output level check point LPA LPL-A lock voltage check point L L L Reference frequency adjustment P0 LO output level check point P0 SLO output level check point P Reference frequency check point -

20 - RIVR ADJUSTMNTS ADJUSTMNT RX PAK MIXR ALA FM DISTORTION ADJUSTMNT ONDITION Display frequency: MHz Mode : US Filter :. khz [P.] : P. [ATT] : OFF onnect an SSG to [ANT] connector and set as : Frequency :.000 MHz Level : 0 µv* ( dm) Modulation: khz/±. khz dev. Receiving [DUAL WATH] : ON Sub display freq. : MHz Mode : US [AL] : Max. W Set an SSG as : Level : 0 µv* ( dm) Receiving Display frequency: MHz Mode : US [DUAL WATH] : OFF Set following selections, controls and functions as : Filter :. khz, [ATT] : OFF [AG]: MID, [AL] : enter PT : enter, PT : enter [N] : OFF, [RIT] : OFF [P.] : P. [RF/SQL] : enter [AUTO NOTH]: OFF [NOTH] : enter [NR] switch : OFF [NR] level : Max. W [MONITOR] : OFF onnect an SSG to [ANT] connector and set as : Frequency :.000 MHz Level : µv* ( 0 dm) Modulation: OFF Receiving Display frequency: MHz Sub display freq. : MHz Mode : US [AL] : Max. W Apply no no RF signal to [ANT] connector. Receiving [AL] : Max. W Receiving Display frequency: MHz Sub display freq. : MHz Mode : FM [AL] : Max. W onnect an SSG to [ANT] connector and set as : Frequency : MHz Level : 00 µv* ( dm) Modulation: khz/±. khz Dev. Receiving [AL] : Max. W Receiving ADJUSTMNT MASURMNT VALU POINT UNIT LOATION UNIT ADJUST Rear panel Rear panel Rear panel onnect an A millivolt meter to [XT SP] connector with an Ω load. onnect an A millivolt meter to [XT SP] connector with an Ω load. onnect an distortion meter to [XT SP] connector with an Ω load. Maximum audio output level Minimum noise output level Minimum level distortion RF MAIN RF RF L, L, L, L L L, L, L R R *This output level of a standard signal generator (SSG) is indicated as SSG s open circuit. -

21 RF unit RF unit ottom view of the transceiver L Mixer balance adjustment L RX peak adjustment R R L L L RX peak adjustment FM distortion adjustment MAIN unit MAIN unit ottom view of the transceiver RX peak adjustment L L L -

22 RIVR ADJUSTMNTS continued ADJUSTMNT RIVR TOTAL GAIN NOIS LANKR ADJUSTMNT ONDITION Display frequency: MHz Mode : US Filter :. khz [P.] : OFF onnect an SSG to [ANT] connector and set as : Frequency :.000 MHz Level : 00 µv* ( dm) Modulation: OFF Receiving Set an SSG output level to OFF. Receiving Display frequency: MHz Mode : US [P.] : P. [N] : OFF onnect an SSG to [ANT] connector and set as : Frequency :.000 MHz Level : 0 µv* ( dm) Modulation: OFF and apply following signal to [ANT] connector. 00 msec. ADJUSTMNT MASURMNT VALU POINT UNIT LOATION UNIT ADJUST Rear panel MAIN onnect an A millivolt meter to [XT SP] connector with an Ω load. onnect an oscilloscope to check point P..0 V (0 d) mv ( 0 d) Maximum noise level Front unit MAIN MAIN [AF] control R0 L, L SPTRUM SOP msec. Preset R on the MAIN unit to the o clock position. Receiving [N] : ON Receiving Display frequency: MHz Mode : US [DUAL WATH] : OFF [P.] : OFF [SOP] : ON [SOP ATT] : OFF Verify the connection of J on the RF unit and P0 (SLO:.000 MHz/ dm) from the PLL unit. onnect an SSG to [ANT] connector and set as : Frequency :.000 MHz Level : µv* ( 0 dm) Modulation: OFF Receiving Set an SSG output level to OFF. Receiving Set an SSG output level as: Level : 0 mv* ( dm) Receiving *This output level of a standard signal generator (SSG) is indicated as SSG s open circuit. RF onnect a digital multimeter oroscilloscope to check point P. At the point where the voltage just reduces. Muximum voltage 0.0 V V. V. V RF R L, L, L R R -

23 MAIN unit Noise blanker adjustment P Noise blanker check point L L R R0 Receiver total gain adjustment RF unit RF unit Spectrum scope adjustment ottom view of the transceiver R R L L L J Spectrum scope pre-setting P Spectrum scope check point -

24 - TRANSMITTR ADJUSTMNTS ADJUSTMNT IDLING URRNT (for driver) (for final amplifier) TX PAK TRANSMITTR TOTAL GAIN Ic AP HF ANDS OUTPUT POWR 0 MHz AND OUTPUT POWR AM ARRIR ADJUSTMNT ONDITION Display frequency: MHz Mode : W (key up) Preset R, R on the PA unit to max. W. [RF POWR] : Max. W [TUNR] : OFF Transmitting (without key) Transmitting (without key) Display frequency: MHz Mode : US [RF POWR] : Max. W Apply no audio signals to [MI] connector. Transmitting onnect an audio generator to [MI] connector and set as: Frequency :. khz Level : mvrms Transmitting Transmitting Transmitting Display frequency: MHz Mode : US [MI GAIN] : enter onnect an audio generator to [MI] connector and set as: Frequency :. khz Level : mvrms Transmitting Display frequency:.0000 MHz Mode : RTTY onnect P0 to. Transmitting Display frequency: MHz Mode : RTTY [RF POWR] : Max. W [TUNR] : OFF Transmitting Display frequency: MHz Mode : RTTY [RF POWR] : Max. W [TUNR] : OFF Transmitting Display frequency:.0000 MHz Mode : AM [RF POWR] : Max. W [MI GAIN] : enter Apply no audio signals to [MI] connector. Transmitting ADJUSTMNT MASURMNT VALU POINT UNIT LOATION UNIT ADJUST PA PA MAIN Rear panel RF Rear panel Rear panel Rear panel Rear panel MAIN Unsolder W. onnect an ammeter to the unsoldering points of W. After adjustment, re-solder the lead wire (W) on the PA board. Unsolder R (L side). onnect an ammeter to the unsoldering points of R. After adjustment, re-solder the resistor (R) on the PA board. onnect a digital multimeter or oscilloscope to check point P. onnect an RF power meter to [ANT] connector. onnect an RF voltmeter to check point J. onnect an RF power meter to [ANT] connector. onnect an ammeter between power supply and the I- PRO. onnect an RF power meter to [ANT] connector. onnect an RF power meter to [ANT] connector. onnect an RF power meter to [ANT] connector. 00 ma 00 ma V 0 W Maximum output power Maximum leve 0 W A 00 W 00 W 0 W PA PA MAIN Front panel MAIN RF MAIN MAIN MAIN MAIN MAIN R R R [MI GAIN] control L L R R R0 R0 R0 -