DESCRIPTION FEATURES APPLICATIONS. Audio Processor IC

Transcription

1 ax: ESCRIPTION is an audio processor IC specially designed for high fidelity audio applications utilizing advanced CMOS processing technology. Included in the IC are 5 stereo input signal ports, super bass and bass/treble controls, volume control, balance/fader controls and muting. The internal circuits of have undergone meticulous adjustment to achieve the finest possible audio quality. Extremely low signal distortion, strong signal driving ability, and clear dynamic peak and level sound quality at any volume level distinguish from other audio processors. is the ideal solution for audio systems catering to the most demanding audiophiles. EATURES CMOS process technology Low level output signal loss: Typ.=0.003% at VOUT=1Vrms High level output driving ability: load impedance as low as 600Ω Large output amplitude ive stereo input signal ports Volume, balance and fader controls Super bass, bass and treble controls Select Out supports addition of externals circuits Built-in automatic power-on reset 3-wire digital control interface 36-pin SSOP packaging APPLICATIONS High fidelity audio systems Car audio systems V ecember, 2005

2 ax: BLOCK IAGRAM Super Bass Control Interface Output Gain & ader Super Bass Treble Bass Output Gain & ader VSS CE I CL V LROUT RROUT LOUT ROUT LIN RIN LOUT LSB LBASS2 ROUT RSB RBASS2 LBASS1 LTRE LVref Control Circuit Control Circuit Control Circuit RvRE Treble Bass RBASS1 RTRE LIN RIN LSELO Input Gain Input SEL. Input SEL. Input Gain RSELO L5 L4 L3 L2 L1 Vref R1 R2 R3 R4 R5 V ecember, 2005

3 ax: PIN CONIGURATION I CE VSS LROUT LOUT LIN LOUT LSB LBASS2 LBASS1 LTRE LIN LSELO L5 L4 L3 L2 L CL V RROUT ROUT RIN ROUT RSB RBASS2 RBASS1 RTRE RIN RSELO R5 R4 R3 R2 R1 Vref V ecember, 2005

4 ax: PIN ESCRIPTION Pin No. Pin Name unction 1 I 3-wire serial data pin 2 CE 3-wire chip enable pin 3 VSS Ground pin 4 LROUT Left rear channel output pin 5 LOUT Left front channel output pin 7 LOUT Left super bass output and external component connection pin 8 LSB Left super bass external component connection pin 9 LBASS2 Left bass filter external component connection pin 2 10 LBASS1 Left bass filter external component connection pin 1 11 LTRE Capacitor connection pin for configuring treble filter (left) 13 LSELO Input selector output pin (left) 14 L5 Input signal pin 5 (left) 15 L4 Input signal pin 4 (left) 16 L3 Input signal pin 3 (left) 17 L2 Input signal pin 2 (left) 18 L1 Input signal pin 1 (left) 19 Vref Reference voltage bypass capacitor 20 R1 Input signal pin 1 (right) 21 R2 Input signal pin 2 (right) 22 R3 Input signal pin 3 (right) 23 R4 Input signal pin 4 (right) 24 R5 Input signal pin 5 (right) 25 RSELO Input selector output pin (right) 27 RTRE Capacitor connection pin for configuring treble filter (right) 28 RBASS1 Right bass filter external component connection pin 1 29 RBASS2 Right bass filter external component connection pin 2 30 RSB Right super bass external component connection pin 31 ROUT Right super bass output and external component connection pin 33 ROUT Right front channel output pin 34 RROUT Right rear channel output pin 35 V Power supply pin 36 CL 3-wire serial clock input pins V ecember, 2005

5 ax: UNCTION ESCRIPTION CONTROLLER UNCTIONS unction Scope Range Step Other 81-step Volume 0 to 79 gain Each step 1 Control Step 81 is - control Output and ader Bass control Treble control Super bass Input selector gain Output gain Input signal selector Total of 16 steps Total 15 steps Total 15 steps Total 11 steps Total 16 steps Total 3 steps Total 5 inputs 0 to -60 Step 16 is - ±11.9 ± to -20: 2 steps -20 to -25: 5 steps -25 to -45: 10 steps Then 60 and - Each step 1.9 Each step 1.9 Left and right channel gain can be adjusted independently as a balance control. Can select attenuation for either the front or rear channels. 0 to 20 Each step 2 Super bass gain boost only 0 to , 6.5, 8.5 Each step 1.25 Stereo inputs V ecember, 2005

6 ax: WIRE SERIAL BUS INTERACE To control any of s functions, it is necessary to pass the microprocessor control signals through the CE, I, and CL 3-wire interface. The basic timing sequence of the control codes is shown in the diagram below. CE I B0 B1 B2 B3 A0 A1 A2 A CL CE CL s min s s s min min min s min I s T INTERACE PROTOCOL The 52-bit control code for is composed of an 8-bit address code and a 44-bit data code for a total control code length of 52 bits. CONTROL COE EINITIONS unction Name Application Register Location Notes ader Adjust fader gain 0 ~ 3 Super Bass Super bass boost 4 ~ 7 Only boost Bass Bass adjustment 8 ~ 11 Treble Treble adjustment 12 ~ 15 Volume Main volume control 16 ~ 23 Input Gain Input selector gain 24 ~ 27 Input Selector Input selector 28, 29, 32 ader ront/rear Sel. ader channel selector 30 Output Gain Output gain select 31, 39 Balance Left/right channel select 33, 34 Input Mute or muting 35 Test Mode or factory testing 36 ~ 38, 40 ~ 43 Can independently adjust left and right volumes Operates in conjunction with volume Send all zeroes under normal operation V ecember, 2005

7 ax: CONTROL COE BIT IAGRAM B 0 B 1 B 2 B 3 A 0 A 1 A 2 A Address code ader step control Super bass control STEP 0(LAT) STEP 1 STEP 2 STEP 3 STEP 4 STEP 5 STEP 6 STEP 7 STEP 8 STEP 9 STEP 10 (BOOST max) Bass control Boost STEP STEP STEP STEP STEP STEP STEP STEP STEP STEP STEP STEP STEP STEP STEP1 Cut Treble control Boost STEP STEP STEP STEP STEP STEP STEP STEP STEP STEP STEP STEP STEP STEP STEP1 Cut Volume control Input switch control(1) ader resr/front control 0 1 Rear ront Input gain control Input switch control(2) Channel selection Lch 0 1 Rch 1 1 Initial setting Input mute switch control 0 1 O ON L/R simultaneous TEST mode Output gain control V ecember, 2005

8 ax: VOLUME CONTROL COE EINITIONS Operation V ecember, 2005

9 ax: Operation V ecember, 2005

10 ax: INPUT SELECTOR EINITIONS Operation L1 (R1) ON L2 (R2) ON L3 (R3) ON L4 (R4) ON L5 (R5) ON IMPORTANT USER NOTES SOTWARE PROGRAMMING NOTES Notes: 1. Internal registers are not in a set condition when the IC is powered on. To ensure that unusual noise will not be output, it is suggested that an external muting circuit is added before the control codes are sent. 2. After the IC has been powered on, send the IC a clear register code (to clear the register: 33 = 34 = 0) followed by initialization values for each register in order. 3. control codes constitute a 52-bit signal. Each time a control code is sent, all data in the registry must be written into. When it is necessary to access only one function (for example, volume control only), it is allowed to change only the corresponding register data (in this example, 16 to 23) while the remaining registers are sent original unchanged data. CIRCUIT LAYOUT NOTES Notes: 1. To ensure that the 3-wire bus line signals (I, CL, CE) do not interfere with the audio signals, when designing the circuit layout: 1) place the bus line at a sufficient distance from the audio path, and 2) the bus line and audio path should not be parallel. In addition to this, use a shielded ground pane or use a shielded cable to deliver signals to the interface. 2. To minimize interference between different voltage levels, please ensure that analog and digital grounds are separate. Analog grounds such as GN and output terminal grounds should be connected together. The display shield, MCU, key scanning signal and remote control receiver decoder should be connected to a separate ground path. inally, connect the two grounds at the power supply GN point. V ecember, 2005

11 ax: ABSOLUTE MAXIMUM RATINGS Parameter Symbol Condition Min. Max. Unit Supply voltage Vcc 0 11 V Max. input voltage VIMAX CL,I,CE Other than CL,I,CE Vss V 0.3 V Operating temperature Topr Storage temperature Tstg V ecember, 2005

12 ax: ELECTRICAL CHARACTERISTICS (Vcc=9V, Rs=600Ω, RL=10KΩ, f=1khz, Ta=25, Volume, treble and bass=0) Parameter Symbol Condition Min. Typ. Max. Unit Supply voltage Vcc V Supply current Ic V=5V, No Load V=9V, No Load ma Input Selector Vi=1Vrms Vi=0.2Vrms Total harmonic Vi=1Vrms TH Volume Control distortion Vi=0.2Vrms % ader Vi=1Vrms Vi=0.2Vrms Left and Right channel separation CTLR Input selector crosstalk CTIN Noise output Noise A-weighted µv Signal to noise ratio S/N A-weighted Mute level Mute Vin=1Vrms Ripple reduction PSRR =100Hz, Vr=0.1V =1KHz, Vr=0.1V Input resistance RIN Select Input Volume Control, ader Input KΩ Output resistance ROUT Select Output, Volume Output, ader Output Ω Recommended lowest impedance RLOA Ω load Maximum output voltage VOMAX TH=1% Vrms Slew rate Slew Rate V/µs Audio signal Bandwidth ABW -3, H KHz 3-Wire Serial Bus Interface Input high level VIH CL, CE, I V V Input low level VIL CL, CE, I Vss V Pulse width Tw CL µs Settle time Tsetup CL, CE, I µs Hold time Thold CL, CE, I µs Input clock Tclk CL, CE, I KHz V ecember, 2005

13 ax: GAIN AJUSTMENT SCOPE Parameter Symbol Condition Min. Typ. Max. Unit Super Bass Control Maximum boost Gsbass Step adjustment Gsbstep Bass Control Maximum boost Gbass Maximum attenuation Gbass Step adjustment Gbstep Treble Control Maximum boost Gtreble Maximum attenuation Gtreble Step adjustment Gtstep Input Gain Control Minimum gain INgain Step Maximum gain INgain Step Step adjustment INstep Volume Control Minimum attenuation VOLgain Step Step Maximum attenuation VOLgain Step Step adjustment VOLstep ader Attenuator Minimum attenuation Again Step Step Maximum attenuation Step adjustment Again Astep Step ~ ~ ~ ~ Output Gain Minimum gain OUTgain Step Step Step adjustment OUTstep Step Step V ecember, 2005

14 ax: ELECTRICAL CHARACTERISTIC IAGRAMS Total Harmonic istortion and Amplitude 1Vrms Output T Analysis Left and Right Channel Crosstalk V ecember, 2005

15 ax: APPLICATION CIRCUIT µcom PA 2.2µ I CE VSS LROUT CL V RROUT ROUT V 2.2µ 2.2µ PA PA 3.7KΩ PA 2.2µ 0.15µ 0.15µ LSB LOUT LIN LOUT LSB RIN ROUT RSB RBASS µ 0.15µ 0.082µ 3.7KΩ 7.68KΩ 7.68KΩ 0.082µ 0.082µ LSB 9 10 LBASS2 LBASS1 RBASS1 RTRE µ 1500p 1500p LTRE LIN LSELO L5 L4 L3 L2 L1 RIN RSELO R5 R4 R3 R2 R1 Vref µ V ecember, 2005

16 ax: ORER INORMATION Valid Part Number Package Type Top Code 36 Pins, SSOP, 300mil V ecember, 2005

17 ax: PACKAGE INORMATION 36 PINS, SSOP, 300 MIL C E1 E GAUGE PLANE 0.01 INCH L C A h x C SEATING PLANE e b A1 Symbol imensions In Inches Min Typ Max A A b c e Basic E E h L θ Notes: 1. imension does not include mold flash, protrusions, or gate burrs. 2. Mold flash, protrusions, and gate burrs shall not exceed inch. (0.1524mm) per side. 3. imension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, and gate burrs shall not exceed 0.15 mm (0.006 in) per side. V ecember, 2005