SERVICE MANUAL VHF/UHF ALL MODE TRANSCEIVER. i910h

Transcription

1 SERVIE MANUAL VHF/UHF ALL MODE TRANSEIVER i0h

2 INTRODUTION This service manual describes the latest service information for the I-0H VHF/UHF ALL MODE TRANSEIVER at the time of publication. DANGER NEVER connect the transceiver to an A outlet or to a D power supply that uses more than V. This will ruin the transceiver. DO NOT expose the transceiver to rain, snow or any liquids. VERSION No. #0 #0 #0 #0 VERSION Europe Australia U.S.A. Korea SYMOL EUR AUS USA- KOR DO NOT reverse the polarities of the power supply when connecting the transceiver. DO NOT apply an RF signal of more than 0 dm (00 mw) to the antenna connector. This could damage the transceiver s front end. To upgrade quality, any electrical or mechanical parts and internal circuits are subject to change without notice or obligation. ORDERING PARTS e sure to include the following four points when ordering replacement parts:. 0-digit order numbers. omponent part number and name. Equipment model name and unit name. Quantity required <SLE ORDER> 0000 I LA0N I-0H MAIN UNIT pieces 0000 Screw ih M ZK I-0H over 0 pieces Addresses are provided on the inside back cover for your convenience. REPAIR NOTES. Make sure a problem is internal before disassembling the transceiver.. DO NOT open the transceiver until the transceiver is disconnected from its power source.. DO NOT force any of the variable components. Turn them slowly and smoothly.. DO NOT short any circuits or electronic parts. An insulated tuning tool MUST be used for all adjustments.. DO NOT keep power ON for a long time when the transceiver is defective.. DO NOT transmit power into a signal generator or a sweep generator.. ALWAYS connect a 0 d to 0 d attenuator between the transceiver and a deviation meter or spectrum analyzer when using such test equipment.. READ the instructions of test equipment thoroughly before connecting equipment to the transceiver.

3 TALE OF ONTENTS SETION SPEIFIATIONS SETION INSIDE VIEWS - I-0H UX-0 (OPTIONAL UNIT) SETION SETION SETION SETION SETION SETION DISASSEMLY AND OPTION INSTRUTIONS IRUIT ADJUSTMENT PROEDURES PARTS LIST MEHANIAL PARTS SEMI-ONDUTOR INFORMATION SETION OARD LAYOUTS - VR-A OARD VR- OARD RIT OARD FUN OARD MI OARD JAK OARD DRV OARD VARISTOR-A OARD VARISTOR- OARD VARISTOR- OARD DISPLAY OARD PA UNIT PLL UNIT MAIN UNIT UX-0 MAIN UNIT SETION 0 LOK DIAGRAMS 0 - MAIN UNIT PA AND PLL UNITS FRONT UNIT UX SETION WIRING DIAGRAM SETION VOLTAGE DIAGRAMS - FRONT UNIT PLL UNIT PA UNIT () PA UNIT () MAIN UNIT () MAIN UNIT () MAIN UNIT () UX-0 MAIN UNIT () UX-0 MAIN UNIT ()

4 SETION SPEIFIATIONS GENERAL Frequency coverage : (Unit: MHz) Version MHz 0 (0) MHz 00 MHz* U.S.A. Tx:.0.0 Tx: Tx: Rx:.0.0* Rx: * Rx: * Europe Australia Korea Mode No. of memory h. Antenna connector Usable temp. range Frequency stability Frequency resolution Power supply * Optional UX-0 is installed. * Guaranteed range is.0.0 MHz. * Guaranteed range is MHz. * Guaranteed range is MHz. : US, LS, W, FM, FM-N* *Not available in 00 MHz band : ( regular, scan edges, calls for each band) plus 0 satellite memories) : SO- (0 Ω; VHF) Type-N (0 Ω; UHF) : 0 to +0 ; + F to +0 F : Less than ± ppm ( 0 to 0 ; + to +0 F) : Hz minimum :. V D ±% (negative ground) urrent drain (at. V D) : Transmit Max. power.0 A Receive Standby.0 A (.0 A with UX-0) Max. audio. A (. A with UX-0) Dimensions : (W) (H) (D) mm (projections not included) (W) (H) (D) in Weight (approx.) :. kg; 0 lb (with UX-0:. kg; lb oz) A connector : -pin DIN connector I-V connector : -conductor. (d) mm ( ) DATA connectors : -pin mini DIN (for MAIN and SU) TRANSMITTER Output power : (continuously adjustable) MHz 00 W 0 (0) MHz W 00 MHz 0 W (with UX-0) Modulation system : SS alanced modulation FM Variable reactance modulation Spurious emission : /0 (0) MHz More than 0 d 00 MHz More than 0 d arrier suppression : More than 0 d Unwanted sideband : More than 0 d suppression Microphone connector : -pin connector (00 Ω) KEY connector : -conductor.(d) mm ( ) All stated specifications are subject to change without notice or obligation. -

5 REEIVER Receive system : VHF SS, W Single conversion superheterodyne FM Double conversion superheterodyne UHF SS, W Double conversion superheterodyne FM Triple conversion superheterodyne Intermediate frequencies : (Unit: MHz) MAIN AND SU AND st nd rd st nd rd SS MHz W FM SS (0) MHz W FM SS MHz W FM Sensitivity : SS, W (0 d S/N) Less than 0. µv FM ( d SINAD) Less than 0. µv Squelch sensitivity : SS, W Less than.0 µv (threshold) FM Less than 0. µv Selectivity : SS, W More than. khz/ d Less than. khz/ 0 d* FM FM-N W-N (w/fl- or FL-) More than.0 khz/ d Less than 0.0 khz/ 0 d* More than.0 khz/ d Less than.0 khz/ d More than 0. khz/ d Less than. khz/ 0 d* *Except 00 MHz band Spurious and image rejection ratio: /0 (0) MHz More than 0 d 00 MHz More than 0 d AF output power (at. V D): More than.0 W at 0% distortion with an Ω load RIT variable range : /0 (0) MHz ±.0 khz (SS, W) ±.0 khz (FM) 00 MHz ±.0 khz (SS, W) ±0.0 khz (FM) IF SHIFT variable range : More than ±. khz PHONES connector : -conductor.(d) mm ( ) Ext. SP connectors : -conductor. (d) mm ( ) / Ω (for MAIN and SU) -

6 SETION INSIDE VIEWS - I-0H MAIN AND PLL UNITS * Located under side of the point MAIN unit rystal band pass filter (FI: FL-) TX IF amplifier* (Q: SK) rystal band pass filter (FI: FL-) FM IF I (I: TAFN) D/A converter (I: MGP) AF power amplifier (I: LA) Analog master I* (I0: µp0-0) FM IF I (I0: TAFN) PLL unit DDS gate array (I: S-A) 0 MHz band VO circuit DDS I (I0: S-) Driver I (I: U0F) Reference oscillator (X: R- 0. MHz) DDS gate array (I: S-A) MHz band VO circuit DDS I (I0: S-) -

7 PA UNIT TX/RX switching relay (RL00: AE) Pre-amplifier (Q0: SK) RX balanced mixer (Q, Q: SK0) MHz power amplifier (Q, Q: S) TX balanced mixer Q0, Q0: SK0 D0: SV Varistor-A board DRV board Pre-amplifier (Q0: SK) RX balanced mixer (Q0, Q: S) Varistor- board Varistor- board 0 MHz power amplifier (Q, Q: S0) TX balanced mixer* (Q, Q: SK0) TX double balanced mixer D0: HSWS L0, L: D-00 Drive amplifier (Q: SRFJ0) * Located under side of the point -

8 - UX-0 (OPTIONAL UNIT) TOP VIEW Power supply circuit for AG-00 Q: DTEU Q, Q: S RF pre-amplifier (Q: NE0) Power module I (I: M-0) YGR amplifier (I: µpg) PLL I (I0: T) st LO VO circuit RF amplifier (Q: S) TX st mixer (I: µpt) RX st mixer (I: µp) TX st IF amplifier (I: µp0) RX nd mixer (Q: SK) DDS I (I: S-A) TX nd mixer (D: HSWS) nd LO VO circuit OTTOM VIEW Power supply circuit for AG-00 (Q: SD0) Pre-drive amplifier (Q: SK) Drive amplifier (Q: SK) Divider (I0: TWFU) Reference amplifier (I0: TSU0F) nd IF amplifier (Q: S) -

9 SETION DISASSEMLY AND OPTION INSTRUTIONS Opening the transceiver s case Follow the case and cover opening procedures shown here when you want to install an optional unit or adjust the internal units, etc. q Remove the screws from the top of the transceiver and screws from the sides, then lift up the top cover. w Turn the transceiver upside down. e Remove screws from the bottom of the transceiver, then lift up the bottom cover. Disconnect the speaker cable. AUTION: DISONNET the D power cable from the transceiver before performing any work on the transceiver. Otherwise, there is a danger of electric shock and/or equipment damage. UX-0 00MHz AND UNIT q Remove the bottom cover as shown above. w Remove the antenna plate from the chassis using a standard screw driver. WARNING! NEVER attempt to remove the antenna plate using your finger, this may result in injury. r Place the UX-0 using the supplied screws. E AREFUL not to drop the supplied screws inside the transceiver. e onnect the FF (Flexible Flat able) of the UX-0 to J on the MAIN unit, D power cable to the power connector (W0) from the PA unit and the coaxial cable to J on the PLL unit. AUTION NEVER catch the cables from the optional DSP unit(s) between chassis and the UX-0, this may damage the DSP unit(s) and/or transceiver. UX-0 Antenna plate oaxial cable J PLL unit UX-0 UX-0 J MAIN unit Flexible flat cable D power cable Turn the flexible flat cable up under the UX-0. t Return the bottom cover to its original position. J Power connector Flexible flat cable -

10 Opening the PA unit cover q Remove the top cover as shown in the diagram on p. -. w Remove screws and grounding plate from the PA unit cover. e Remove fastening tape from the inside power cable. r Slide the PA unit cover as shown below. grounding plate FL-/FL- W NARROW FILTER q Remove the bottom cover as shown in the diagram on p. -. Remove the UX-0 if you have installed it. (p. -) w Disconnect the connection cable connectors from J0 and J0 on the MAIN unit. e Remove clips. t Install FL- or FL- to the specified position on the MAIN unit. WARNING! E AREFUL not to pinch your finger with the clip. r Remove screws from the MAIN unit, then lift up the MAIN unit. FL- (MAIN) FL- (SU) PLL unit J0 J0 y Solder then cut the leads, keeping mm (/ ) of the leads from the bottom of the MAIN unit. u Return the MAIN unit and clips to their original positions. i Re-connect the connection cable connector to J0 and J0 on the MAIN unit. o Return the bottom cover to the original position. MAIN unit (MAIN) lips (SU) -

11 UT-0 VOIE SYNTHESIZER UNIT q Remove the bottom cover as shown in the diagram on p. -. Remove the UX-0 if you have installed it. (p. -) w Remove the protective paper attached to the bottom of the UT-0 to expose the adhesive strip. e Plug UT-0 into J0 on the MAIN unit as shown in the diagram at right. r Return the bottom cover to its original position. J0 UT-0 MAIN unit UT-0 DSP UNIT REOMMENDATION: When installing only DSP unit, you can install into either front or rear panel side. However, installing a DSP unit into the front panel side may be easier and also safer. Installing st DSP unit (front panel side) q Remove the bottom cover as shown in the diagram on p. -. Remove the UX-0 if you have installed it. (p. -) w Remove the shielding plate. e Remove the connection cable from J on the MAIN unit. onnect the cable into J on the UT-0. r Plug the connection cable (P) from the UT-0 to J on the MAIN unit. t Plug the flat cable into J on the UT-0 and to J on the MAIN unit. Take care of the conductor direction. Attach the Velcro tape to the UT-0 and PLL unit shielding plate. y Return the shielding plate, top cover and bottom cover to their original positions. Installing nd DSP unit (rear panel side) q Remove the top and bottom cover as shown in the diagram on p. -. Remove the UX-0 if you have installed it. (p. -) w Remove the shielding plate. e Remove the connection cable from J on the MAIN unit. onnect the cable into J on the UT-0. The cable between J on the MAIN and J on the DSP unit, must be set in the groove of the chassis (see diagram below). Otherwise, the cable may be damaged when returning the shield plate to its original position. r Plug the connection cable (P) from the UT-0 to J on the MAIN unit. t Plug the flat cable into J on the UT-0 and to J on the MAIN unit. Take care of the conductor direction. Attach the Velcro tape to the UT-0 and PLL unit shielding plate. y Return the shielding plate, top cover and bottom cover to their original positions. Shielding plate PLL unit Set cable into the groove. Shielding plate J UT-0 J J J J P PLL unit UT-0 J J Take care of the conductor direction. MAIN unit J P Take care of the conductor direction. J MAIN unit -

12 R- HIGH STAILITY RYSTAL UNIT q Remove the bottom cover as shown in the diagram on p. -. Remove the UX-0 if you have installed it. (p. -) w Remove screws from the PLL shield cover, then lift up the PLL shield cover. y Install the R- and solder the leads. u Return the PLL unit, PLL shield cover and bottom cover to their original positions. Original crystal soldering point PLL shield cover R- soldering points e Disconnect the FF (Flexible Flat able) from the DIS- PLAY unit and the connection cable connectors from J0 and J0 on the MAIN unit. r Remove screws from the PLL unit, then lift up the PLL unit. t Unsolder the original reference crystal, then remove it. The original reference crystal unit is soldered at both top and bottom sides of the P (Printed ircuit oard). Unsolder the original crystal. R- Original crystal J0 J0 Flexible flat cable -

13 SETION IRUIT - REEIVER IRUIT Note: [Main]=Main band, [Sub]=Sub band -- VHF TRANSMIT/REEIVE SWITHING IRUIT (PA UNIT) Received signals from the antenna connector (HASSIS; J) are passed through the low-pass filter (L L,, ) then applied to the transmit/receive switching circuit (RL00, D0). The transmit/receive switching circuit leads receive signal to the RF circuit from a low-pass filter while receiving. However, the circuit leads the transmit signal from the RF power amplifier to the antenna connector while transmitting. The passed signals are then applied to the RF amplifier circuit. -- VHF RF IRUIT (PA UNIT) Received signals from transmit/receive switching circuit are applied to the RF amplifier circuit (Q0) via the RF attenuator (D), limiter (D) and tunable band pass filter (D, L0) circuits. The amplified signals are then passed through the another three-stage tunable bandpass filters (D D0, L L) to suppress unwanted signals. The filtered signals are then applied to the st mixer circuit (Q, Q). D0 D employ varactor diodes, which are controlled by the PU (DISPLAY board; I) via the D/A converter (MAIN unit; I) and buffer amplifier (MAIN unit; Id), to track the bandpass filter. These varactor diodes tune the center frequency of an RF pass band for wide bandwidth receiving and good image response rejection. -- VHF ST MIXER IRUIT (PA UNIT) The st mixer circuit converts the received signals into a fixed frequency of the 0 MHz IF signal with a PLL output frequency. y changing the PLL frequency, only the desired frequency will pass through a pair of crystal filters at the next stage of the VHF st mixer. The filtered signals from the bandpass filter are mixed with st LO signals at the mixer circuit (Q, Q) to produce a st IF signal (0. MHz [Main] or 0. MHz [Sub]). The st LO signals (. MHz. MHz) are PLL output frequency, which comes from the VHF VO circuit (PLL unit; Q, D D). The st IF signal is then applied to either the Main or Sub band 0 MHz IF circuit in the MAIN unit via P0 [Main] or P0 [Sub]. -- UHF RF IRUIT (PA UNIT) The received signals from the UHF antenna connector (HASSIS; J) are passed through the low-pass filter (L, L0, ) and then transmit/receive switching circuit (D D, D, D, D). The signals from the transmit/receive switching circuit are applied to the RF amplifier circuit (Q0) via the RF attenuator circuit (D) and tunable bandpass filter (D, L). The amplified signals are passed through the three-stage tunable bandpass filters (D D0, L L0), and are then applied to the st mixer circuit (Q0, Q). -- UHF ST AND ND MIXER IRUIT (PA UNIT) The filtered RF signals from the bandpass filter are mixed with a st LO signal at the st mixer circuit (Q0, Q) to produce a st IF signal (. MHz [Main] or. MHz [Sub]). The st IF signal is passed through a crystal filter (Fl0 [Main], Fl [Sub]) to suppress out-of-band signals. The filtered IF signal is applied to the nd mixer circuit (Q) to produce a 0 MHz IF signal (0. MHz [Main] or 0. MHz [Sub]) with a nd LO signal. The IF signal is then applied to the MAIN unit via P [Main] or P0 [Sub]. The st LO signal (. MHz 0. MHz) is generated at the UHF VO circuit (PLL unit; Q, D D), and a nd LO signal (0. MHz) is produced at the PLL circuit by doubling it s reference frequency (0. MHz). REEIVER ONSTRUTION 0 MHz st mixer Q0, Q PA unit nd mixer Q MAIN unit FI FI I for MAIN band LPF PF PF PF st LO LO MHz st mixer Q, Q st LO ALO PF nd LO LO 0. MHz FI LPF PF PF 0. MHz PF FOM to FM IF I (I0) FI I PF FOM to FM IF I (I) AF signals to AF selector circuit (I) for SU band AF signals to AF selector circuit (I00) -

14 -- 0 MHz IF IRUIT (MAIN UNIT) The 0 MHz IF signal from the mixer circuit is passed through a monolithic filter (Fl [Main], Fl [Sub]) to suppress out-of-band signals. The filtered signal is amplified at the IF amplifier (Q [Main], Q [Sub]). The IF amplifier provides 0 d gain. The amplified signal is then applied to the different circuits depending on the selected mode. () FM mode The signal is applied to an FM IF I pin (I0 [Main] or I [Sub]). () SS and W mode The signal is passed through a 0 MHz IF filter (FI/0. MHz [Main] or Fl/0. MHz [Sub]) or optional W narrow filters. The filtered signal is amplified at the IF amplifiers (Q0 Q [Main] or Q0 Q [Sub]) and then applied to a demodulator circuit. -- DEMODULATOR IRUIT (MAIN UNIT) () FM mode The 0 MHz IF signal from an IF amplifier (Q [Main] or Q [Sub]) is applied to the mixer section of the FM IF I (I0 [Main], I [Sub], pin ), and is mixed with a LO signal (0. MHz [Main], 0. MHz [Sub]) to produce a khz IF signal. The LO signal is generated by the FO circuit (PLL unit; I0 [Main], I0 [Sub]). The FM detector circuit employs the quadrature detection method, which uses a ceramic discriminator (X0 [Main], X [Sub]) for phase delay to obtain a non-adjusting circuit. The detected signals are output from pin, and applied to the squelch control and center indication detector circuits, etc. () SS and W modes The amplified signal from the IF amplifier circuit (Q [Main], Q [Sub]) is applied to the balanced mixer circuit (I [Main], I [Sub]) to demodulate into AF signals. Demodulated audio signals are output from pin, and applied to the squelch control gate (I [Main], I00 [Sub]). FO circuit (PLL unit; I0 [Main] and I0 [Sub]) generates FO signals for using in the balanced mixers. FO frequencies Mode for MAIN band for SU band US LS W 0. MHz 0. MHz 0. MHz 0. MHz 0. MHz 0. MHz -- SQUELH ONTROL IRUIT (MAIN UNIT) The demodulated AF signals from the balanced mixer circuit or FM IF I are applied to the squelch control gate (I [Main], I00 [Sub]). This consists of analog switches which are selected with a mode signal and squelch control signal from the PU (DISPLAY board; I) via the expander I (I). The switched AF signals are applied to the AF circuit. -- SQUELH IRUIT (MAIN UNIT) () FM mode A squelch circuit cuts out AF signals when no RF signal is received or the S-meter signal is lower than the [SQL] control setting level. y detecting noise components in the AF signals, the PU switches the squelch control gate. A portion of the AF signals from the FM IF I pin (I0 [Main], I [Sub]) passes through the active filter section of FM IFI (pin ). The active filter section amplifies and filters noise components. The filtered signals are applied to the noise detector section for conversion into D voltage and output from pin (I0 [Main], I [Sub]) as the NSQM [Main]/NSQS [Sub] signal. The NSQM [Main]/ NSQS [Sub] signal is applied to the DISPLAY board. The D voltages are passed through the analog multiplexer (DISPLAY board; I, pins and ) and then applied to the PU (DISPLAY board; I, pins, ) via the MPY and MPX signal lines. The [SQL] level signal is also applied to the PU via the analog multiplexer (DISPLAY board; I, pins, ) as a reference voltage for comparison with the noise signals. Also, an S-meter signal is applied to the PU from FM IF I pin (I0 [Main], I [Sub]) via the meter amplifier (I0c [Main], I0a [Sub]) and analog multiplexer (DISPLAY board; I, pins and ). The PU compares these signals, then outputs a control signals to the squelch control gate. () SS and W modes The squelch circuit mutes audio output when the S-meter signal is lower than the [SQL] control setting level. A portion of the 0 MHz IF signal from the IF amplifier (Q [Main], Q [Sub]) is converted into D voltage at the AG detector (D0, Q0 [Main], D0 Q0 [Sub]) and amplified at the meter amplifier (I0d [Main] or I0b [Sub]). The amplified signal is passed through the analog multiplexer (DISPLAY board; I, pins and ) via the SMLM [Main]/ SMLS [Sub] signals and then applied to the PU (DISPLAY board; I). The PU outputs control signals to the squelch control gate when the S-meter signal is low level. --0 AF LIFIER IRUIT (MAIN UNIT) The AF amplifier circuit amplifiers the demodulated signals to drive a speaker. For the separate speaker function, a stereo power amplifier is used. AF signals from the squelch control gate are passed through the AF filter (Ia [Main], I00a [Sub]) and AF preamplifier (Ib [Main], I00b [Sub]) and then amplified at the voltage controlled amplifier (VA: I0 [Main], I0 [Sub]) which functions as a volume control using the [AF] control signal. The amplified AF signals are applied to the AF power amplifier circuit (I, pin [Main], pin [Sub]). The amplified audio signals of SU band are output from pin, and are applied to the external speaker jack for the SU band (J) via the [PHONE] jack (JAK board; J). When no plug is connected to the jack, the signals are fed back to the MAIN band audio. The mixed audio is applied to the internal speaker via the [PHONE] jack and external speaker jack for the MAIN band (J). -

15 -- NOISE LANKER IRUIT (MAIN UNIT) The noise blanker circuit detects pulse-type noises, and stops IF amplifier operation during detection. A portion of the 0 MHz IF signal from the bandpass filter (FI [Main], FI [Sub]) is amplified at the noise amplifier circuit (Q0, I0, Q0 [Main], Q0, I0, Q0 [Sub]). The amplified signal is rectified at the noise detector (D [Main], D0 [Sub]) for conversion into D voltage. The D voltage is amplified at the D amplifier circuit (Q0 [Main], Q0 [Sub]) and then applied to the noise blanker control circuit (Q, Q0 [Main], Q, Q0 [Sub]) to stop amplification of the IF amplifier circuit (Q [Main], Q [Sub]). -- AG IRUIT (MAIN UNIT) The AG (Auto Gain ontrol) circuit reduces IF amplifier gain to keep the audio output at a constant level. A portion of the 0 MHz IF signal from the IF amplifier (Q [Main], Q [Sub]) is applied to the AG detector circuit D0 [Main], D0 [Sub]). The detected signal is then amplified at the D amplifier circuit (Q0 [Main], Q0 [Sub]) and then applied to the IF amplifiers (Q, Q, Q [Main], Q, Q, Q [Sub]). When strong signals are received, the detected voltage increases and the output level of the D amplifier, as AG voltage, decreases. The AG voltage is used for the bias voltage for the IF amplifiers, therefore, the IF amplifier gain is decreased. AG response time is controlled by changing the time constant at the AG control line with a resistor and capacitor. While AG is set to slow, the resistor (R [Main], R [Sub]) and capacitor (0 [Main], [Sub]) are connected to the AG control line. While AG is set to fast, R [Main], R [Sub] are connected to the AG control line. Due to Q0 and Q0 [Main]/Q0 and Q0 [Sub] being switched ON that controlled by the AGSM, AGFM [Main], AGSS, AGFS [Sub]. Also, R0 [Main]/R [Sub] is connected to the AG control line due to Q0 [Main]/Q0 being switched ON while scanning for faster response than AG fast mode that controlled by the AGRM [Main], AGRS [Sub]. -- S-METER IRUIT (MAIN UNIT) The S-meter circuit indicates the relative received signal strength while receiving and changes depending on the received signal strength. () FM mode Some of the amplified IF signal is applied to the S-meter detector section in the FM IF I (I0 [Main], I [Sub]) to be converted into D voltage. The converted signal is output from pin and applied to the meter amplifier circuit (I0c [Main], I0a [Sub]). The amplified signal is then applied to the PU (DISPLAY board; I) passing through the analog multiplexer (DISPLAY board; I, pins and ) via the SMLM [Main]/SMLS [Sub] line. The PU then outputs S-meter control signal. () SS and W modes A portion of the AG control signal is applied to the meter amplifier (I0d [Main], I0b [Sub]). The amplified signal is then applied to the PU via the analog multiplexer to control the S-meter. - TRANSMITTER IRUITS -- MIROPHONE LIFIER IRUIT (MAIN UNIT) The microphone amplifier circuit amplifies audio signals from the microphone or A connector and then applies them to the FM modulation or balanced modulator circuit. One microphone amplifier circuit is commonly used for both FM/SS and VHF/UHF. Audio signals from the [MI] connector enter the microphone amplifier I (I0, pin ) and are then amplified at the microphone amplifier or speech compressor section. ompression level is adjusted by the setting mode. The amplified or compressed signals are applied to the VA section of I0. The microphone gain setting from the D/A converter (I, pin ) is applied to the VA control terminal (I0, pin 0). The resulting signals from pin are then applied to the buffer-amplifier (Q) via the analog switch (Ia). External modulation input from the [A] socket (pin ) is also applied to Q. AG IRUIT FOR MAIN AND nd IF signal RFGM (RF/SQL control) 0 V AG det. D0 0 R R R Q0 D0 R SAN R0 Q0 R Q0 FAST SLOW 0 R Q0 0 R 0 R0 R0 I0d + Meter amp. R0 AG line SMLM S-meter signal V -

16 While in SS mode, the amplified signals from the buffer amplifier (Q) are then applied to the balanced modulator (I0). While in AM/FM mode, the amplified signals from the buffer amplifier (Q) are applied to the limiter amplifier (Ib) and splatter filter (Ia). The signals are passed through the buffer amplifier ((Ia) and are then applied to the AM detector (I0d, D) in AM mode or to the varactor diode (D) in FM mode. -- TRANSMIT IF LIFIER IRUIT (MAIN UNIT) The modulated IF signal from a modulation circuit is applied to the IF amplifier circuit (Q). The amplified IF signal is then applied to the VHF/UHF transmit circuit (PA unit) via the VHF /UHF switching circuit (D, D). The gain of the IF amplifier circuit (Q) is controlled by the AL amplifier circuit (I0b). Therefore, the IF amplifier is reduced when the output power increases. -- MODULATION IRUIT (MAIN UNIT) () FM mode The amplified audio signals from I0 are pre-emphasized and limited at Ib and then passed through the splatter filter (Ia). The filtered signals are then applied to the FM modulation circuit (D) via the FM deviation level controller (I0 pins, ) and buffer amplifier (Ia). Also, subaudible tone signals from the PU (DISPLAY board; I pin ) are applied to the FM modulation circuit (D) via the splatter filter (Ia). The FM modulation circuit changes the generating frequency of the FM local oscillator (Q, X) to generate an FM signal. The modulated IF signal is passed through the RF limiter (Q) and then applied to the transmit IF amplifier circuit. When 00 bps mode is selected, audio signals from the A connector bypass the amplifiers and are applied to Ia directly via the external modulation switch (I, pins, ). In such cases, the deviation detector (I0d) cuts off the audio line when over modulation is detected. () SS and W modes The amplified audio signals from Q are mixed with FO signals at the balanced mixer circuit (I0) to produce a 0 MHz IF signal. The mixed signal is still a DS signal, therefore, the mixed signal passes through bandpass filter circuit (FI) to suppress unwanted side band signals. The filtered signal is applied to the transmit IF amplifier circuit Transmit IF frequencies Mode Transmit IF signal US 0. MHz LS 0. MHz W 0. MHz -- W KEYING IRUIT (MAIN UNIT) When the W key is closed, control signal is output from PU (LOGI unit) and controls break-in operation, the side tone signal. Keying signals (DOT and DASH) from the [KEY] jack (J0) are applied to the PU (DISPLAY board; I, pins, respectively), and the PU outputs a W control signal (KDS) from pin. The W control signal is applied to the balanced mixer (I0) via Q0, D0, D0 to unbalance the I0 input bias voltage and creates a carrier signal. R0 determines the transmit delay timing. -- RF IRUIT (PA UNIT) The RF circuit consists of mixer and drive amplifiers to obtain the desired frequency and level needed at a PA circuit, respectively. () VHF band The IF signal from the MAIN unit (P0) is mixed with an LO signal from the VHF VO circuit (PLL unit; Q, D D) at the double-balanced mixer circuit (Q0, Q0, D0) to be converted into VHF transmit frequency. The mixed signal is passed through the attenuator (R R) and two-stage tunable bandpass filter (D0, L and D0, L0) to suppress spurious components. The filtered signals are then amplified at the YGR amplifier (I0) and passed through the attenuator (R R) and another two-stage tunable bandpass filter (D, L and D, L) The amplified and filtered RF signal is applied to the drive amplifier circuit that is used VHF and UHF signals commonly. () UHF band The IF signal from the MAIN unit (P) is mixed with a nd LO signal at the double-balanced mixer circuit (Q, Q) to produce a nd IF signal (. MHz). The nd LO signal (0. MHz) is generated at the reference oscillator and doubler circuit (PLL unit; X, Q) via LO amplifier (I0). The nd IF signal is amplified at the buffer amplifier (Q) via the bandpass filter circuit (L, L,,,,, ). The amplified nd IF signal is applied to the st mixer circuit (D0, L0, L) passing through the attenuator (R R) and low-pass filter (L, L, ). The st mixer circuit (D0, L0, L) converts the nd IF signal into a UHF transmit frequency with a st LO signal from the UHF VO circuit (PLL unit; Q, D D). The converted RF signal is passed through the bandpass filter (FI00 and FI0) where unwanted LO signal emission is reduced. The filtered signal is attenuated at R0 R0 and amplified at the YGR amplifier (I00), and is then applied to the drive amplifier circuit via the band pass filter (FI0) and another YGR amplifier (Q00). -- DRIVE LIFIER IRUIT (PA UNIT) The drive amplifier circuit amplifies RF signals from the VHF or UHF RF circuit to obtain a level needed at the power amplifier circuit. One drive amplifier circuit is commonly used for both VHF and UHF band signals. The signals from the VHF or UHF RF circuit are amplified at the drive amplifier circuit (Q0, Q, Q, DRV board; Q0). The amplified VHF signals are passed through the -

17 low-pass filter and UHF signal are high-pass filter, and then applied to the VHF and UHF power amplifier circuit separately. -- POWER LIFIER IRUIT (PA UNIT) The power amplifier circuit amplifies the RF signals to the specified output power. () VHF power amplifier circuit The RF signal from the low-pass filter circuit is applied to the VHF power amplifier circuit (Q, Q) to obtain a stable 00 W of RF output power. The amplified RF signal is applied to the antenna connector (HASSIS; J) via the power detector (D0, D), transmit/receive switching relay (RL00) and low-pass filter (L L,, ) circuits. () UHF power amplifier circuit The RF signal from the high-pass filter is applied to the UHF power amplifier circuit (Q, Q) to obtain a stable W of RF output power. The amplified RF signal is applied to the antenna connector (HASSIS; J) via the transmit/receive switching circuit (D D), low-pass filter (L, L0, ) and power detector (D0, D) circuits. -- AL IRUIT (PA AND MAIN UNITS) The AL (Automatic Level ontrol) circuit protects the power amplifiers (PA unit; Q, Q for VHF and Q, Q for UHF) from a mismatched output load. Also, the AL circuit controls the gain of the transmit IF amplifier in order for the transceiver to output even when the supplied voltage shifts, etc. The RF power level is detected at the power detector circuit (PA unit; D0 D for VHF, D0, D for UHF) to be converted into D voltages. The detected voltage (VFOR for VHF or UFOR for UHF) is passed through the switching diode, and are then applied to the differential amplifier (MAIN unit; I0b) via the FOR line. A reference voltage (POV) for I0b is controlled by the [RF PWR] control to output reference voltages. The output voltage is applied to the transmit IF amplifier circuit (MAIN unit; Q) as an AL signal to control the amplifier gain. When the VFOR/UFOR voltage increased, the output from the differential amplifier will be decrease to reduce the IF amplifier gain. This adjusts the RF output power until the VFOR/UFOR and POV voltage are well balanced. - PLL IRUITS I-0H contains PLL circuits and local oscillator. The VHF and UHF PLL circuits adopt Icom s original I-loop PLL to obtain very fast lock up times. -- VHF PLL IRUIT (PLL UNIT) The VHF PLL circuit generates the st LO frequency, and the signal is applied to the VHF st mixer circuit in the PA unit as the ALO signal. The PLL circuit consists of a VO, prescaler and DDS circuits. The signal generated at the VHF VO circuit (Q, D D) is amplified at the buffer amplifiers (Q, Q), then applied to the prescaler circuit (I). The prescaler circuit divides the applied signal, and outputs it to the VHF DDS circuit (I) via the buffer amplifier (Q). The VHF DDS circuit generates digital signals using the applied signals as a clock frequency. The phase detector section in I compares its phase with the reference frequency that is generated at the reference oscillator (X). I outputs off-phase components as pulse signals via pins,. The output pulses are converted into D voltage at the loop filter circuit (Ia) and then applied to the VHF VO circuit. The D/A converter (R0 R), low-pass filter (L0 L0, 0 0) and buffer amplifier (I0) circuits are connected to the DDS output to convert the digital oscillated signals into smooth analog signals. -- UHF PLL IRUIT (PLL UNIT) The UHF PLL circuit generates the st LO frequency, and the signal is applied to the UHF st mixer circuit in the PA unit as the LO signal. The PLL circuit consists of a VO, prescaler and DDS circuits. The signal generated at the UHF VO circuit (Q, D D) is amplified at the buffer amplifiers (Q, Q), then applied to the prescaler circuit (I). The prescaler circuit divides the applied signal, and outputs it to the UHF DDS circuit (I) via the buffer amplifier (Q). The D/A converter (R0 R), low-pass filter (L0 L0, 0 ) and buffer amplifier (I0) circuits are connected to the DDS output to convert the digital oscillated signals into smooth analog signals. -- AP IRUIT (MAIN UNIT) The AP (Automatic Power ontrol) circuit protects the power amplifiers on the PA unit from excessive current. urrent drain of power amplifiers is detected by voltage drops at a resistor (PA unit; R0) between V and PAHV lines. The original voltage (IH) and dropped voltage (IL) are applied to the AP differential amplifier (MAIN unit; I0d). The signal output from the differential amplifier reduces IF amplifier gain until these voltages are well-balanced. - UX-0 (00 MHz AND UNIT) UX-0 is an optional 00 MHz band unit for I-0H. This unit covers 0 00 MHz frequency range. -- ANTENNA SWITHING IRUIT (for RX) Received signals from the antenna connector (HASSIS; J0) are applied to the transmit/receive switching circuit (RL). The transmit/receive switching circuit leads receive signal to the RF circuit while receiving. However, the circuit leads the transmit signal from the RF power amplifier to the antenna connector while transmitting. -

18 The passed signals are then applied to the RF amplifier circuit MHz RF IRUIT (for RX) Received signals from the transmit/receive switching circuit are passed through the high-pass filter (L L, L, 00) and pre-amplifier (Q) and are applied to the RF amplifier circuit (Q) via the band pass filter circuit (FI). The amplified signals are then passed through the another bandpass filter (FI) to suppress unwanted signals. The filtered signals are then applied to the st mixer circuit (I) MHz ST/ND MIXER IRUITS (for RX) The st/nd mixer circuits convert the received signals into a fixed frequency of the 0 MHz IF signal with a PLL output frequencies. y changing the PLL frequency, only the desired frequency will pass through a filter at the next stage. The filtered signals from the bandpass filter are mixed with st LO signals at the mixer circuit (I) to produce a st IF signal (. MHz). The st LO signals (.0 MHz 0. MHz) are PLL output frequency, which comes from the st LO VO circuit (Q, Q). The st IF signal is passed through the bandpass filter (FI) to suppress unwanted signals, and then applied to the nd mixer circuit (Q). The applied signal is mixed with nd LO signal coming from the nd LO VO circuit (Q) to produce a 0. MHz [Main], 0. MHz [Sub] nd IF signal. The nd IF signal is passed through the main/sub switching circuit (Q, Q), and then output to the MAIN unit of I-0H via J (pin [Main], pin [Sub]). The amplified signals are passed through the bandpass filter (FI) to suppress spurious components, and are amplified at the pre-drive amplifier (Q, Q) and power module (I) to obtain a stable 0 W of output power. The output signals from the power module (I) are passed through the duplexer circuit (RL) and detector circuits of forwared voltage and refrected voltage, and are then applied to the antenna connector. -- PLL IRUITS UX-0 contains frequency synthesizer circuit. This unit does not have a local oscillator circuit and uses a 0. MHz frequency from I-0H as a reference frequency. The nd LO circuit adopt Icom s original I-loop PLL to obtain Hz pitch fine tuning. The reference frequency from the I-0H via J is amplified at the reference amplifier (I0, Q0) and applied to the LO DDS I (I). A portion of the reference signal is also applied to the divider circuit (I0). The divided signal is applied to the LO PLL circuit (I0). -- LO PLL IRUIT The LO PLL circuit generates the st LO frequency, and the signal is applied to the st mixer circuit as the LO signal. An oscillated signal from the LO VO (Q, Q) passes through the buffer amplifiers (Q, Q) and is applied to the PLL I (I0, pin ) and is prescaled in the PLL I based on the divided ratio (N-data). The reference signal is also applied to the PLL I (I0, pin ). The PLL I detects the out-of-step phase using the reference frequency and outputs it from pin 0. The output signal is passed through the active filter (I0, Q, Q) and is then applied to the LO VO circuit as the lock voltage. -- IF LIFIER IRUIT (for TX) The modulated nd IF signal from I-0H via J is amplified at the nd IF amplifier (Q), and is passed through the low-pass filter (L, L, 0, ) to suppress unwanted signals. The filtered signal is then applied to the nd mixer circuit. The applied signal is mixed at the nd mixer circuit (D, L, L) to converted into the st LO signal with the nd LO signal, which comes from the nd LO VO (Q). Then the st LO signal is passed through the low-pass filter (L, L, ) and amplified at the st IF amplifier (I). The amplified signal is passed through the bandpass filter (FI0) between the attenuators (R0 R0) and (R R), and are then applied to the st mixer circuit (I). The signal is mixed with the st LO signal coming from the st LO VO circuit (Q, Q) to converted into RF signals. -- DRIVE/POWER LIFIER IRUITS (for TX) The RF signals from the st mixer circuit are passed through the bandpass filter (FI) and low-pass filter (L, L, ), and then amplified at the YGR amplifier circuit (I). -- LO PLL IRUIT The LO PLL circuit generates the nd LO frequency, and the signal is applied to the nd mixer circuit as the LO signal. The signal generated at the LO VO circuit (Q) is amplified at the buffer amplifiers (Q, Q), then applied to the prescaler circuit (I). The prescaler circuit divides the applied signal, and outputs it to the DDS circuit (I) via the buffer amplifier (Q). The DDS circuit generates digital signals using the applied signals as a clock frequency. The phase detector section in I compares its phase with the reference frequency from the reference amplifier (I0). I outputs off-phase components as pulse signals via pins,. The output pulses are converted into D voltage at the loop filter circuit (I0a) and then applied to the LO VO circuit. The D/A converter (R R), low-pass filter (L L, ) and buffer amplifier (I) circuits are connected to the DDS output to convert the digital oscillated signals into smooth analog signals. -

19 SETION ADJUSTMENT PROEDURES - PREPARATION EFORE SARVIING REQUIRED TEST EQUIPMENT EQUIPMENT GREDE AND RANGE EQUIPMENT GREDE AND RENGE D power supply Output voltage :. V D Frequency range : Hz Audio generator urrent capacity : 0 A or more Measuring range : 00 mv Measuring range : 0 W Frequency range : MHz Standard signal RF power meter Frequency range : 0 00 MHz Output level : 0. µv mv generator (SSG) (terminated type) Impedance : 0 Ω ( to dm) SWR : Less than. : A millivoltmeter Measuring range : 0 mv 0 V Frequency range : MHz Frequency counter Frequency accuracy : ±0. ppm or better D voltmeter Input impedance : 0 kω/v D or better Sensitivity : 00 mv or better D ammeter Measurement capability: A/0 A RF voltmeter FM deviation meter Distortion meter Oscilloscope Frequency range : MHz Frequency range : At least 0 MHz Measuring range : V Spectram analyzer Spectraum bandwidth : 00 khz or more Frequency range : D 00 MHz Power attenuation : 0 or 0 d Measuring range : 0 to ± khz Attenuator apacity : 0 W or more Frequency range : khz ±0 % Input impedance : Ω Measuring range : 00 % External speaker apacity : W or more Frequency range : D 0 MHz Resistance : 0 and 0 Ω Measuring range : V Terminator apacity : 0 W or more Digital multimeter Imput impeadance : 0 MΩ/D or beter ONNETIONS AUTION! DO NOT transmit while an SSG is connected to the antenna connector. Standard signal generator D power supply Distortion meter Speaker Ammeter to [EXT SP] to [D. V] to the antenna connector AUTION! When [P.] switch is turned ON, D voltage is applied to the antenna connector. This may damege the signal generator. Attenuator FM deviation meter Spectrum analyzer RF power meter TERMINATOR for software adjustment (page -). JIG cable (A). k -conductor. (d) mm (/") Shouten inner and outer plugs. Audio generator,. I-0H JIG cable (). k + V [MI] PTT -

20 - PLL ADJUSTMENTS ADJUSTMENT 0. MHz LEVEL REFERENE FREQUENY M LOK VOLTAGE 0M LOK VOLTAGE MAIN FO LEVEL SU FO LEVEL ADJUSTMENT ONDITION Display frequency: Any Display frequency: Any This adjustment must be performed at minutes later after power ON. Display frequency:.00 MHz Mode : US Display frequency:.000 MHz Display frequency:.0000 MHz Display frequency:.00 MHz Mode : US Display frequency: MHz Display frequency: MHz Display frequency: Any Mode :US Sub display freq. : Any Mode :US ADJUSTMENT MEASUREMENT VALUE POINT UNIT LOATION UNIT ADJUST PLL PLL PLL PLL PLL PLL onnect an RF voltmeter or spectram analyzer to check point J. onnect an RF voltmeter or spectram analyzer to check point P. onnect a frequency counter to check point P. onnect a digital multimeter or oscilloscope to check point P00. onnect an RF voltmeter to check point P. onnect a digital multimeter or oscilloscope to check point P00. onnect an RF voltmeter to check point P. onnect an RF voltmeter to check point P0. onnect an RF voltmeter to check point P0. 0 dm (or more than. dm, when R0 is in maximum position.) Maximum level ( dm to dm) MHz. V 0. V to. V 0 dm to dm. V 0. V to. V dm to 0 dm dm to dm dm to dm PLL PLL PLL PLL PLL PLL R0 Adjust in sequence L, L several times. The trimmer capacitor of X. L Verify Verify 0 Verify Verify Verify Verify - FREQUENY ADJUSTMENT ADJUSTMENT FM TX-LO FREQUENY ADJUSTMENT ONDITION Display frequency: Any MAIN onnect a frequency Mode : FM counter to check Disconnect P0, P0 (PA unit) point P. from J and J on the MAIN unit. Apply no audio signals to [MI] connector. Transmitting After adjustment, connect P0, P0 (PA unit) to J, J on the MAIN. ADJUSTMENT MEASUREMENT VALUE POINT UNIT LOATION UNIT ADJUST MHz MAIN L -

21 PLL AND MAIN UNITS R0 0. MHz level adjustment L M lock voltage adjustment P M LO level check point X Reference frequency adjustment J 0. MHz level check point 0 0M lock voltage adjustment P00 0M lock voltage check point P 0M LO level check point Referemce level adjustment L L P0 Sub FO level check point P00 M lock voltage check point P Reference frequency check point L FM TX-LO frequency adjustment J FM TX-LO J frequency pre-setting P FM TX-LO frequency check point P0 Main FO level check point -

22 - REEIVER ADJUSTMENTS Receiver adjustments must be performed after software adjustment (0) and (). SU band must be OFF when adjusting MAIN band, or main AF volume (max.counter clockwise) and SQL volume (max. clockwise) must be set when adjusting SU band. ADJUSTMENT M REEIVER PEAK/GAIN M PEAK (MAIN AND) M TOTAL GAIN (MAIN AND) M PEAK (SU AND) M TOTAL GAIN (SU AND) ADJUSTMENT ONDITION Display frequency: Any Disconnect P0 (PA unit) from J on the MAIN unit. onnect a standard signal generator to [VHF ANT] connector and set as: Frequency :.0000 MHz Level :. mv* ( 0 dm) Modulation: OFF After adjustment, connect P0 (PA unit) to J on the MAIN unit. Display frequency:.00 MHz Mode : FM onnect an SSG to [VHF ANT] connector and set as: Frequency :.00 MHz Level :. µv* ( dm) Modulation: khz/±.0 khz Dev. Mode : US Set an SSG as : Frequency :. MHz Level : 0. µv* ( dm) Modulation: OFF Display frequency:.00 MHz Mode : US Set an SSG as : Frequency :. MHz Level : mv* ( dm) Modulation: OFF Set an SSG as : Level : OFF Sub display freq. :.00 MHz Mode : FM onnect an SSG to [VHF ANT] connector and set as: Frequency :.00 MHz Level :. µv* ( dm) Modulation: khz/±.0 khz Dev. Mode : US Set an SSG as : Frequency :. MHz Level : 0. µv* ( dm) Modulation: OFF Display frequency:.00 MHz Mode : US Set an SSG as : Frequency :. MHz Level : mv* ( dm) Modulation: OFF Set an SSG as : Level : OFF *This output level of a standard signal generator (SSG) is indicated as SSG s open circuit. MEASUREMENT ADJUSTMENT VALUE POINT UNIT LOATION UNIT ADJUST PA onnect an RF voltmeter Maximum level PA L to check point P0 via the JIG cable (A). Rear panel Rear panel Rear panel Rear panel onnect an distortion meter to [EXT SP] connector with an Ω load. onnect an A millivolt meter to [EXT SP] connector with an Ω load. onnect an A millivolt meter to [EXT SP] connector with an Ω load. onnect an distortion meter to [EXT SP] connector with an Ω load. onnect an A millivolt meter to [EXT SP] connector with an Ω load. onnect an A millivolt meter to [EXT SP] connector with an Ω load. dm Minimum audio distortion level Maximum noise output level.0 V (0 d) 00 mv (0 d of AF level difference as step.) Minimum audio distortion level Maximum noise output level.0 V (0 d) 00 mv (0 d of AF level difference as step.) - MAIN Front panel MAIN MAIN Front panel MAIN R Adjust in sequence L, L several times. L, L, L, L main [AF] volume R0 Adjust in sequence L, L several times. L, L, L, L sub [AF] volume R

23 PA UNIT M receiver peak/gain adjustment R L P0 M receiver peak/gain check point MAIN UNIT M peak adjustment for main band R0 M total gain adjustment for main band M peak adjustment for main band L L L L L L R M total gain adjustment for sub band L L L L L L M peak adjustment for sub band J M receiver peak/gain pre-setting -

24 REEIVER ADJUSTMENTS (continued) ADJUSTMENT 0 M PEAK (MAIN AND) 0 M PEAK (SU AND) 0 M TOTAL GAIN (MAIN AND) NOISE LANKER (MAIN AND) ADJUSTMENT ONDITION Display frequency:.000 MHz Mode : FM onnect a standard signal generator to [UHF ANT] connector and set as: Frequency :.000 MHz Level : µv* ( 0 dm) Modulation: khz/±.0 khz Dev. Sub display freq. :.000 MHz Mode : FM Set an SSG as : Frequency :.000 MHz Level : µv* ( 0 dm) Modulation: khz/±.0 khz Dev. Display frequency:.000 MHz Mode : US Set an SSG as : Frequency :.0 MHz Level : mv* ( dm) Modulation: OFF Set an SSG as : Level : OFF Display frequency:.00 MHz Mode : US [N] : OFF onnect an SSG to [VHF ANT] connector and set as : Frequency :.0 MHz Level :. µv* ( dm) Modulation: OFF and apply following signal to [VHF ANT] connector. 00 msec. ADJUSTMENT MEASUREMENT VALUE POINT UNIT LOATION UNIT ADJUST MAIN MAIN Rear panel MAIN onnect a digital multimeter or oscilloscope to check point P. onnect a digital multimeter or oscilloscope to check point P. onnect an A millivolt meter to [EXT SP] connector with an Ω load. onnect an oscilloscope to check point P0. Maximum voltage Maximum voltage.0 V (0 d) 00 mv (0 d of AF level difference as step.) Maximum noise waveform PA PA Front panel PA MAIN L, L, L, L L0, L main [AF] volume R L0, L0 (SU AND) msec. [N] : ON Set an SSG as : Level :. µv* ( dm) Sub display freq. :.00 MHz Mode : US [N] : OFF Set an SSG as : Level :. µv* ( dm) [N] : ON Set an SSG as : Level :. µv* ( dm) onnect an oscilloscope to check point P0. *This output level of a standard signal generator (SSG) is indicated as SSG s open circuit. The noise must be blanked. Maximum noise waveform The noise must be blanked. Verify L0, L0 Verify -

25 PA UNIT 0M peak adjustment for main band L L L L L L0 0M peak adjustment for sub band R 0M total gain adjustment for main band MAIN UNIT P 0M peak check point for main band P 0M peak check point for sub band P0 Noise blanker check point for main band Noise blanker adjustment for main band L0 L0 L0 L0 P0 Noise blanker check point for sub band Noise blanker adjustment for sub band -

26 - TRANSMITTER ADJUSTMENTS ADJUSTMENT PA UNIT PRESETTING IDLING URRENT (for M) (for 0 M) RF PEAK (for 0 M) (for M) IF PEAK ARRIER SUPPRESSION ADJUSTMENT ONDITION Preset R, R, R0, R0 (PA unit) to max. counter clockwise. Preset R, R, R0 (PA unit) to center position. Preset, (PA unit) to center position as illustration at right. Display frequency: [EUR], [KOR].0000 MHz [USA-], [AUS].0000 MHz Mode : W Transmitting Transmitting Transmitting Display frequency: [EUR], [KOR].0000 MHz [USA-], [AUS] MHz Mode : W Transmitting Display frequency: MHz onnect an SSG to P on the PA unit via the JIG cable (A) and set as: Frequency : 0.0 MHz Level : mv* ( dm) Modulation: OFF Transmitting Set an SSG as: Level : 0. µv* ( dm) Transmitting onnect an SSG to P0 on the PA unit via the JIG cable (A) and set as: Frequency : 0.0 MHz Level : mv* ( dm) Modulation: OFF Display frequency:.0000 MHz Set an SSG as: Level : 0. µv* ( dm) Transmitting Display frequency: Any Mode : US MI gain : enter onnect an audio generator to [MI] connector and set as: Frequency :. khz Level : mvrms Transmitting Display frequency: Any Mode : US Mic gain : Minimum Apply no audio signals to [MI] connector. Transmitting Mode : LS Transmitting Repeat step, step several times. ADJUSTMENT MEASUREMENT VALUE POINT UNIT LOATION UNIT ADJUST PA Rear panel MAIN MAIN onnect an ammeter ( A) between power supply and the I- 0H. onnect an RF power meter to [UHF ANT] connector. onnect an RF power meter to [VHF ANT] connector. onnect an RF voltmeter to check point J via the JIG cable (). onnect a spectrum analyzer to check point J via the JIG cable (). At the point where the TX current increases 0. A. At the point where the TX current increases.0 A as step. At the point where the TX current increases 0. A as step. At the point where the TX current increases.0 A. Maximum output power Maximum output power Maximum level Minimum carrier level PA PA PA MAIN MAIN R R (R) R0 R0 L, L Refer page - software adjustment. L, L R0, R -

27 PA UNIT P0 RF peak pre-setting for M R0 PA unit pre-setting RF peak adjustment for 0M Idling current adjustment for M R R R R0 L L R PA unit pre-setting P RF peak pre-setting for 0M R0 Idling current adjustment for 0M RF peak adjustment for 0M MAIN UNIT R0 R arrier suppression adjustment L L IF peak adjustment -

28 TRANSMITTER ADJUSTMENTS (continued) ADJUSTMENT IF TOTAL GAIN TOTAL GAIN (for M) (for 0 M) Ic AP ADJUSTMENT ONDITION Display frequency: Any Mode : US MI gain : enter Disconnect P0 (PA unit) from J on the MAIN unit. onnect an audio generator to [MI] connector and set as: Frequency :. khz Level : mvrms Transmitting Display frequency: Rear onnect an RF [EUR], [KOR].0000 MHz panel power meter to [VHF [USA-], [AUS].0000 MHz ANT] connector. Mode : US RF power : Maximum MI gain : enter onnect an audio generator to [MI] connector and set as: Frequency :. khz Level : mvrms Transmitting Display frequency: onnect an RF [EUR], [KOR].0000 MHz power meter to [UHF [USA-], [AUS] MHz ANT] connector. Transmitting Display frequency:.0000 MHz Mode : US onnect P (MAIN unit) to. RF power : Maximum Mic gain : enter onnect an audio generator to [MI] connector and set as: Rear panel onnect an ammeter (0A) between power supply and the I- 0H. Frequency :. khz Level : 0 mvrms Transmitting After adjustment, disconnect P (PA unit) from on the MAIN. ADJUSTMENT MEASUREMENT VALUE POINT UNIT LOATION UNIT ADJUST MAIN onnect an RF voltmeter to check point J via the JIG cable (). After adjustment, connect P0 (PA unit) to J on the MAIN. dm 0 W. W A MAIN PA MAIN R R0 R R DRIVE LEVEL Display frequency:.0000 MHz Mode : US RF power : Maximum Mic gain : enter Disconnect P0 (PA unit) from J on the MAIN unit. onnect an audio generator to [MI] connector and set as: Frequency :. khz Level : 0 mvrms Transmitting MAIN onnect an RF voltmeter to check point J via the JIG cable (). Read the RF voltmeter indication. Verify LO LEAK (for M) Mode : W W paddle : OFF onnect a keyer to the [KEY] jack. Key down (transmitting) After adjustment, connect P0 (PA unit) to J on the MAIN. LO leak must be performed after software adjustment () TX POWER/METER. Display frequency: [EUR], [KOR].0000 MHz [USA-], [AUS].0000 MHz Mode : US RF power : Minimum MI gain : enter Transmitting Rear panel onnect an RF power meter to [VHF ANT] connector. Same level as step Minimum output power MAIN PA R0 R0-0

29 MAIN UNIT R0 Drive level adjustment P I AP pre-setting R I AP adjustment R IF total gain adjustment J IF total gain /Drive level check point PA UNIT P0 IF total gain /Drive level pre-setting R0 Total gain adjustment for M R0 LO leak adjustment for M R Total gain adjustment for 0M -