PT W/CH Stereo Filter-free Class-D Audio Power Amplifier

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Alexander Moody
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1 GENERAL DESCRIPTION The is a dual.0w high efficiency filterless class D audio power amplifier in a 4mm 4mm QFN-6 and SMD-6 or SOP6 package that requires only five external components. The uses Class D architecture, the device delivers up to.0w while offering up to 80% efficiency. The offers a spread-spectrum PWM modulation scheme that reduces EMI-radiated emissions due to the modulation frequency. The device utilizes a fully differential architecture, a full bridged output, and comprehensive click-and-pop suppression. The features high 60dB PSRR, low 0.% THD+N. Thermal-overload protection prevents the device from being damaged during a fault condition. The is ideal for cellular handsets and PDA applications. FEATURES.0 W/Ch into 4 Ω at V, THD<0% Selectable Gain of 6,, 8, and 4 db 6mA Quiescent Current 0.µA Shutdown Current Spread-Spectrum PWM Modulation Only Five External Components Thermal Protection Space Saving Packages: SMD6 QFN6,SOP6 APPLICATIONS Wireless or Cellular Handsets Portable DVD Notebook PC Portable Radio Portable Gaming Educational Toys USB Speakers ORDERING INFORMATION PACKAGE TEMPERATURE ORDERING PART RANGE NUMBER QFN6 o C to 8 o C EQFN SOP6 o C to 8 o C ESOP Note: xxxxxx Assembly Factory Code Lot Number TRANSPORMEDIA Tape and Reel 000units Tape and Reel 00units MARKING xxxxxx xxxxxx TYPICAL APPLICATION CIRCUIT PIN ASSIGNMEN INL INR C INL C INL C INR C INR SDL SDR G0 G PVDD AVDD PGND AGND To Battery C S 0uF note INL+ INL- INR+ INR- OUTL+ OUTL- OUTR+ OULR- U AGND AVDD INR+ G0 INR- INL- INL+ G SDR OUTR+ OUTR- PGND PVDD OUTL- OUTL+ SDL Shutdown Control Gain Control SOP6 (Top View) China Resources Powtech (Shanghai) Limited Page _DS Rev EN_.4

2 PIN ASSIGNMEN OUTR AGND 4 7 SDL SDR 6 G AVDD 6 INL+ 3 4 INR+ OULR+ G0 INR- INL- PGND PVDD OUTL+ A A A3 A4 INL+ PVDD OUTL+ OUTL- OUTL- B INL- G SDR SDL C INR- G0 AGND PGND D INR+ AVDD OUTR+ OUTR - QFN6 (4x4 mm) Top View SMD6 Top View PIN DESCRIPTIONS QFN6 SMD6 SOP6 NAME DESCRIPTION D 3 INR+ Right channel positive input 3 C INR- Right channel negative input A 7 INL+ Left channel positive input 4 B 6 INL- Left channel negative input B3 6 SDR Right channel shutdown terminal (shutdown at low) 7 B4 9 SDL Left channel shutdown terminal (shutdown at low) C 4 G0 Gain select (LSB) 6 B 8 G Gain select (MSB) 0 A PVDD Power supply (Must be same voltage as AVDD) 6 D AVDD Analog supply (Must be same voltage as PVDD) C4 3 PGND Power ground 4 C3 AGND Analog ground 3 D3 OUTR+ Right channel positive differential output D4 4 OUTR- Right channel negative differential output 8 A3 0 OUTL+ Left channel positive differential output 9 A4 OUTL- Left channel negative differential output Thermal Pad Connect the thermal pad of QFN package to PCB GND China Resources Powtech (Shanghai) Limited Page _DS Rev EN_.4

3 PAD ASSIGNMENT A A B B B3 B4 C C D D D3 D4 E E E3 F F G G G3 G4 G PAD DESCRIPTIONS PADS NAMES POSITION DESCRIPTION A, A PGND (-98,883), (-8,883) Power ground B, B OUTR- (-84,743), (-76,743) Right channel negative differential output B3, B4 OUTL- (76,743), (84,743) Left channel negative differential output C, C PVDD (,473), (-00,473) Power supply (Must be same voltage as AVDD) D, D OUTR+ (-84,80), (-76,80) Right channel positive differential output D3, D4 OUTL+ (76,80), (84,80) Left channel positive differential output E SDR (-86,-) Right channel shutdown terminal (High = Enable, Low = Shutdown) E AGND (-9,-0) Analog ground E3 SDL (86,-) Left channel shutdown terminal ( High = Enable, Low = Shutdown ) F AVDD (-863,-44) Analog supply (Must be same voltage as PVDD) F G (863,-36) Gain select (MSB) G INR+ (-64,-863) Right channel positive input G G0 (-3,-863) Gain select (LSB) G3 INR- (-73,-863) Right channel negative input G4 INL- (40,-863) Left channel negative input G INL+ (67,-863) Left channel positive input China Resources Powtech (Shanghai) Limited Page 3 _DS Rev EN_.4

4 ABSOLUTE MAXIMUM RATINGS (NOTE) SYMBOL PARAMETER VALUE UNIT V DD Supply Voltage -0.3 ~ 6.0 V V IN Input Voltage -0.3 ~ V DD.3 V T STG Storage Temperature -6 ~ o C P DMAX Continuous Power Dissipation (Note) Internally Limited W T J Operating Junction Temperature ~ PTR Thermal Resistance, SMD6: θ JA (Note 3) 00 PTR Thermal Resistance, QFN6(4x4): θ JA 60 PTR3 Thermal Resistance, SOP6: θ JA 90 o C o C / W o C / W o C / W T Solder Solder Temperature 3 o C, 0s ESD Susceptibility (Note 4) KV RECOMMENDED OPERATING RANGE(Note ) SYMBOL PARAMETER VALUE UNIT V DD Supply voltage AVDD, PVDD.~ V V IH High-level input voltage SDL, SDR, G0, G.4~V DD V V IL Low-level input voltage SDL, SDR, G0, G 0~0.4 V T A Operating free-air temperature ~8 C Note : Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Recommended Note : The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θja, and the ambient temperature TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA)/ θja or the number given in Absolute Maximum Ratings, whichever is lower. Note 3: All bumps have the thermal resistance and contribute equally when used to lower thermal resistance. All bumps must connected to achieve specified thermal resistance Note 4: Human body model, 00pF discharged through a.kω resistor. Note : Operating Range indicates conditions for which the device is functional, but do not guarantee specific performance limits. ELECTRICAL CHARACTERISTICS (Note 6, Note 7) SYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNIT V OS IQ Output offset voltage (measured differentially) Supply current Inputs ac grounded, AV = 6dB, V DD =. to.v mv V DD =.V, No load 6 9 V DD = 3.6V, No load 7. V DD =.V, No load 4 6 I SD Shutdown current. µa R DS(on) Static drain-source on-state resistance V DD =.V 700 V DD = 3.6V 70 V DD =.V 00 ma mω China Resources Powtech (Shanghai) Limited Page 4 _DS Rev EN_.4

5 ELECTRICAL CHARACTERISTICS (continued) SYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNIT f SW Switching frequency V DD =.V to.v khz G0, G = 0.3V Closed-loop voltage G0 = V DD, G = 0.3V.. gain G0 = 0.3V, G = V DD db G0, G = V DD V DD =.0V, f = khz,. THD = 0% R L = 8Ω V DD = 3.6V, f = khz, Output power 0.8 PO THD = 0% (per channel) V DD =.0V, f = khz, R L = 4Ω.0 THD = 0% W P O = W, V DD = V, AV = 6dB, 0.4 THD+N Total harmonic f = khz % distortion plus noise P O = 0.W, V DD = V, AV = 6dB, 0. f = khz % Xtalk Channel crosstalk P O = 0. W, f = khz db PSRR Supply ripple V DD = V, AV = 6dB, f = 7Hz rejection ratio V DD = 3.6V, AV = 6dB, f = 7Hz db CMRR Common mode V DD = 3.6V, VIC = Vpp, rejection ratio f = 7Hz db Av = 6dB 8. Input impedance Av = db 7.76 Av = 8dB. kω Av = 4dB.89 Start-up time from shutdown V DD = 3.6V. ms SNR Signal to Noise Ratio V DD = V, P O = W 90 db V DD = 3.6V, f = 0 to 0 khz, No weighting 80 en Output voltage noise Inputs are ac µv grounded, AV = 6dB A weighting 0 Note 6: Electrical Characteristics state DC and AC electrical specifications under particular test conditions which guarantee specific performance limits. This assumes that the device is within the Operating Range. Specifications are not guaranteed for parameters where no limit is given, however, the typical value is a good indication of device performance. Note 7: Bypass capacitor Cs can t be smaller than 0uF and closes to the chip to prevent the vdd s glitch from exceeding 6.V. Selecting 080 or larger volume package type s capacitor is preferable. China Resources Powtech (Shanghai) Limited Page _DS Rev EN_.4

6 TYPICAL PERFORMANCE CHARACTERISTICS -0-0 V DD = V R L =8 ohm A V =6 db CMRR vs Freqency -0-0 V DD =. V R L =8 ohm A V =6 db CMRR vs Freqency CMRR (db) -0 CMRR (db) k k k 0k 0k k k k 0k 0k -0-0 V DD =3.6 V R L =8 ohm A V =6 db CMRR vs Freqency -0-0 Crosstalk vs Frequency V DD = V CMRR (db) -0 Crosstalk (db) -0 R to L L to R k k k 0k 0k k k k 0k 0k Crosstalk (db) L to R Crosstalk vs Frequency V DD = V R to L Crosstalk (db) Crosstalk vs Frequency V DD =. V L to R R to L k k k 0k 0k k k k 0k 0k China Resources Powtech (Shanghai) Limited Page 6 _DS Rev EN_.4

7 Crosstalk vs Frequency Crosstalk vs Frequency -0-0 V DD =. V -0-0 Crosstalk (db) -0 Crosstalk (db) -0 R to L L to R R to L L to R k k k 0k 0k k k k 0k 0k Crosstalk vs Frequency PSRR vs Frequency V DD = V Crosstalk (db) -0 R to L L to R PSRR (db) k k k 0k 0k k k k 0k 0k PSRR vs Frequency PSRR vs Frequency -0-0 V DD = V -0-0 V DD =.7 V PSRR (db) -0 PSRR (db) k k k 0k 0k k k k 0k 0k China Resources Powtech (Shanghai) Limited Page 7 _DS Rev EN_.4

8 PSRR vs Frequency PSRR vs Frequency -0-0 V DD =.7 V -0-0 PSRR (db) -0 PSRR (db) k k k 0k 0k k k k 0k 0k PSRR (db) PSRR vs Frequency V DD = V P O = 0mW k k k 0k 0k k k k 0k 0k V DD = V P O = 00mW V DD = V P O = 380mW k k k 0k 0k k k k 0k 0k China Resources Powtech (Shanghai) Limited Page 8 _DS Rev EN_.4

9 V DD = V P O = 77mW V DD =. V P O = 0mW k k k 0k 0k k k k 0k 0k V DD =. V P O = 40mW V DD =. V P O = 90mW k k k 0k 0k k k k 0k 0k V DD =. V P O = 80mW P O = 7mW k k k 0k 0k k k k 0k 0k China Resources Powtech (Shanghai) Limited Page 9 _DS Rev EN_.4

10 V DD = V P O = 0mW P O = 90mW k k k 0k 0k k k k 0k 0k P O = 37mW V DD = V f = k Hz THD+N vs Output Power k k k 0k 0k V DD = V f = k Hz THD+N vs Output Power V DD = V f = k Hz A V = 4 db THD+N vs Output Power China Resources Powtech (Shanghai) Limited Page 0 _DS Rev EN_.4

11 V DD = V f = k Hz A V = 4 db THD+N vs Output Power V DD =. V f = k Hz THD+N vs Output Power V DD =. V f = k Hz THD+N vs Output Power V DD =. V f = k Hz A V = 4 db THD+N vs Output Power V DD =. V f = k Hz A V = 4 db THD+N vs Output Power f = k Hz THD+N vs Output Power China Resources Powtech (Shanghai) Limited Page _DS Rev EN_.4

12 f = k Hz THD+N vs. Output Power f = k Hz A V = 4 db THD+N vs. Output Power f = k Hz A V = 4 db THD+N vs. Output Power Efficiency (%) V DD =. V Output Power vs Efficiency V DD = V Output Power (W) Efficiency (%) V DD =. V Output Power vs Efficiency V DD = V Output Power (W) Supply Voltage vs Output Power R L = 8 ohm SDL = High THD+N < 0% SDR = Low THD+N < % Output Power (W) Supply Voltage (V) China Resources Powtech (Shanghai) Limited Page _DS Rev EN_.4

13 Output Power (W) R L = 8 ohm SDL = High SDR = High Supply Voltage vs Output Power THD+N < 0% THD+N < % Output Power (W).4 R L = 4 ohm SDL = High SDR = Low Supply Voltage vs Output Power THD+N < 0% THD+N < % Supply Voltage (V) Supply Voltage (V) Output Power (W).4 R L = 4 ohm SDL = High SDR = High Supply Voltage vs Output Power THD+N < 0% THD+N < % Supply Current (ma) V DD =. V Supply Current vs Output Power V DD = V Supply Voltage (V) Output Power (W) Supply Current (ma) V DD =. V Supply Current vs Output Power V DD = V Output Power (W) Quiescent current (ma) Quiescent current vs Supply Voltage R L = 4 ohm, 33u H R L = no load Supply Voltage (V) China Resources Powtech (Shanghai) Limited Page 3 _DS Rev EN_.4

14 Block Diagram Protection Circuity VDD To Battery Cs Left Input INL+ Gain Adjust PWM H- Bridge OUTL+ INL- OUTL- Internal Oscillator GND Right Input OULR- INR- INR+ Gain Adjust PWM H- Bridge OUTR+ G0 G 300K 300K Bias Circuity SDL SDR APPLICATION INFORMATION To Battery To Battery 4. 7 uf 0 uf 0. uf 4. 7 uf 0 uf 0. uf Left Differential Input Right Differential Input 0.uF 0. uf 0.uF 0. uf PVDD INL + INL - INR + INR - AVDD OUTL+ OUTL- OUTR+ OULR- Left Single - ended Input Right Single - ended Input 0.uF 0.uF 0. uf 0.uF PVDD INL + INL - INR + INR - AVDD OUTL+ OUTL- OUTR+ OULR- SDL SDR PGND AGND G 0 G SDL SDR PGND AGND G 0 G PT 36 Application Schematic with Differential input and input Capacitors PT 36 Application Schematic with Single - Ended input Capacitors China Resources Powtech (Shanghai) Limited Page 4 _DS Rev EN_.4

15 DECOUPLING CAPACITOR (C S ) The is a high-performance Class-D audio amplifier that requires adequate power supply decoupling to ensure the efficiency is high and total harmonic distortion (THD) is low. For higher frequency transients, spikes, or digital hash on the line a good low equivalent-series-resistance (ESR) ceramic capacitor or tantalum capacitor, typically 0µF, placed as close as possible to the device PV DD lead works best. Placing this decoupling capacitor close to the is important for the efficiency of the Class-D amplifier, because any resistance or inductance in the trace between the device and the capacitor can cause a loss in efficiency. For filtering lower-frequency noise signals, a 0µF or greater 080 capacitor placed near the audio power amplifier would also help. INPUT CAPACITORS (CI) The does not require input coupling capacitors if the design uses a differential source that is biased from 0. V to VDD -0.8 V. If the input signal is not biased within the recommended common-mode input range, if high pass filtering is needed (see Figure above), or if using a single-ended source (see Figure above), input coupling capacitors CI are required. The input capacitors and input resistors R I form a high-pass filter with the corner frequency, fc, determined in Equation. f c = () πr C I The value of the input capacitor is important to consider as it directly affects the bass (low frequency) performance of the circuit. Speakers in wireless phones cannot usually respond well to low frequencies, so the corner frequency can be set to block low frequencies in this application. Not using input capacitors can increase output offset. Equation is used to solve for the input coupling capacitance. C I = () πr f I c If the corner frequency is within the audio band, the capacitors should have a tolerance of ±0% or better, I because any mismatch in capacitance causes an impedance mismatch at the corner frequency and below. COMPONENT LOCATION Place all the external components very close to the. Placing the decoupling capacitor, C S, close to the is important for the efficiency of the Class-D amplifier. Any resistance or inductance in the trace between the device and the capacitor can cause a loss in efficiency. PCB LAYOUT CONSIDERATIONS As output power increases, interconnect resistance (PCB traces and wires) between the amplifier, load and power supply create a voltage drop. The voltage loss on the traces between the and the load results is lower output power and decreased efficiency. Higher trace resistance between the supply and the has the same effect as a poorly regulated supply, increase ripple on the supply line also reducing the peak output power. The effects of residual trace resistance increases as output current increases due to higher output power, decreased load impedance or both. To maintain the highest output voltage swing and corresponding peak output power, the PCB traces that connect the output pins to the load and the supply pins to the power supply should be as wide as possible to minimize trace resistance. The use of power and ground planes will give the best THD+N performance. While reducing trace resistance, the use of power planes also creates parasite capacitors that help to filter the power supply line. The inductive nature of the transducer load can also result in overshoot on one or both edges, clamped by the parasitic diodes to GND and V DD in each case. From an EMI standpoint, this is an aggressive waveform that can radiate or conduct to other components in the system and cause interference. It is essential to keep the power and output traces short and well shielded if possible. Use of ground planes, beads, and micro-strip layout techniques are all useful in preventing unwanted interference. As the distance from the and the speaker increase, the amount of EMI radiation will increase China Resources Powtech (Shanghai) Limited Page _DS Rev EN_.4

16 since the output wires or traces acting as antenna become more efficient with length. What is acceptable EMI is highly application specific. Ferrite chip inductors placed close to the may be needed to reduce EMI radiation. The value of the ferrite chip is very application specific. WHEN TO USE AN OUTPUT FILTER Design the without an output filter if the traces from amplifier to speaker are short. Wireless handsets and PDAs are great applications for class-d without a filter. greater than MHz. This is good for circuits that just have to pass FCC and CE because FCC and CE only test radiated emissions greater than 30 MHz. If choosing a ferrite bead, choose one with high impedance at high frequencies, but very low impedance at low frequencies. Use an LC output filter if there are low-frequency (< MHz) EMI-sensitive circuits and/or there are long leads from amplifier to speaker. OUT+ A ferrite bead filter often can be used if the design is failing radiated emissions without an LC filter, and the frequency-sensitive circuit is IN+ IN- OUT- Ferrite Chip Bead nf Ferrite Chip Bead nf Ferrite Chip Bead Filter IN+ OUT+ 33uH uf IN- OUT- 33uH uf Typical LC Output Filter, Cut-Off Frequency of 7k Hz China Resources Powtech (Shanghai) Limited Page 6 _DS Rev EN_.4

17 PACKAGE INFORMATION QFN6 (4X4): E N e L D L E N9 D N Top View N6 N3 Bottom View A b Side View A SYMBOL MILLIMETERS INCHES MIN MAX MIN MAX A A D E D.300 REF REF. E.300 REF REF. b e 0.60 BSC BSC. L L China Resources Powtech (Shanghai) Limited Page 7 _DS Rev EN_.4

18 PACKAGE INFORMATION SMD6 (X) China Resources Powtech (Shanghai) Limited Page 8 _DS Rev EN_.4

19 PACKAGE INFORMATION SOP6 SYMBOL MILLIMETER MIN NOM MAX A A A A b b c c D E E e.7 BSC L L.0BSC θ 0-8 China Resources Powtech (Shanghai) Limited Page 9 _DS Rev EN_.4

PT5108. High-PSRR 500mA LDO GENERAL DESCRIPTION FEATURES APPLICATIONS TYPICAL APPLICATIONS. Ripple Rejection vs Frequency. Ripple Rejection (db)

PT5108. High-PSRR 500mA LDO GENERAL DESCRIPTION FEATURES APPLICATIONS TYPICAL APPLICATIONS. Ripple Rejection vs Frequency. Ripple Rejection (db) GENERAL DESCRIPTION The PT5108 is a low-dropout voltage regulator designed for portable applications that require both low noise performance and board space. Its PSRR at 1kHz is better than 70dB. The PT5108