MC74HC86A. Quad 2 Input Exclusive OR Gate. High Performance Silicon Gate CMOS
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1 Quad 2 Input Exclusive OR Gate High Performance Silicon Gate CMOS The MC4HC86A is identical in pinout to the S86. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with STT outputs. Features Output Drive Capability: 0 STT oads Outputs Directly Interface to CMOS, NMOS, and TT Operating oltage Range: 2.0 to 6.0 ow Input Current: A High Noise Immunity Characteristic of CMOS Devices In Compliance with JEDEC Standard No. A Requirements Chip Complexity: 56 FETs or 4 Equivalent Gates Pb Free Packages are Available PDIP 4 N SUFFIX CASE SOIC 4 D SUFFIX CASE 5A MARKING DIAGRAMS MC4HC86AN AWYYWWG HC86AG AWYWW 4 TSSOP 4 DT SUFFIX CASE 948G 4 HC 86A AYW 4 4 SOEIAJ 4 F SUFFIX CASE 965 4HC86A AYWG A = Assembly ocation, W = Wafer ot Y, YY = Year W, WW = Work Week G or = Pb Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. Semiconductor Components Industries, C, 2006 October, 2006 Rev. 4 Publication Order Number: MC4HC86A/D
2 PIN ASSIGNMENT OGIC DIAGRAM A B CC B4 A B 2 3 Y Y A2 B A4 Y4 B3 A2 B Y2 Y2 GND A3 Y3 A3 B Y3 FUNCTION TABE Inputs A B H H H H Output Y H H 2 A4 3 B4 Y = A B = AB + AB PIN 4 = CC PIN = GND Y4 ORDERING INFORMATION MC4HC86AN MC4HC86ANG Device Package Shipping PDIP 4 PDIP 4 25 Units / Rail MC4HC86AD MC4HC86ADG MC4HC86ADR2 MC4HC86ADR2G MC4HC86ADTR2 MC4HC86ADTR2G MC4HC86AF MC4HC86AFG SOIC 4 SOIC 4 SOIC 4 SOIC 4 TSSOP 4* TSSOP 4* SOEIAJ 4 SOEIAJ 4 55 Units / Rail 2500 / Tape & Reel 50 Units / Rail MC4HC86AFE MC4HC86AFEG SOEIAJ 4 SOEIAJ / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD80/D. *This package is inherently Pb Free. 2
3 MAXIMUM RATINGS SymbolÎÎ Parameter Î alue Unit CC ÎÎ DC Supply oltage (Referenced to GND) Î 0.5 to +.0 in ÎÎ DC Input oltage (Referenced to GND) Î 0.5 to CC out ÎÎ DC Output oltage (Referenced to GND) Î 0.5 to CC I in DC Input Current, per Pin ± 20 ma I out DC Output Current, per Pin ± 25 ma I CC DC Supply Current, CC and GND Pins ± 50 ma P D Power Dissipation in Still Air, Plastic DIP 50 mw ÎÎ SOIC Package Î 500 TSSOP Package 450 T stg Storage Temperature 65 to + 50 C T ead Temperature, mm from Case for 0 Seconds C (Plastic DIP, SOIC or TSSOP Package) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Derating Plastic DIP: 0 mw/ C from 65 to 25 C SOIC Package: mw/ C from 65 to 25 C TSSOP Package: 6. mw/ C from 65 to 25 C For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High Speed CMOS Data Book (D29/D). RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit CC DC Supply oltage (Referenced to GND) in, out DC Input oltage, Output oltage (Referenced to ÎÎ GND) 0 CC T A ÎÎ Operating Temperature, All Package Types C t r, t f ÎÎ Input Rise and Fall Time CC = 2.0 (Figure ) Î CC = ns CC = 6.0 DC EECTRICA CHARACTERISTICS (oltages Referenced to GND) Guaranteed imit CC 55 to Symbol Parameter Test Conditions 25 C 85 C 25 C Unit Î IH Minimum High evel Input Î oltage Î out = 0. or CC I out 20 A Î I Maximum ow evel Input Î oltage Î out = 0. or CC I out 20 A Î OH Î Minimum High evel Output Î in = IH or I ÎÎ oltage Î I out 20 A Î in = IH or I I out 2.4 ma I out 4.0 ma I out 5.2 ma Î O Maximum ow evel Output Î oltage Î in = IH or I I out 20 A in = IH or I I out 2.4 ma I out 4.0 ma I out 5.2 ma This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation, in and out should be constrained to the range GND ( in or out ) CC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or CC ). Unused outputs must be left open. 3
4 DC EECTRICA CHARACTERISTICS (oltages Referenced to GND) Guaranteed imit CC 55 to Symbol Parameter Test Conditions 25 C 85 C 25 C Î Unit I in Maximum Input eakage Current in = CC or GND 6.0 ± 0. ±.0 ±.0 A I CC Maximum Quiescent Supply Î Î in = CC or GND ÎÎ 0 40 A Current (per Package) I out = 0 A NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High Speed CMOS Data Book (D29/D). AC EECTRICA CHARACTERISTICS (C = 50 pf, Input t, = t f = 6 ns) Guaranteed imit CC 55 to ÎÎ Symbol Parameter 25 C 85 C 25 C Unit t PH, Î Maximum Propagation Delay, Input A or B to Output Y ns t PH Î (Figures and 2) t TH, Î Maximum Output Transition Time, Any Output ns t TH (Figures and 2) ÎÎ C in Î Maximum Input Capacitance pf. For propagation delays with loads other than 50 pf, see Chapter 2 of the ON Semiconductor High Speed CMOS Data Book (D29/D). 2. Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High Speed CMOS Data Book (D29/D). 25 C, CC = 5.0 C PD Power Dissipation Capacitance (Per Gate)* 33 pf * Used to determine the no load dynamic power consumption: P D = C PD 2 CC f + I CC CC. For load considerations, see Chapter 2 of the ON Semiconductor High Speed CMOS Data Book (D29/D). t r t f INPUT A OR B 90% 50% 0% CC GND TEST POINT t PH OUTPUT Y 90% 50% 0% t PH DEICE UNDER TEST OUTPUT C * t TH Figure. Switching Waveforms t TH *Includes all probe and jig capacitance Figure 2. Test Circuit A Y B Figure 3. Expanded ogic Diagram (/4 of Device) 4
5 PACKAGE DIMENSIONS PDIP 4 CASE ISSUE P 4 8 B. DIMENSIONING AND TOERANCING PER ANSI Y4.5M, CONTROING DIMENSION: INCH. 3. DIMENSION TO CENTER OF EADS WHEN FORMED PARAE. 4. DIMENSION B DOES NOT INCUDE MOD FASH. 5. ROUNDED CORNERS OPTIONA. T N SEATING PANE A INCHES MIIMETERS DIM MIN MAX MIN MAX A B F C D C F G 0.00 BSC 2.54 BSC H J K K J M 0 0 H G D 4 P M N (0.005) M 5
6 PACKAGE DIMENSIONS SOIC 4 CASE 5A 03 ISSUE H T SEATING PANE G A 4 8 D 4 P B K P P C 0.25 (0.00) M T B S A S 0.25 (0.00) M B M. DIMENSIONING AND TOERANCING PER ANSI Y4.5M, CONTROING DIMENSION: MIIMETER. 3. DIMENSIONS A AND B DO NOT INCUDE MOD PROTRUSION. 4. MAXIMUM MOD PROTRUSION 0.5 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCUDE DAMBAR PROTRUSION. AOWABE DAMBAR PROTRUSION SHA BE 0.2 (0.005) TOTA IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIA CONDITION. MIIMETERS INCHES R X 45 F DIM MIN MAX MIN MAX A B C D M J F G.2 BSC BSC J K M 0 0 P R SODERING FOOTPRINT* 4X 0.58 X.04 4X.52.2 PITCH DIMENSIONS: MIIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SODERRM/D. 6
7 PACKAGE DIMENSIONS TSSOP 4 CASE 948G 0 ISSUE B 0.5 (0.006) T 0.5 (0.006) T 0.0 (0.004) T SEATING PANE U U S 2X /2 PIN IDENT. S D C 4 4X K REF 0.0 (0.004) M T U S S N (0.00) M B U A G H N J J F DETAI E K K ÇÇÇ ÇÇÇ ÉÉÉ SECTION N N DETAI E. DIMENSIONING AND TOERANCING PER ANSI Y4.5M, CONTROING DIMENSION: MIIMETER. 3. DIMENSION A DOES NOT INCUDE MOD FASH, PROTRUSIONS OR GATE BURRS. MOD FASH OR GATE BURRS SHA NOT EXCEED 0.5 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCUDE INTEREAD FASH OR PROTRUSION. INTEREAD FASH OR PROTRUSION SHA NOT EXCEED 0.25 (0.00) PER SIDE. 5. DIMENSION K DOES NOT INCUDE DAMBAR PROTRUSION. AOWABE DAMBAR PROTRUSION SHA BE 0.08 (0.003) TOTA IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIA CONDITION. 6. TERMINA NUMBERS ARE SHOWN FOR REFERENCE ONY.. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PANE W. MIIMETERS INCHES DIM MIN MAX MIN MAX A B C D F G 0.65 BSC BSC H J J W K K BSC BSC M SODERING FOOTPRINT* PITCH 4X X.26 DIMENSIONS: MIIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SODERRM/D.
8 PACKAGE DIMENSIONS SOEIAJ 4 CASE ISSUE A E 4 8 Q E H E M Z DETAI P D IEW P e A c b A 0.3 (0.005) M 0.0 (0.004) М. DIMENSIONING AND TOERANCING PER ANSI Y4.5M, 982. М 2. CONTROING DIMENSION: MIIMETER. М 3. DIMENSIONS D AND E DO NOT INCUDE MOD FASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING INE. MOD FASH OR PROTRUSIONS SHA NOT EXCEED 0.5 (0.006) PER SIDE. М 4. TERMINA NUMBERS ARE SHOWN FOR REFERENCE ONY. М 5. THE EAD WIDTH DIMENSION (b) DOES NOT INCUDE DAMBAR PROTRUSION. AOWABE DAMBAR PROTRUSION SHA BE 0.08 (0.003) TOTA IN EXCESS OF THE EAD WIDTH DIMENSION AT MAXIMUM MATERIA CONDITION. DAMBAR CANNOT BE OCATED ON THE OWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT EAD TO BE 0.46 ( 0.08). MIIMETERS INCHES DIM MIN MAX MIN MAX A A b c D E e.2 BSC BSC H E E M Q Z ON Semiconductor and are registered trademarks of Semiconductor Components Industries, C (SCIC). SCIC reserves the right to make changes without further notice to any products herein. SCIC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCIC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCIC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCIC does not convey any license under its patent rights nor the rights of others. SCIC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCIC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCIC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCIC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCIC was negligent regarding the design or manufacture of the part. SCIC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBICATION ORDERING INFORMATION ITERATURE FUFIMENT: iterature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 802 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order iterature: For additional information, please contact your local Sales Representative MC4HC86A/D
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2-Bit Dual-Supply Inverting Level Translator The NLSV2T240 is a 2 bit configurable dual supply voltage level translator. The input A n and output B n ports are designed to track two different power supply
MC74AC109, MC74ACT109. Dual JK Positive Edge Triggered Flip Flop
MC9, MC9 Dual JK Positive EdgeTriggered FlipFlop The MC9/9 coists of two highspeed completely independent traition clocked JK flipflops. The clocking operation is independent of rise and fall times of
MC74HC00A. Quad 2 Input NAND Gate. High Performance Silicon Gate CMOS
C74C00 Quad 2 Input NND Gate igh Performance Silicon Gate COS The C74C00 is identical in pinout to the S00. The device inputs are compatible with Standard COS outputs; with pullup resistors, they are compatible
MC74HC244A. Octal 3-State Noninverting Buffer/Line Driver/ Line Receiver. High Performance Silicon Gate CMOS
Octal 3-State Noninverting Buffer/Line Driver/ Line Receiver High Performance Silicon Gate CMOS The MC74HC244A is identical in pinout to the LS244. The device inputs are compatible with standard CMOS outputs;
MC Bit Magnitude Comparator
Bit Magnitude Comparator The MC0 is a high speed expandable bit comparator for comparing the magnitude of two binary words. Two outputs are provided: and. A = B can be obtained by NORing the two outputs
FST Bit Bus Switch
FST32 4-Bit Bus Switch The ON Semiconductor FST32 is a quad, high performance switch. The device is CMOS TTL compatible when operating between 4 and. Volts. The device exhibits extremely low R ON and adds
MC74VHC00. Quad 2-Input NAND Gate
MC74C00 Quad 2-Input NND Gate The MC74C00 is an advanced high speed CMOS 2 input NND gate fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky
V N (8) V N (7) V N (6) GND (5)
4-Channel Low Capacitance Dual-Voltage ESD Protection Array Features Three Channels of Low Voltage ESD Protection One Channel of High Voltage ESD Protection Provides ESD Protection to IEC61000 4 2 Level
MC74VHC245. Octal Bus Buffer/Line Driver
MC74HC245 Octal Bus Buffer/Line Driver The MC74HC245 is an advanced high speed CMOS octal bus transceiver fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent
MC74LV594A. 8-Bit Shift Register with Output Register
8-Bit Shift Register with Output Register The MC74LV594A is an 8 bit shift register designed for 2 V to 6.0 V V CC operation. The device contain an 8 bit serial in, parallel out shift register that feeds
74VHC08 Quad 2-Input AND Gate
74VHC08 Quad 2-Input AND Gate Features High Speed: t PD = 4.3ns (Typ.) at T A = 25 C High noise immunity: V NIH = V NIL = 28% V CC (Min.) Power down protection is provided on all inputs Low power dissipation:
MC14049B, MC14050B. Hex Buffer
MC4049B, MC4050B Hex Buffer The MC4049B Hex Inverter/Buffer and MC4050B Noninverting Hex Buffer are constructed with MOS PChannel and NChannel enhancement mode devices in a single monolithic structure.
MC14070B, MC14077B CMOS SSI. Quad Exclusive OR and NOR Gates
C070B, C077B COS SSI Quad Exclusive OR and NOR Gates The C070B quad exclusive OR gate and the C077B quad exclusive NOR gate are constructed with OS Pchannel and Nchannel enhancement mode devices in a single
SN74LS151MEL. 8 Input Multiplexer LOW POWER SCHOTTKY
8 Input Multiplexer The TTL/MSI SN74LS5 is a high speed 8-input Digital Multiplexer. It provides, in one package, the ability to select one bit of data from up to eight sources. The LS5 can be used as
MC74VHCT373A. Octal D-Type Latch with 3-State Output
Octal -Type atch with 3-State Output The MC74CT373A is an advanced high speed CMOS octal latch with 3 state output fabricated with silicon gate CMOS technology. It achieves high speed operation similar
MC74LCX74. Low-Voltage CMOS Dual D-Type Flip-Flop. With 5 V Tolerant Inputs
Low-oltage CMOS Dual D-Type Flip-Flop With 5 Tolerant Inputs The MC74LCX74 is a high performance, dual D type flip flop with asynchronous clear and set inputs and complementary (O, O) outputs. It operates
SN74LS125A, SN74LS126A. Quad 3 State Buffers LOW POWER SCHOTTKY. LS125A LS126A TRUTH TABLES ORDERING INFORMATION
Quad 3 State Buffers V CC E D O E D O 4 3 2 0 9 8 LOW POWER SCHOTTKY 2 3 4 5 6 E D O E D O LS25A GND V CC E D O E D O 4 3 2 0 9 8 4 PLASTIC N SUFFIX CASE 646 LS25A INPUTS 2 3 4 5 6 E D O E LS26A D O GND
74HC74. Dual D Flip Flop with Set and Reset. High Performance Silicon Gate CMOS
Dual D Flip Flop with Set and Reset High Performance Silicon Gate CMOS The 4HC4 is identical in pinout to the LS4. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they
BAS19LT1G, BAS20LT1G, BAS21LT1G, BAS21DW5T1G. High Voltage Switching Diode HIGH VOLTAGE SWITCHING DIODE
BAS9LTG, BAS20LTG, BAS2LTG, BAS2DWTG High Voltage Switching Diode Features These Devices are PbFree, Halogen Free/BFR Free and are RoHS Compliant MAXIMUM RATINGS Continuous Reverse Voltage Rating Symbol
MC74AC74, MC74ACT74. Dual D Type Positive Edge Triggered Flip Flop
Dual D Type Positive Edge Triggered Flip Flop The MC74AC74/74ACT74 is a dual D type flip flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is traferred
MC74HC4094A. 8-Bit Shift and Store Register. High Performance Silicon Gate CMOS
8-Bit Shift and Store Register High Performance Silicon Gate CMOS The MC74HC4094A is a high speed CMOS 8 bit serial shift and storage register. This device consists of an 8 bit shift register and latch
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MMBZ5xxBLT Series, SZMMBZ5xxBLTG Series Zener Voltage Regulators 5 mw SOT Surface Mount This series of Zener diodes is offered in the convenient, surface mount plastic SOT package. These devices are designed
High Performance Silicon Gate CMOS
igh Performance Silicon Gate MOS The M7400A is identical in pinout to the S00. The device inputs are compatible with Standard MOS outputs; with pullup resistors, they are compatible with STT outputs. Output
MC74VHC1G125. Noninverting 3 State Buffer
MC74CG2 Noninverting 3 State Buffer The MC74CG2 is an advanced high speed CMOS noninverting 3 state buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent
2N5401. PNP Silicon. These are Pb Free Devices* Features. MAXIMUM RATINGS THERMAL CHARACTERISTICS MARKING DIAGRAM
Preferred Device Amplifier Transistors PNP Silicon Features These are PbFree Devices* MAXIMUM RATINGS Rating Symbol alue Unit Collector Emitter oltage CEO 1 Collector Base oltage CBO 16 Emitter Base oltage
NLSV22T244. Dual 2-Bit Dual-Supply Non-Inverting Level Translator
Dual 2-Bit Dual-Supply Non-Inverting Level Translator The NLSV22T244 is a dual 2 bit configurable dual supply bus buffer level translator. The input ports A and the output ports B are designed to track
NLX1G99. Configurable Multifunction Gate
NX1G99 Configurable Multifunction Gate The NX1G99 MiniGate is an advanced high speed CMOS multifunction gate with a 3 state output. With the output enable input () at igh, the output is disabled and is
SN74LS74AMEL LOW POWER SCHOTTKY
The SN74S74A dual edge-triggered flip-flop utilizes Schottky TT circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs.
MC74VHC157. Quad 2-Channel Multiplexer
MC74HC57 Quad 2-Channel Multiplexer The MC74HC57 is an advanced high speed CMO quad 2 channel multiplexer, fabricated with silicon gate CMO technology. It achieves high speed operation similar to equivalent
74FST Bit Bus Switch
4FST32 4 Bit Bus Switch The ON Semiconductor 4FST32 is a quad, high performance switch. The device is CMOS TTL compatible when operating between 4 and. Volts. The device exhibits extremely low R ON and
2N4123, 2N4124. General Purpose Transistors. NPN Silicon. Pb Free Packages are Available* Features MAXIMUM RATINGS
N413, General Purpose Transistors NPN Silicon Features PbFree Packages are Available* MAXIMUM RATINGS CollectorEmitter Voltage CollectorBase Voltage Rating Symbol Value Unit N413 N413 V CEO 5 V CBO 4 EmitterBase
Figure 1. Pinout: 16 Lead Packages Conductors (Top View) ORDERING INFORMATION Figure 2. Logic Symbol PIN ASSIGNMENT
The MC74AC138/74ACT138 is a high speed 1 of 8 decoder/demultiplexer. This device is ideally suited for high speed bipolar memory chip select address decoding. The multiple input enables allow parallel
Schmitt Trigger Inputs Outputs Source/Sink 24 ma ACT132 Has TTL Compatible Inputs. ORDERING INFORMATION
The MC74AC/74ACT132 contains four 2 input NAND gates which are capable of transforming slowly changing input signals into sharply defined, jitter free output signals. In addition, they have greater noise
74AC00, 74ACT00 Quad 2-Input NAND Gate
74AC00, 74ACT00 Quad 2-Input NAND Gate Features I CC reduced by 50% Outputs source/sink 24mA ACT00 has TTL-compatible inputs Ordering Information Order Number Package Number General Description The AC00/ACT00
NLU1G00 Single 2-Input NAND Gate The NLU1G00 MiniGate is an advanced high speed CMOS 2 input NAND gate in ultra small footprint. The NLU1G00 input and
Single 2-Input NND Gate The MiniGate is an advanced high speed CMOS 2 input NND gate in ultra small footprint. The input and output structures provide protection when voltages up to 7. are applied, regardless
with LSTTL Compatible Inputs
with STT Compatible Inputs The MC74HC259 is an 8 bit Addressable atch fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TT devices while
MC74HCT14A. Hex Schmitt-Trigger Inverter with LSTTL Compatible Inputs. High Performance Silicon Gate CMOS
MC74CT4 ex Schmitt-Trigger Inverter with STT Compatible Inputs igh Performance Silicon Gate CMOS The MC74CT4 may be used as a level converter for interfacing TT or NMOS outputs to high speed CMOS inputs.
BC846, BC847, BC848 Series. General Purpose Transistors. NPN Silicon
BC846, BC847, BC848 Series General Purpose Transistors NPN Silicon These transistors are designed for general purpose amplifier applications. They are housed in the SC7/SOT2 which is designed for low power