MC74HC244A. Octal 3-State Noninverting Buffer/Line Driver/ Line Receiver. High Performance Silicon Gate CMOS
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1 Octal 3-State Noninverting Buffer/Line Driver/ Line Receiver High Performance Silicon Gate CMOS The MC74HC244A is identical in pinout to the LS244. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This octal noninverting buffer/line driver/line receiver is designed to be used with 3 state memory address drivers, clock drivers, and other bus oriented systems. The device has noninverting outputs and two active low output enables. The HC244A is similar in function to the HC240A. Features Output Drive Capability: 5 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating oltage Range: to Low Input Current: A High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7 A Chip Complexity: 36 FETs or 34 Equivalent Gates NL Prefix for Automotive and Other Applicatio Requiring Unique Site and Control Change Requirements; AEC Q00 Qualified and PPAP Capable These Devices are Pb Free, Halogen Free/BFR Free and are RoHS Compliant DATA INPUTS A A2 A3 A4 B B2 B B4 7 LOGIC DIAGRAM YA YA2 YA3 YA4 YB YB2 YB3 YB4 NONINERTING S SOIC DW SUFFIX CASE 75D ENABLE A A YB4 MARKING DIAGRAMS HC244A AWLYYWWG SOIC PIN ASSIGNMENT A2 A3 YB2 A4 YB GND YB DT SUFFIX CASE 948E ENABLE B YA B4 YA2 B3 B2 HC 244A ALYW A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or = Pb Free Package (*Note: Microdot may be in either location) FUNCTION TABLE YA3 YA4 B Inputs Outputs Enable A, Enable B A, B YA, YB L L L L H H H X Z Z = high impedance ENABLES ENABLE A ENABLE B 9 PIN = PIN 0 = GND ORDERING INFORMATION See detailed ordering and shipping information in the package dimeio section on page 5 of this data sheet. Semiconductor Components Industries, LLC, 4 August, 4 Rev. 5 Publication Order Number: MC74HC244A/D
2 MAXIMUM RATINGS Symbol Parameter alue Unit DC Supply oltage (Referenced to GND) 0.5 to +7.0 in DC Input oltage (Referenced to GND) 0.5 to out DC Output oltage (Referenced to GND) 0.5 to I in DC Input Current, per Pin ± ma I out DC Output Current, per Pin ±35 ma I CC DC Supply Current, and GND Pi ±75 ma I IK Input Clamp Current ( I < 0 or I > ) ± ma I OK Output Clamp Current ( O < 0 or O > ) ± ma P D Power Dissipation in Still Air, SOIC Package TSSOP Package mw This device contai protection circuitry to guard agait damage due to high static voltages or electric fields. However, precautio must be taken to avoid applicatio of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation, in and out should be cotrained to the range GND ( in or out ). Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or ). Unused outputs must be left open. T stg Storage Temperature 65 to +50 C T L Lead Temperature, mm from Case for 0 Seconds (SOIC, SSOP or TSSOP Package) 2 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Derating: SOIC Package: 7 mw/ C from 65 to 25 C TSSOP Package: 6. mw/ C from 65 to 25 C RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit DC Supply oltage (Referenced to GND) in, out DC Input oltage, Output oltage (Referenced to GND) 0 T A Operating Temperature, All Package Types C t r, t f Input Rise and Fall Time = (Figure ) = = Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. C
3 DC ELECTRICAL CHARACTERISTICS (oltages Referenced to GND) Symbol Parameter Test Conditio IH Minimum High Level Input oltage out = I out A IL Maximum Low Level Input oltage out = I out A OH OL Minimum High Level Output oltage Maximum Low Level Output oltage in = IH I out A in = IH I out 2.4 ma I out ma I out 7.8 ma in = IL I out A in = IL I out 2.4 ma I out ma I out 7.8 ma Guaranteed Limit 55 to 25 C 85 C 25 C Unit I in Maximum Input Leakage Current in = or GND ± ±.0 ±.0 A I OZ Maximum Three State Leakage Current Output in High Impedance State in = IL or IH out = or GND ±0.5 ±5.0 ±0 A I CC Maximum Quiescent Supply Current (per Package) in = or GND I out = 0 A A AC ELECTRICAL CHARACTERISTICS (C L = 50 pf, Input t r = t f = 6 ) Guaranteed Limit Symbol Parameter 55 to 25 C 85 C 25 C Unit t PLH, t PHL Maximum Propagation Delay, A to YA or B to YB (Figures and 3) t PLZ, t PHZ Maximum Propagation Delay, Output Enable to YA or YB (Figures 2 and 4) t PZL, t PZH Maximum Propagation Delay, Output Enable to YA or YB (Figures 2 and 4) t TLH, t THL Maximum Output Traition Time, Any Output (Figures and 3) C in Maximum Input Capacitance pf C out Maximum Three State Output Capacitance (Output in High Impedance State) pf 25 C, = 5.0 C PD Power Dissipation Capacitance (Per Buffer)* * Used to determine the no load dynamic power coumption: P D = C PD 2 f + I CC. 34 pf 3
4 SWITCHING WAEFORMS DATA INPUT A OR B YA OR YB t r t PLH t TLH 0% 90% 0% 90% t f GND t PHL t THL ENABLE A OR B Y Y t PZL t PZH t PLZ t PHZ 0% 90% GND HIGH IMPEDANCE OL OH HIGH IMPEDANCE Figure. Figure 2. TEST CIRCUITS TEST POINT TEST POINT DEICE UNDER TEST C L * DEICE UNDER TEST k C L * CONNECT TO WHEN TESTING t PLZ AND t PZL. CONNECT TO GND WHEN TESTING t PHZ AND t PZH. *Includes all probe and jig capacitance *Includes all probe and jig capacitance Figure 3. Test Circuit Figure 4. Test Circuit PIN DESCRIPTIONS INPUTS A, A2, A3, A4, B, B2, B3, B4 (Pi 2, 4, 6, 8,, 3, 5, 7) Data input pi. Data on these pi appear in noninverted form on the corresponding Y outputs, when the outputs are enabled. CONTROLS Enable A, Enable B (Pi, 9) Output enables (active low). When a low level is applied to these pi, the outputs are enabled and the devices function as noninverting buffers. When a high level is applied, the outputs assume the high impedance state. S YA, YA2, YA3, YA4, YB, YB2, YB3, YB4 (Pi 8, 6, 4, 2, 9, 7, 5, 3) Device outputs. Depending upon the state of the output enable pi, these outputs are either noninverting outputs or high impedance outputs. 4
5 LOGIC DETAIL TO THREE OTHER A OR B INERTERS ONE OF 8 INERTERS DATA INPUT A OR B YA OR YB ENABLE A OR ENABLE B ORDERING INFORMATION MC74HC244ADWG Device Package Shipping SOIC WIDE 38 Units / Rail MC74HC244ADWR2G MC74HC244ADTG MC74HC244ADTR2G NL74HC244ADWR2G* SOIC WIDE SOIC WIDE 000 / Tape & Reel 75 Units / Rail 2500 / Tape & Reel 000 / Tape & Reel NL74HC244ADTR2G* 2500 / Tape & Reel For information on tape and reel specificatio, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specificatio Brochure, BRD80/D. *NL Prefix for Automotive and Other Applicatio Requiring Unique Site and Control Change Requirements; AEC Q00 Qualified and PPAP Capable 5
6 PACKAGE DIMENSIONS DT SUFFIX CASE 948E 02 ISSUE C 5 (0.006) T L 5 (0.006) T U 2X L/2 PIN IDENT U S S C 00 (0.004) T SEATING PLANE X K REF 0 (0.004) M T U S S 0 A D G H B U N J J N SOLDERING FOOTPRINT 7.06 K K ÍÍÍÍ ÍÍÍÍ SECTION N N 0.25 (0.00) M NOTES:. DIMENSIONING AND TOLERANCING PER ANSI YM, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 5 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.00) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE W. F MILLIMETERS INCHES DIM MIN MAX MIN MAX DETAIL E A B C W D F G 0.65 BSC BSC H J DETAIL E J K K L 6.40 BSC BSC M PITCH 6X X.26 DIMENSIONS: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 6
7 PACKAGE DIMENSIONS SOIC DW SUFFIX CASE 75D 05 ISSUE G H 0X 0.25 M B M D E A h X 45 NOTES:. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME YM, DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 5 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 3 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. X B 0.25 M T A S 8X e 0 B B S A A T SEATING PLANE C L MILLIMETERS DIM MIN MAX A A B C D E e.27 BSC H h L ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC ow the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC s product/patent coverage may be accessed at Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, coequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specificatio can and do vary in different applicatio and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any licee under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicatio intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless agait all claims, costs, damages, and expees, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 8027 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@oemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative MC74HC244A/D
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Low Voltage.8/2.5/3.3 V 6 Bit Buffer With 3.6 V Tolerant Inputs and Outputs (3 State, Non Inverting) The 74ALVC6244 is an advanced performance, non inverting 6 bit buffer. It is designed for very high
SN74LS125A, SN74LS126A. Quad 3 State Buffers LOW POWER SCHOTTKY. LS125A LS126A TRUTH TABLES ORDERING INFORMATION
Quad 3 State Buffers V CC E D O E D O 4 3 2 0 9 8 LOW POWER SCHOTTKY 2 3 4 5 6 E D O E D O LS25A GND V CC E D O E D O 4 3 2 0 9 8 4 PLASTIC N SUFFIX CASE 646 LS25A INPUTS 2 3 4 5 6 E D O E LS26A D O GND
BC847BPDXV6T5G. SBC847BPDXV6 NPN/PNP Dual General Purpose Transistor
BC847BPDX6, SBC847BPDX6 NPN/PNP Dual General Purpose Transistor This transistor is designed for general purpose amplifier applications. It is housed in the SOT563 which is designed for low power surface
NL27WZ08. Dual 2-Input AND Gate. The NL27WZ08 is a high performance dual 2 input AND Gate operating from a 1.65 V to 5.5 V supply.
Dual 2-Input AND Gate The is a high performance dual 2 input AND Gate operating from a.65 to 5.5 supply. Features Extremely igh Speed: t PD 2.5 ns (typical) at = 5 Designed for.65 to 5.5 Operation Over
MMBFJ309L, MMBFJ310L, SMMBFJ309L, SMMBFJ310L. JFET - VHF/UHF Amplifier Transistor. N Channel
MMBFJ9L, MMBFJL, SMMBFJ9L, SMMBFJL JFET - VHF/UHF Amplifier Transistor NChannel Features Drain and Source are Interchangeable S Prefix for Automotive and Other Applications Requiring Unique Site and Control
MC14049B, MC14050B. Hex Buffer
MC4049B, MC4050B Hex Buffer The MC4049B Hex Inverter/Buffer and MC4050B Noninverting Hex Buffer are constructed with MOS PChannel and NChannel enhancement mode devices in a single monolithic structure.
MC10E171, MC100E171. 5VНECL 3-Bit 4:1 Multiplexer
5VНECL 3-Bit 4:1 Multiplexer Description The MC10E/100E171 contains three 4:1 multiplexers with differential outputs. Separate Select controls are provided for the leading pairs (see logic symbol). The
74LCX08 Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs
74LCX08 Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs Features 5V tolerant inputs 2.3V 3.6V V CC specifications provided 5.5ns t PD max. (V CC = 3.3V), 10µA I CC max. Power down high impedance
NL17SH02. Single 2-Input NOR Gate
N7S0 Single -Input NOR Gate The N7S0 MiniGate is an advanced high speed CMOS input NOR gate in ultra small footprint. The N7S0 input structures provide protection when voltages up to 7.0 are applied, regardless
LOW POWER SCHOTTKY. MARKING DIAGRAMS GUARANTEED OPERATING RANGES ORDERING INFORMATION. SN74LS37xN AWLYYWW PDIP 20 N SUFFIX CASE 738
The SN74LS373 consists of eight latches with 3-state outputs for bus organized system applications. The flip-flops appear transparent to the data (data changes asynchronously) when Latch Enable (LE) is
MC Bit Magnitude Comparator
Bit Magnitude Comparator The MC0 is a high speed expandable bit comparator for comparing the magnitude of two binary words. Two outputs are provided: and. A = B can be obtained by NORing the two outputs
MC74LVX32. Quad 2-Input OR Gate. With 5 V Tolerant Inputs
MC4X32 Quad 2-Input OR Gate With 5 Tolerant Inputs The MC4X32 is an advanced high speed CMOS 2 input OR gate. The inputs tolerate voltages up to.0, allowing the interface of 5.0 systems to 3.0 systems.
MMBT5550L, MMBT5551L, SMMBT5551L. High Voltage Transistors. NPN Silicon
MMBT55L, MMBT555L, SMMBT555L High Voltage Transistors NPN Silicon Features AECQ Qualified and PPAP Capable S Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements
LOW POWER SCHOTTKY. ESD > 3500 Volts. GUARANTEED OPERATING RANGES ORDERING INFORMATION V CC 8 7 GND
ESD > 3500 Volts V CC 8 4 3 2 0 9 LOW POWER SCHOTTKY 2 3 4 5 6 7 GND GUARANTEED OPERATING RANGES Symbol Parameter Min Typ Max Unit V CC Supply Voltage 4.75 5.0 5.25 V T A Operating Ambient Temperature
74HC Bit Serial Input/Serial or Parallel Output Shift Register with Latched 3 State Outputs. High Performance Silicon Gate CMOS
8 Bit Serial Input/Serial or Parallel Output Shift egister with Latched 3 State Outputs High Performance Silicon Gate CMOS The coists of an 8 bit shift register and an 8 bit D type latch with three state
SN74LS373, SN74LS374. Octal Transparent Latch with 3 State Outputs; Octal D Type Flip Flop with 3 State Output LOW POWER SCHOTTKY
Octal Transparent Latch with 3 State Outputs; Octal Type Flip Flop with 3 State Output The SN74LS373 consists of eight latches with 3-state outputs for bus organized system applications. The flip-flops
NL27WZU04. Dual Unbuffered Inverter
Dual Unbuffered Inverter The N27WZU04 is a high performance dual unbuffered inverter operating from a.5 to 5.5 V supply. These devices are well suited for use as oscillators, pulse shapers, and in many
MC74AC161, MC74ACT161, MC74AC163, MC74ACT163. Synchronous Presettable Binary Counter
MC74AC161, MC74ACT161, MC74AC163, MC74ACT163 Synchronous Presettable Binary Counter The MC74AC161/74ACT161 and MC74AC163/74ACT163 are high speed synchronous modulo 16 binary counters. They are synchronously
NL17SZ08. Single 2-Input AND Gate
N7SZ08 Single 2-Input AND Gate The N7SZ08 is a single 2 input AND Gate in two tiny footprint packages. The device performs much as CX multi gate products in speed and drive. They should be used wherever
NCS1002A. Constant Voltage / Constant Current Secondary Side Controller
NCS00A Constant Voltage / Constant Current Secondary Side Controller Description The NCS00A is a performance upgrade from the NCS00 focused on reducing power consumption in applications that require more
2N5401. PNP Silicon. These are Pb Free Devices* Features. MAXIMUM RATINGS THERMAL CHARACTERISTICS MARKING DIAGRAM
Preferred Device Amplifier Transistors PNP Silicon Features These are PbFree Devices* MAXIMUM RATINGS Rating Symbol alue Unit Collector Emitter oltage CEO 1 Collector Base oltage CBO 16 Emitter Base oltage
High Performance Silicon Gate CMOS
High Performance Silicon Gate CMOS The MC74HCT14A may be used as a level converter for interfacing TTL or NMOS outputs to high speed CMOS inputs. The HCT14A is identical in pinout to the LS14. The HCT14A
MUR3020PTG SUR83020PTG MUR3040PTG MUR3060PTG SUR83060PTG. SWITCHMODE Power Rectifiers ULTRAFAST RECTIFIERS 30 AMPERES, VOLTS
MUR00PTG, SUR00PTG, MUR00PTG, MUR00PTG, SUR00PTG SWITCHMODE Power Rectifiers These state of the art devices are designed for use in switching power supplies, inverters and as free wheeling diodes. Features
NL27WZ14. Dual Schmitt Trigger Inverter
N7WZ Dual Schmitt Trigger Inverter The N7WZ is a high performance dual inverter with Schmitt Trigger inputs operating from a.5 to supply. Pin configuration and function are the same as the N7WZ0, but the
2N4123, 2N4124. General Purpose Transistors. NPN Silicon. Pb Free Packages are Available* Features MAXIMUM RATINGS
N413, General Purpose Transistors NPN Silicon Features PbFree Packages are Available* MAXIMUM RATINGS CollectorEmitter Voltage CollectorBase Voltage Rating Symbol Value Unit N413 N413 V CEO 5 V CBO 4 EmitterBase
MC14070B, MC14077B CMOS SSI. Quad Exclusive OR and NOR Gates
C070B, C077B COS SSI Quad Exclusive OR and NOR Gates The C070B quad exclusive OR gate and the C077B quad exclusive NOR gate are constructed with OS Pchannel and Nchannel enhancement mode devices in a single
LOW POWER SCHOTTKY. GUARANTEED OPERATING RANGES ORDERING INFORMATION PLASTIC N SUFFIX CASE 648
The SN74LS194A is a High Speed 4-Bit Bidirectional Universal Shift Register. As a high speed multifunctional sequential building block, it is useful in a wide variety of applications. It may be used in
MC74HC374A. Octal 3-State Non-Inverting D Flip-Flop. High Performance Silicon Gate CMOS
M7H37A Octal 3-State Non-Inverting Flip-Flop High Performance Silicon Gate MOS The M7H37A is identical in pinout to the LS37. The device inputs are compatible with standard MOS outputs; with pullup resistors,
MC10E163, MC100E163. 5VНECL 2-Bit 8:1 Multiplexer
5VНECL 2-Bit 8:1 Multiplexer Description The MC10E/100E163 contains two 8:1 multiplexers with differential outputs and common select inputs. The select inputs (SEL0, 1, 2) control which one of the eight
MC74HC373A. Octal 3 State Non Inverting Transparent Latch. High Performance Silicon Gate CMOS
Octal 3 State Non Inverting Transparent Latch High Performance Silicon Gate CMOS The MC74HC373A is identical in pinout to the LS373. The device inputs are compatible with standard CMOS outputs; with pullup
MARKING DIAGRAMS ORDERING INFORMATION VHC139 AWLYYWW SOIC 16 D SUFFIX CASE 751B VHC 139 AWLYWW TSSOP 16 DT SUFFIX CASE 948F
The MC74HC139 is an advanced high speed CMOS 2 to 4 decoder/ demultiplexer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while
Battery Monitors Notebooks and PDA s General Purpose Portable Devices General Purpose Low Voltage Applications +V CC.
LMV33, NCV33, LMV393, LMV339 Single, Dual, Quad General Purpose, Low Voltage Comparators The LMV33 is a CMOS single channel, general purpose, low voltage comparator. The LMV393 and LMV339 are dual and
BC337, BC337-25, BC Amplifier Transistors. NPN Silicon. These are Pb Free Devices. Features MAXIMUM RATINGS
BC337, BC337-25, BC337-4 Amplifier Transistors NPN Silicon Features These are PbFree Devices COLLECTOR MAXIMUM RATINGS Rating Symbol alue Unit 2 BASE Collector Emitter oltage CEO 45 dc Collector Base oltage
NL27WZ00. Dual 2-Input NAND Gate. The NL27WZ00 is a high performance dual 2 input NAND Gate operating from a 1.65 V to 5.5 V supply.
Dual 2-Input NAND Gate The N27WZ00 is a high performance dual 2 input NAND Gate operating from a.65 to 5.5 supply. Features Extremely igh Speed: t PD ns (typical) at = 5.0 Designed for.65 to 5.5 Operation
NGTG50N60FLWG IGBT. 50 A, 600 V V CEsat = 1.65 V
NGTGN6FLWG IGBT This Insulated Gate Bipolar Transistor (IGBT) features a robust and cost effective Trench construction, and provides superior performance in demanding switching applications, offering both
MC14060B. 14 Bit Binary Counter and Oscillator
4Bit Binary Counter and Oscillator The MC4060B is a 4stage binary ripple counter with an onchip oscillator buffer. The oscillator configuration allows design of either RC or crystal oscillator circuits.