Textbook title: Circuits, Devices, Networks and Microelectronics

Transcription

1 Circuits, Deices, Networks and Microelectronics Textbook title: Circuits, Deices, Networks and Microelectronics CHAPTE 5. THE IDEAL OPAMP 5. THE OPEATIONAL AMPLIFIE, CONTEXT and QUALIFICATION The operational amplifier (a.k.a. opamp) is a multiple-transistor high-gain circuit that has nearly ideal oltage transfer (oltage amplifier) characteristics. This is a fairly useful context, and makes the opamp a faorite component among circuit applications. The reason that the opamp is categorized as a oltage amplifier is because its input resistance is large and its put resistance is small. o it can sample oltages with ery little implication on the circuit being probed and it can drie a load with ery little implication on the load being drien. It is characterized by a large oltage transfer gain. It is a differential amplifier. It een has a dedicated symbol, as indicated by figure 5.-(a). Figure 5.-: The operational amplifier (opamp) The symbol must be qualified if we start to get real, as represented by figure 5.-(b)). But otherwise the ideal opamp symbol is not unlike that of other ideal components. It has two inputs and a single put, for which AV ( + ). It looks like an arrowhead, which implies that its action is unidirectional. ince the input resistance is infinite it draws no current, not een so much as an electron/year. And since it s put resistance 0 it can proide any leel of current, enough to start your car, wash your laundry, or displace a bothersome planet. Consequently it is not exactly a truth, -just a mathematical ideal. The real ersion needs a power supply (actually two of them ( bipolar supply)). And in addition to the transfer characteristics in,, and A V being finite, it has a few other caeats that will make it not quite as ideal as figure 5.-(a) suggests. But still we can treat the basic opamp as quasi-ideal, and therefore can derie some excellent applications, after which we then may qualify them with circuits using figure 5.-(b).

2 Circuits, Deices, Networks and Microelectronics 5. OPAMP CICUIT: BAIC TOPOLOGIE The large gain of the opamp is of no benefit unless it is employed in feedback mode. In this respect the put signal is fed back as a correctie action to pull the transfer characteristics into an alignment with a feedback network. The high gain A V makes this pull ery emphatic. All opamp circuits therefore use feedback to accomplish their purposes in life. This is illustrated by figure 5.-a, in which a oltage diider is used to sample the put and feed a fraction of the signal back to the ( - ) input. When the signal is fed back in a negatie ( correctie) loop it is called negatie feedback. Feedback to the positie ( + ) input is anti-correctie and pushes the put against one of the power rails, a somewhat less useful result. Figure 5.-: The opamp with feedback. Basic topologies Consider figure (5.-a) for which the feedback loop and factor is self-eident. If we do the mathematics on figure 5.-(a) the fraction of that is fed back to ( - ) is F + β (5.-a) β is defined as the feedback factor. In this case it is due to the, oltage diider, i.e. β (5.-b) + and since A ) A ( ) V ( + V F then ( ) F A V and since A for an ideal opamp then F (irtually). (Aha!) V The word irtually tells the whole story, because the inputs are NOT connected. In fact, since the ideal opamp has in between the inputs, then (irtually) no current will flow between the inputs either.

3 Circuits, Deices, Networks and Microelectronics This curious property is unique to the opamp. Due to feedback the oltage nodes + and - hae zero difference oltage between them as if connected. In addition the current between them 0 since in infinity. This property is call a nullator. ( ). The collateral property is that that the (ideal) put can supply any oltage at any current leel. That is also a little unreal, and this type put is defined as a norator ( ). We therefore sometimes call the ideal opamp a nullator-norator component. imulation software loes this simplicity but will sometimes gies misleading results if the opamp is not coupled correctly. The appendix at the end of the chapter gies a simulation example of this context. But otherwise, from equation (5.-a) and (5.-b) + (5.-) β Notice that the opamp seems to hae disappeared(!?) and the transfer gain / depends only on resistances and. Of course the opamp hasn t disappeared. The realization represented by equation (5.-) is that the high gain of the opamp has pulled the input into alignment with the F node of the oltage diider by the correctie ( negatie pull) of the feedback. ince the and nodes are then tightly aligned to the, oltage diider then the features of the transfer function are that of the (, ) feedback network. Consider the other topology of figure 5.-(b) and apply nodal analysis to the F - node (also called the inerting input): F G + G ) G G 0 (5.-3a) ( and since but since the inputs are irtually connected and + 0, then F 0, and with transfer gain G G 0 (5.-3b) G G (5.-4) The topology of figure 5.-(b) is called the simple inerting configuration of the opamp, with ideal gain gien by equation (5.-4). The topology of figure 5.5-a is called the simple non-inerting topology, with ideal gain gien by (5.-). o we hae a summary for these basic topologies, one that shows how the opamp can be used to fit many simple needs: 3

4 Circuits, Deices, Networks and Microelectronics Non-inerting configuration (input at + ): A IDEAL + Inerting configuration (input to - thru ): A IDEAL Table 5.-: ummary of the transfer gain analysis of simple opamp configurations The more conentional orientations of the simple (basic) opamp topologies are of the left-right form shown by figure 5.-. crutinize them and bend a few wires in your mind to confirm that they are the same as figure 5.-. Figure 5.-: (a) imple non-inerting topology (b) imple inerting topology They may be considered to be companion figures to the formulae of table 5.-. This simplicity must be iewed with a little caution because the node for topology 5.-b will draw a current i ( ) G G since (-) is irtually 0 And we should qualify these two topologies as follows: Non-inerting configuration (input at + ): in in i Inerting configuration (input to - thru ): ( ) Table 5.-: Input resistances of the two simple opamp configurations Another way of summarizing table 5.- is to say that the non-inerting topology makes a good buffer circuit (does not draw current). On the other hand the inerting topology is NOT a good buffer circuit because it does draw current. 4

5 Circuits, Deices, Networks and Microelectronics A collateral usage of the nullator-norator context of the opamp is its ability to irtually connect two nodes with the complication of haing them connected. (What!?). This property is extremely useful for measurement of deice characteristics, as illustrated by figure The oltage measurement across the deice usually likes to be referenced to ground (channel #). The current through the deice also likes to be referenced to ground (channel #). But there is a conflict. The probe traces cannot use the same ground because the ground absorbs the current that needs to be measured. o we use the opamp to make it a irtual ground. And then the current through the deices is directly measured as the current through the feedback resistance F. Figure 5.-3(a). Deice I-V measurements using a irtual ground. ince no current can flow into the irtual ground it all flows through F and therefore V defines the current as I(deice) -V / F. (5.-5) And the I-V characteristics of the deice under test can be directly displayed on the X-Y setting of the Oscilloscope as illustrated by figure 5.-3(b) for a junction diode. Figure 5.-3(b). XY put trace for the figure 5.-3(a) test circuit with a junction diode as the deice under test. The deice under test can be any component or circuit, e.g. diode, transistor, CMO logic inerter, etc, for which the I-V characteristics (its electrical performance) need to be examined. 5

6 Circuits, Deices, Networks and Microelectronics 5.3 OPAMP CICUIT: EXTENDED FEEDBACK NETWOK The nullator-norator feature also gies a pointer to a simple and direct approach for analyzing any opamp topology. ince the irtually connection is a feedback benchmark, the best starting point is at the node F, which is also the (-) inerting input node. Due to the irtual connection this node is irtually the same as (or irtually connected to) the + node. As example, consider an opamp topology defined by a T-construct feedback network (rather than an, oltage diider feedback), as shown by figure Figure 5.3-: Inerting configuration with T feedback network In the case of figure 5.3- anlalysis begins with nodal analysis at F ( - ) for which G + G ) G G 0 (5.3-a) ( where node is as indicated, denoted for the context of the analysis. Due to the irtual connection between the + and - inputs, + 0 and (5.3-a) reduces to G G 0 And therefore G (5.3-b) G This result should look familiar since it is just like equation (5.-4). And if we now apply nodal analysis to node, then But, since 0, then or + G + G + G ) G G 0 (5.3-a) ( G + G + G ) G 0 (5.3-b) (

7 Circuits, Deices, Networks and Microelectronics ( G + G3 G4 ) ( G G3 G4 ) G4 G (5.3-3) which is the same as the simple inerter equation (5.-4) except for multiplying factor ( G + + G3 G4 ) G 4. If we hae the same topology except in the non-inerting context (figure 5.3-), the analysis is similar. Figure 5.3-5: Non-inerting configuration with T feedback network Nodal analysis at F ( - ) gies G + G ) G 0 (5.3-4a) ( Due to the irtual connection between + and -, then + and therefore (5.3-4a) gies ( G + G ) + G (5.3-4b) If we now execute a nodal analysis at, then G + G + G ) G G 0 (5.3-5a) ( You might note its similarity to equation (5.3-5a). In this case, since +, then ( G 4 + G3 + G4 ) G G 0 (5.3-5b) Collecting terms we hae a result analogous (but not the same) as (5.3-3) ( G + G + G ) + G 3 4 G 4 G4 (5.3-6) 7

8 Circuits, Deices, Networks and Microelectronics *Notice that this is NOT the same as the (, ) non-inerting equation with multiplying factor. egardless of the lack of simplicity of equation (5-3.6) we don t care to hae a large collection of formulae for each and eery damn feedback option. Fortunately it is ery little effort to apply nodal analysis to the feedback network to find (a) transfer gain and (b) feedback factor β. The key is nodal analysis. tart at the feedback node (input (-) of the opamp). And march through the rest of the feedback network to determine the relatie to the. The analysis is een easier when the resistances (conductances) hae alues. Consider the following example using the T-network of figure 5.3-, with all 0kΩ ( equal resistance network) Example #5.3-: Figure 5.3- (and 5.3-5) with all resistances equal Nodal analysis at - : ( G + G) G G 0 For which since (by irtual connection) + and + 0 Now for nodal analysis at, ( G + G + G) G G 0 for which Therefore ( G + G + G) G since (by the irtual connection) + and Marching through the same process for the non-inerting configuration, at node - : ( G + G) G 0 for which s since + (by the irtual connection). Continuing to nodal analysis at : ( G + G + G) G G 0 for which ( G + G + G) G G since (by the irtual connection) + and + And therefore There are some portfolio 3 opamp topologies 5 that are used time and time again and they are listed at the end of the chapter end example # ummary and recipe:. Assume that the inputs are irtually connected. (nullator-norator concept). 5. Execute nodal analysis at F 3. Continue with nodal analysis along the (linear) feedback network until is included in the math. Table 5.3-: ummary of the analysis process for any opamp topology. 8

9 Circuits, Deices, Networks and Microelectronics 5.4 BUFFE APPLICATION AND INPUT EITANCE OF OPAMP CICUIT TOPOLOGIE The high input resistance of the opamp makes it eminently suitable for use as a oltage sampling probe since the high input resistance effectiely draws no current. The basic buffer topology is shown by figure 5.4-(a). One of the faorite ariants is the option in which infinity (i.e. non-existent) and 0 (short circuit). Thus, according to equation (5.-3) the transfer gain is /.0. The result is shown by figure 5.4-b and is called the unity-gain buffer. Figure 5.4-: Unity-gain buffer special case of non-inerting configuration. The feedback factor β.0 for this circuit. The opamp is unidirectional and thus there is no way for the signal at the put to interact back with the input. o this circuit is as close to a perfect buffer element as one can be, short of an optically-coupled one. Contrast the unity-gain non-inerting topology with the unity-gain inerting topology for which we choose 5 r (figure 5.4-5(a)) We find that the unity-gain inerting topology does not hae the good buffer characteristics as the unity-gain non-inerting topology, because the input resistance for the unitygain inerting topology. This is a consequence of the fact that the node + 0. That places a signal oltage across, for which there must be an input current i, and thus an input resistance (in at s) /i. Figure 5.4-5: Inerting configuration: (a) Unity-gain (b) Input resistance 9

10 Circuits, Deices, Networks and Microelectronics The signal current i that flows through resistance has to go somewhere. It doesn t flow into the opamp input so it flows to and through, which is consistent with being opposite in polarity to. This is illustrated by figure 5.4-5(b) ince the current into the opamp 0 it doesn t matter what is connected to input +, since no current can flow to it from ( - ). And since the put resistance of the opamp 0, it doesn t matter what load is at the put. This factoid is illustrated by figure Figure Take note that in always for the inerting configuration and always 0 (or at least small, if non-ideal). Emphasis: Input resistance of inerting topology Input resistance at for the inerting topology is always, no matter what network is connected to input + and no matter what is connected to the put. (ee figure 5.4-3). The buffering nature of the opamp is of importance. It is one of the benchmarks of the non-inerting configuration. One that is particularly useful is the one illustrated by figure 5.4-4, which uses an - ladder to accept a set of inputs, V 0, V, V, V 3. Figure 5.4-4: -5 ladder buffered by a non-inerting amplifier 0

11 Circuits, Deices, Networks and Microelectronics By the nature of the - ladder, each input further away from the + node is reduced by a factor of two. If we analyze the circuit by superposition, starting with the situation for which all inputs except V 0 are zero, then we find that (5.4-) o if we recognize (by the nature of the ladder) that the other inputs are successiely smaller by a factor of two as we step backwards from V 3, then + B b b b Va b0 + 3 A 4 8 (5.4-5) where b k 0 or (bit alue) corresponding to the eponymous inputs and V a bit amplitude. The circuit represented by figure is called a DAC (digital-analog-conerter), and can be much greater string length than the 4-bit example of figure The ratio B / A is adjusted so that V will reflect a oltage leel consistent with the selected bit string input. Example #5.5-: uppose we hae bit amplitude.0v and we desire V 0V when input byte $A %00, then 0 /3 x ( ¼ +0 ) x (.0) x ( + B / A ) which gies B / A 3. It is important to the context of the - ladder that the input resistance to the opamp topology be large in order to image its simple binary context. Another relatiely simple - topology is included in the portfolio table for which the feedback network is an - ladder. 5.5 UMMING POINT (INVETING CONFIGUATION) The inerting topology has the benefit of accepting all currents that enter the ( - ) node and sending them downrange to through the feedback resistance (or whateer network is associated with ). It is therefore also called a summing input, as illustrated by figure 5.5- and equation (5.5-).

12 Circuits, Deices, Networks and Microelectronics Figure 5.5-: umming point relatie to ground for which f f f (5.5-) 3 In this case, as indicated by figure 5.5-, the feedback resistance from the put is labeled f (rather than ) for syntactical reasons. The inputs, 5, etc, may come from anywhere, to include other feedback path loops. Many higher-order frequency profiles relate to a summing point analysis. It should be emphasized that summing point analysis is specific to the inerting configuration of the opamp. 5.6 OPAMP DIFFEENTIAL AMPLIFIE TOPOLOGIE A number of applications relate to the use of the opamp in the construction of differential amplifier configurations. ince the opamp is itself a diffamp it is a reasonabe topology choice, and not uncommon. The basic differential amplifier construct is identified by figure 5.6- Figure 5.6-: imple differential circuit drien by opamp.

13 Circuits, Deices, Networks and Microelectronics Examine the circuit. It is eident that is the inerting input since it is path connected to the inerting opamp input ( - ). The non-inerting input is the one that is path connected to + and is ratioed by the 3, 4 oltage diider with result 4 +. (5.6-) o that means that the circuit of figure 5.6- will hae put (by superposition) + + This really is not a ery useful result unless α ( ) 4 + (5.6-) is the obious choice. This can be accomplished if we (cleerly) identify α / and choose 3 and 4 such that 3 / 4 /α. When applied to equation (5.6-5) this gies ( + α ) ( ) α α (5.6-3) + α which is the result desired. Howeer for best functionality as a diffamp figure 5.6- needs to be buffered at the inputs since neither input of figure 5.6- ( nor ) has high input resistance. Typically this requirement is accomplished in a manner as represented by figure 5.6-5, for which the buffer input pair also includes gain. This topology is usually a packaged part in most places in the unierse and is called an instrumentation amplifier (IA). Figure 5.6-5: Instrumentation Amplifier 3

14 Circuits, Deices, Networks and Microelectronics The adantage of this construct is not only that both inputs are buffered (high input resistance), but also the fact that the transfer gain can be adjusted by means of a single resistance 4 according to 3 + ( ) α (5.6-4) 4 This result is a good example of the nodal analysis suggested by section 5-3 and is shown below Nodal analysis of figure Nodal analysis at - (U3) and - (U5), respectiely, gies: ' ( 4 ' ( U )( G3 + G4 ) G3 G4 ( U3) U 3)( G3 + G4 ) G3 G ( U ) 0 ince ( U3) and ( U ) (irtual connections), then these equations become ( G3 + G4 ) G3 G4 0 ' G + G ) G G 0 ( and if the second is subtracted from the first, then: ' ' ' ( )( G3 + G4 ) G3( ) G4 ( ) so that ' ' G4 ( ) + ( ) G 3 and 3 α + ( ) 4 QED End analysis Typically, we choose α 0.5 or.0 (small) and identify the differential gain of the IA by means of the G G +. coefficient factor ( + ) ( )

15 Circuits, Deices, Networks and Microelectronics 5.7 FEQUENCY DEPENDENT NETWOK UING (ideal) OPAMP Gien its role as a nullator-norator element within a network, the opamp has a large number of frequencyrelated applications, most of which are realized as resistance-capacitance networks. One of the simplest is represented by figure 5.7-, for which the feedback resistance in the simple inerting topology is replaced by a capacitance C Figure 5.7-: (a) mall-signal analysis (b) Large signal (integrator) analysis. This circuit topology is also called the Miller integrator. The large-signal analysis shown by the figure draws on the fact that I I (since I in 0). Therefore I dq d dv C ( V V C since V - 0 dt dt dt ) And therefore I ( V V ) dv C dt (5.7-) esoling equation (5.7-) in terms of V by means of the integral, gies V T ( t T ) V t dt C ( ) (5.7-a) 0 This topology is also called an accumulator if V (t) is a pseudo-random input with information buried in the noise, which will show up as an accumulated signal leel. A good example of pseudo-random signal with information in the form of impulses is that of a Geiger-counter (random radiation) input. The small-signal form gien by figure 5.7-(a) G (5.7-b) sc s C is also of significance, since it gies an put that is in quadrature (phase shift of 90 o ) with the input,with an amplitude that rolls of linearly (same as 0dB/dec) with respect to frequency, and is characterized by the time constant τ / C. 5

16 Circuits, Deices, Networks and Microelectronics A modified form of the Miller integrator, known as the lossy Miller integrator, is shown by figure Figure 5.7-: Lossy Miller integrator Applying nodal analysis at the - input and recognizing that the irtual connection puts - as irtually 0 we get G G + sc ( + s C ) (5.7-3) which is the form of a low-pass profile with magnitude response + ω / ω (5.7-4) where ω C and phase shift φ 80 tan ( ω / ω ). The resistance is usually elected to be large for which the frequency corner ω is expected to be relatiely low. This is consistent with the context of a leakage (or loss) and oercomes a flaw of the ideal Miller integrator (figure 5.7-b) in which a slight parasitic input offset (not uncommon to real opamps) will accumulate and push V up against the oltage rails, and which totally compromises its function. Equally simple but somewhat less useful is the Miller differentiator, represented by figure Figure 5.7-3: Miller differentiator. The resistance of the inerting configuration is replaced by a capacitance. 6

17 Circuits, Deices, Networks and Microelectronics It has response (resoled by nodal analysis) of the form V dv ( t) C (5.7-5a) dt And like its counterpart gien by figure 5.7- it has a small-signal response that is a little strange and a little interesting, for which sc (5.7-5b) which linearly increases with respect to frequency and is characterized by time constant τ 5 C. We may also indulge in topologies which include more than one time constant, such as the bandpass construct shown by figure Figure 5.7-4: imple bandpass topology using ideal opamp This circuit topology has transfer function (cross-reference to the figure) Z Z Y Z ( + / sc )( G + sc ) (5.7-6) ( + ω / s)( + s / ω ) Equation (5.7-7) shows that a lower roll-off corner will occur at ω / C and an upper roll-off corner at ω / C, for the Bode magnitude plot. A large number of frequency/phase-adjust profiles can be deised using one or more opamps as driers of the network. The put can then be defined in terms of the linear components, usually resistances and capacitances. In general these bear more qualification than the simple resistance networks, since the nonideal opamp has frequency domain characteristics of its own which will preail oer most of the high frequency poles and zeros defined by the feedback network. 7

18 Circuits, Deices, Networks and Microelectronics 5.8 OPAMP TOPOLOGIE EMPLOYING THE ANTI-COECTIVE (POITIVE) FEEDBACK LOOP Constructs with anti-correctie ( positie feedback) loops generally hae no merit by themseles but they can produce some interesting benefit when applied in concert with the correctie (negatie) feedback, - proided that the correctie feedback predominates. Consider the circuit of figure 5.8-, which employs both correctie and anti-correctie feedback. Figure 5.8-: Opamp construct using both negatie (correctie) and positie (anti-correctie) feedback. In this circuit, it is assumed that the negatie feedback loop defined by resistances and 5 will rule oer the one formed by 5 and 4, so that + + ( + α ) + (5.8-) where α /. Applying nodal analysis at +, we see that Using equation (5.8-) we hae for which we then obtain + ( G3 + G4 + G5 G5 ) G3 0 (5.8-) G3 + ( G + G αg5 ) (5.8-3) 3 4 ( + α) (5.8-4) ( + G G αg ) G3 Note that the effect of the anti-correctie feedback is to include a subtractie term in the denominator. If we should choose alues such that G 5 /G 3 /α (same as 5 / 3 / ) and replace G 4 by a capacitance (see figure 5.8-5), then 8

19 Circuits, Deices, Networks and Microelectronics ( + α ) ( + α) (5.8-5) sc G s C Figure 5.8-5: Non-inerting integrator (as consequence of positie feedback) which is similar equation (5.7-b) for the Miller integrator except of a non-inerting form. This is not a good circuit because both positie and negatie feedback paths are balanced by the choice 5 / 3 /. If slight differences in the resistances allow the positie (anti-corectie) to preail, the put will pin itself to one of the oltage supply rails. A lossy ersion can be created by adding a resistance 4 in parallel with C 4 and make the circuit more stable. 9

20 Circuits, Deices, Networks and Microelectronics POTFOLIO and UMMAY Name: basic non-inerting Variant: unity-gain buffer Variant: potentiometer Name: basic inerting Variant: summing point Name: - ladder feedback Name 4-bit DAC (digital-analog conerter) Name: Instrumentation amplifier Name: Bandwidth select 0

21 Circuits, Deices, Networks and Microelectronics APPENDIX 5-: imulation example of the ideal opamp as a nullator-norator. Topology # (figure A5-.a) is the correct form for use of the opamp in a non-inerting situation Figure A5-.(a) Inerting topology Figure A5-.(b) imulation put Figure A5-.(a) Inerting topology Figure A5-.(b) imulation put The puts are the same (!!). But topology # (figure A5-.b) is an inalid feedback. And yet, other than the labeling, the put for the inalid topology is identical to that of topology # (the alid one). Note the polarity of the inputs. If a real opamp is used, topology # will go to Hell. The simulation software is treating the opamp as a nullator-norator, which is only alid if the feedback is to the (-) input. (This is one of those rare instances where the simulation platform does not tell the whole truth - and cannot).