Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS
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1 TECHNICAL DATA IW0B Analog Muliplexer Demuliplexer HighPerformance SiliconGae CMOS The IW0B analog muliplexer/demuliplexer is digially conrolled analog swiches having low ON impedance and very low OFF leakage curren. Conrol of analog signals up o peakopeak can be achieved by digial signal ampliudes of. o (if CC =, a CC EE of up o can be conrolled; for CC EE level differences above a CC of a leas. is required). These muliplexer circuis dissipae exremely low quiescen power over he full CC and CC EE supplyvolage ranges, independen of he logic sae of he conrol signals. When a logic is presen a he ENABLE inpu erminal all channels are off. The IW0B is a single 8channel muliplexer having hree binary conrol inpus, A, B and C, and an ENABLE inpu. The hree binary signals selec of 8 channels o be urned on, and connec one of he 8 inpus o he oupu. Operaing olage Range:.0 o 8 Maximum inpu curren of μa a 8 over full packageemperaure range; 0 na a 8 and 2 Noise margin (over full package emperaure range):.0 supply 2.0 supply 2. supply 6 N SUFFIX PLASTIC D SUFFIX SOIC 6 ORDERING INFORMATION IW0BN Plasic DIP IW0BD SOIC T A = o 2 C for all packages PIN ASSIGNMENT LOGIC DIAGRAM SinglePole, 8Posiion Plus Common Off FUNCTION TABLE ANALOG INPUTS/OUTPUTS X0 X X2 X X X X6 X7 2 2 MULTIPLEXER/ DEMULTIPLEXER X COMMON OUTPUT/INPUT Conrol Inpus ON Enable Selec Channels C B A L L L L X0 L L L H X A CHANNELSELECT INPUTS B C ENABLE 9 6 L L H L X2 L L H H X L H L L X L H L H X PIN 6 = CC L H H L X6 PIN 7 = EE L H H H X7 PIN 8 = H X H = high level L = low level X = don care X X None
2 IW0B MAXIMUM RATINGS * Symbol Parameer alue CC DC Supply olage (Referenced o ) 0. o + IN DC Inpu olage (Referenced o ) 0. o CC +0. I IN DC Inpu Curren, per Pin ± ma P D Power Dissipaion in Sill Air 00* mw P o Power Dissipaion per Oupu Traisor 0 mw Tsg Sorage Temperaure 6 o +0 T L Lead Temperaure, mm from Case for Seconds 260 (Plasic DIP or SO Package) *Maximum Raings are hose values beyond which damage o he device may occur. Funcional operaion should be resriced o he Recommended Operaing Condiio. * for Plasic DIP from o +0, for SO Package from o +6. +Deraing Plasic DIP: 2 mw/ from 0 o 2 SO Package: 7 mw/ from 6 o 2 RECOMMENDED OPERATING CONDITIONS Symbol Parameer Min Max CC DC Supply olage (Referenced o ).0 8 IN DC Inpu olage (Referenced o ) 0 CC T A Operaing Temperaure, All Package Types +2 This device conai proecion circuiry o guard agai damage due o high saic volages or elecric fields. However, precauio mus be aken o avoid applicaio of any volage higher han maximum raed volages o his highimpedance circui. For proper operaion, IN and OUT should be corained o he range ( IN or OUT ) CC. Unused digial pi mus be ied o an appropriae logic volage level (e.g., eiher or CC ). Unused Analog I/O pi may be lef open or erminaed.
3 IW0B DC ELECTRICAL CHARACTERISTICS Digial Secion Symbol Parameer Tes Condiio IH IL I IN I CC Minimum HighLevel Inpu olage, ChannelSelec or Maximum Low Level Inpu olage, ChannelSelec or Maximum Inpu Leakage Curren, ChannelSelec or Maximum Quiescen Supply Curren (per Package) IS = CC hru kω I IS <2μA on all OFF Chanels R L =kω o IS = CC hru kω I IS <2μA on all OFF Chanels R L =kω o IN = CC or Channel Selec = CC or CC Guaraneed Limi ±0. ±0. ±.0 μa μa DC ELECTRICAL CHARACTERISTICS Analog Secion CC Symbol Parameer Tes Condiio R ON Maximum ON Resisance IS = o CC ΔR ON I OFF Maximum Difference in ON Resisance Beween Any Two Channels in he Same Package Maximum Off Channel Leakage Curren, Any One Channel Maximum Off Channel Leakage Curren, Common Channel Guaraneed Limi * * * ±0 ±0 ±00 na 8 ±0 ±0 ±00 Ω Ω * Typical alue
4 IW0B AC ELECTRICAL CHARACTERISTICS (C L =0pF,Inpu r = f =.0 ) CC Symbol Parameer PHL( PLH) PHL( PLH) PZL( PZH) PZL2( PZH2) PLZ( PHZ) PLZ2( PHZ2) C IN C I/O Maximum Propagaion Delay, Analog Inpu o Analog Oupu (Figure ) R L =0kΩ, Maximum Propagaion Delay, ChannelSelec Inpu o Analog Oupu (Figure ) R L =0 kω, Maximum Propagaion Delay, ChannelSelec Inpu o Analog Oupu (Figure 2) R L = kω Maximum Propagaion Delay, Enable o Analog Oupu (Figure 2) R L = kω Maximum Propagaion Delay, ChannelSelec Inpu o Analog Oupu (Figure 2) R L = kω Maximum Propagaion Delay, Enable o Analog Oupu (Figure 2) R L =,0 kω Guaraneed Limi EE =В, = EE =В, = EE =В, = EE =В, = Maximum Inpu Capaciance, ChannelSelec or 7. pf Maximum Capaciance EE == C IS * pf C OS 0* Feedhrough C IOS 0.2*
5 IW0B ADDITIONAL APPLICATION CHARACTERISTICS Symbol Parameer Tes Condiio BBW f f 2 THD AO/I Maximum On Channel Bandwidh or Minimum Frequency Respoe (db) (0db) Feedhrough Frequency (All Channels OFF) (0db) Signal Crossalk Frequency Toal Harmonic Disorion Addressor Enable o Signal Crossalk CC IS ** Limis Typical alue 2 R L =kω log( OS / IS )=db OS a Common OUT/IN 2, MHz OS a Any Channel 2, 60 R L =kω log( OS / IS )=0db OS a Common OUT/IN 2, 2 MHz OS a Any Channel 2, 8 R L =kω log( OS / IS )=0db Beween Any 2 Channels 2, MHz f IS =khz sine wave, R L =kω*** r, f = Square Wave ** Peakopeak volage symmerical abou ( CC EE )/2. *** Boh ends of channel., 2, % 6 m (Peak)
6 IW0B INPUT ANALOG OUT PLH TLH 0% 0% % 90% PHL THL CC CC Figure. Swiching Waveforms r % PLZ 90% 0% f CC 0% PZL 90% CC ANALOG OUT % 90% OL OH PHZ % PZH Figure 2. Swiching Waveforms EXPANDED LOGIC DIAGRAM Channel IN/OUT Ucc A B C 9 6 ENABLE Logic Level Conversion Binary o of 8 Decoder wih Enable COMMON OUT/IN 8 7 EE
7 IW0B N SUFFIX PLASTIC (MS 00BB) A 6 NOTES: G F 0.2 (0.0) M T 9 8 D N B C T K SEATING PLANE M L H J Dimeio, mm Symbol MIN MAX A B C. D F..78 G 2. H 7.62 J 0 K L M imeio A, B do no include mold flash or prorusio. Maximum mold flash or prorusio 0.2 mm (0.0) per side. N 0.8 D SUFFIX SOIC (MS 02AC) T H 6 D G A 0.2 (0.0) M T C M 9 8 NOTES:.Dimeio A and B do no include mold flash or prorusion. 2.Maximum mold flash or prorusion 0. mm (0.006) per side for A, for B 0.2 mm (0.0) per side. B K P C SEATING PLANE J R x F M Dimeio, mm Symbol. MIN MAX A B C..7 D F G.27 H.72 J 0 8 K M P R
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