A Study of Passivation, Dark Current and 1/f Noise in Mid-wave Infrared HgCdTe Photovoltaic Detectors

Transcription

1 A Study of Passivation, Dark Current and 1/f Noise in Mid-wave Infrared HgCdTe Photovoltaic Detectors by Ryan James Westerhout, B.E. (Hons.), B.Sc. This thesis is presented for the degree of Doctor of Philosophy of The University of Western Australia School of Electrical, Electronic and Computer Engineering The University of Western Australia 2013

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3 Declaration of Published Work Appearing in Thesis This Thesis contains published work and/or work prepared for publication, some of which has been co-authored. Signature:... (Candidate) Ryan J. Westerhout Signature:... (Supervisor) A/Prof. C. A. Musca Signature:... (Supervisor) W/Prof. L. Faraone

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5 Ryan Westerhout 12 Charles St. Shenton Park, Western Australia Australia Executive Dean, Faculty of Engineering, Computing and Mathematics, The University of Western Australia, Crawley, Western Australia, 6009 Australia Dear Sir, I am pleased to present this thesis entitled A Study of Passivation, Dark Current and 1/f Noise in Mid-wave Infrared HgCdTe Photovoltaic Detectors as required for a Doctor of Philosophy Degree. Yours sincerely, Ryan J. Westerhout

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7 For Mum and Dad

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9 Abstract There are many areas in which the detection of infrared (IR) radiation plays a crucial role, such as astronomy, biomedical diagnostics, and defence and security applications. Photodiodes are currently the most widely used detection devices as they provide low power, high pixel density, fast response times and a more uniform spatial response across the focal plane imaging array. For high quality IR detectors the material of choice is an alloy of mercury telluride and cadmium telluride (HgCdTe). This is due to the desirable properties of HgCdTe, in particular the variable cutoff wavelength from 0.7 to 25 µm and lattice-matching across the entire alloy range. However, HgCdTe material is difficult to work with and uniformity and yield are still unresolved issues. At The University of Western Australia (UWA), HgCdTe photodiode passivation is a two step process, consisting of a layer of Molecular beam epitaxy (MBE) deposited CdTe and a thermally evaporated layer of ZnS [1, 2]. During investigation of these devices, the ZnS layer can also be used as an insulator for a gate electrode to control the surface dark current characteristics of the p-n junction [3]. When measuring the 1/f noise characteristics of these diodes the insulating properties of the ZnS degrade with time, eventually resulting in the diodes no longer being controlled by the gate electrode. It is proposed that SiN is a suitable replacement for ZnS as the insulating layer for gate controlled HgCdTe photodiodes. SiN has previously been used in microelectronics as a protective layer against mobile ions and other external contaminants in Si-SiO 2 microelectronic technology. Mid-wave infrared (MWIR) photon detectors are typically operated at low temperatures to obtain a high signal-to-noise ratio. However, cryogenic cooling systems are expensive, bulky, unreliable and inconvenient. It has been proposed that using heterostructure-based devices will suppress generation-recombination (GR) noise; however, these heterostructure devices exhibit large 1/f noise which seriously limits their performance. Reducing this 1/f noise will increase performance and allow operation of these devices at lower frequencies. Determining the origins of 1/f noise in HgCdTe photodiodes is also important in the improvement of focal plane array performance as 1/f noise often limits performance, especially at higher temperatures and higher reverse biases [4, 5], and since infrared imaging systems operate at low frame rates where 1/f noise is dominant [6]. Hence, understanding the mechanisms of 1/f noise within HgCdTe photodiodes is important in improving focal plane array performance, and for operation of these devices at higher temperatures. This thesis details the investigation of SiN as a surface passivation/insulation layer for use in HgCdTe photodiodes. It was found that SiN films deposited by plasma-enhanced chemical vapour deposition (PECVD) at 125 C, under high power and low pressure condii

10 tions gave the highest resistivity and most stable films. The deposition conditions for the SiN insulator that was used for fabrication of HgCdTe photodiodes are deposition temperature of 125 C, RF power of 200 W, chamber pressure of 300 mtorr, and SiH 4 :NH 3 :N 2 flow ratio of 5:45:100. By decreasing the process pressure the density and compressive stress of the SiN film are able to be increased and, thus, render the films less susceptible to long-term instabilities. FTIR measurements show no change in composition of the films after 87 days in a laboratory atmosphere, indicating good stability. This is mirrored in the leakage current measurements which show little to no degradation over time. It is concluded that the lower chamber pressure and higher power during deposition produces higher density films such that the rate of percolation of external contaminants through the film is greatly reduced. Overall, SiN was found to be a superior insulating layer and more stable than the previously used ZnS film. Non-gated diodes with MBE-deposited CdTe and PECVD-deposited ZnS passivation had zero-bias resistance-area product (R 0 A) values of Ω cm 2 and Ω cm 2 for 300 µm and 410 µm diameter diodes, respectively. Gated diode measurements indicated that R 0 A values of as high as Ω cm 2 are achievable with fine-tuning of the SiN charge. The R 0 A of gated diodes fabricated in this thesis were found to range from 10 2 to 10 7 Ω cm 2 as the gate bias was increased from -3 to 2.3 V, which is up to five orders of magnitude improvement in the performance of the device. Changing the gate bias results in different dark current components dominating the R 0 A value. By modifying the standard HgCdTe photodiode dark current equations to account for surface gate-bias induced band-bending a first-order approximation that matches the experimentally-observed behaviour of gated photodiodes was obtained. This model does not include interface traps and field-induced junction breakdown effects. However, the model does provide a sufficiently accurate first order-approximation that is able to explain the behaviour of gated HgCdTe photodiodes. Noise measurements on photodiodes were undertaken on devices fabricated with various passivation methods. When this data was correlated with the dark current data for the same device, it was found that the 1/f noise was closely correlated with the dark current. In particular, the trap-assisted tunnelling (TAT) current I gr was related to the total dark current I n and the generation-recombination current I gr by I n (V d ) = α gr Igr βgr (V d )f γ + α tat I βtat tat (V d)f γ where the Hooge parameter α was found to be between and , and β was between 0.60 and It was also found that devices passivated with MBE-deposited CdTe produce lower levels of 1/f noise in comparison to devices with evaporated CdTe. Larger area devices also produced higher 1/f noise; however, further research is required to confirm these relationships between the passivation process and device area with 1/f noise. From this research it is recommended that in order to reduce the 1/f noise present within HgCdTe photovoltaic detectors, dark currents need to be reduced and, in particular, any tunnelling currents present within the diode need to be minimised. ii

11 List of Acronyms & Abbreviations AFM APCVD BOE BTB CdTe CV CVD DD EPD ERCVD FIJ FIJC FOV FPA FTIR GR HgCdTe HRXRD ICPRIE IR IV JFET LCVD LPCVD LPE LWIR MBE MEMS MIM Atomic force microscopy Atmospheric pressure chemical vapour deposition Buffered oxide etch Band-to-band Cadmium Telluride Capacitance-voltage Chemical vapour deposition Deionized distilled water Etch pit density Electron cyclotron resonance chemical vapour deposition Field-induced junction Field-induced junction current Field of view Focal plane arrays Fourier-transform infrared spectroscopy Generation-recombination Mercury Cadmium Telluride High Resolution X-Ray Diffraction Inductive coupled plasma reactive ion etching Infrared Current Voltage Junction field-effect transistor Laser-assisted chemical vapour deposition Low pressure chemical vapour deposition Liquid Phase Epitaxy Long-wave infrared Molecular beam epitaxy Microelectromechanical systems Metal-insulator-metal iii

12 MIS MJ MNOS MOCVD MOS MOSFET MWIR PC PCVD PECVD PR PSD PV PVD RA RF RIE ROIC s SiN SNR SRH SSR SWIR TAT THM UWA VIP VPE ZnS Metal-insulator-semiconductor Metallurgic junction Metal-Nitride-Oxide-Silicon Metalorganic chemical vapour deposition Metal-Oxide-Semiconductor Metal-Oxide-Semiconductor field effect transistor Midwave infrared Photoconductor Photon-assisted chemical vapour deposition Plasma-enhanced chemical vapour deposition Photoresist power spectral density Photovoltaic Physical vapour deposition Resistance area product Radio-frequency Reactive ion etching Readout integrated circuit Surface Silicon Nitride Signal-to-noise ratio Shockley-Read-Hall Solid State Recrystallisation Shortwave infrared Trap-assisted tunnelling Travelling Heater Method University of Western Australia Vertically integrated photodiode Vapour phase epitaxy Zinc Sulfide iv

13 List of Constants and Symbols Symbol Description Value Units c Speed of light ms 1 x x-mole ratio (unitless) E g Bandgap ev T Temperature K λ Wavelength m n i Intrinsic carrier concentration cm 3 k Boltzmann s constant ev K 1 m o Electron rest mass kg m e,m Effective mass (unitless) ɛ s High frequency dielectric constant (unitless) ɛ 0 Static constant F/m µ e Electron mobility cm 2 /(V.s) µ h Hole mobility cm 2 /(V.s) A e Electrical area cm 2 A o Optical area cm 2 R λ Spectral current responsivity A/W η Quantum efficiency (unitless) q Electron charge C g Photoelectric gain (unitless) D Detectivity cm Hz 1/2 W 1 f Frequency bandwidth Hz I n Noise current A Hz 1/2 G Generation rate s 1 R Recombination rate s 1 h Planck s constant ev.s t Detector thickness cm α Absorption coefficient cm 1 v

14 Symbol Description Value Units R 0 A Dynamic resistance area product at zero bias Ω cm 2 I Current A V j Junction voltage V ρ Resistivity Ω cm n Index of refraction (unitless) N fc Density of fixed charges cm 2 N ss Density of Fast surface states cm 2 ev 1 Q s Surface charge per unit area C cm 2 n i Intrinsic carrier concentration cm 3 x d Depletion width at surface cm N a Acceptor doping cm 3 ψ s Surface potential ev ψ b Built-in potential ev ψ(x) Potential ev E f Extrinsic Fermi level ev E i Intrinsic Fermi level ev E c Conduction band energy ev E v Valence band energy ev N D Donor doping cm 3 V t Thermal voltage V φ(x) Total band bending ev φ s Surface band bending ev n s Electron surface concentration cm 3 p s Hole surface concentration cm 3 F s Surface electric field V/cm λ i Intrinsic Debye length cm C Capacitance F C I Insulator capacitance F t I Insulator thickness cm C s Semiconductor surface capacitance F.cm 2 Q ot Insulator-trapped charge C.cm 2 Q m Mobile ion charge C.cm 2 Q f Fixed oxide charge C.cm 2 Q it Interface trap charge C.cm 2 vi

15 Symbol Description Value Units Φ m Metal work function ev Φ s Semiconductor work function ev V fb Flatband voltage V σ Thin film stress Pa χ Electron affinity ev E Biaxial modulus Pa R Radius of curvature m t Thin film thickness m R d Dynamic resistance Ω RA Resistance-area product Ω cm 2 A j Area of the photodiode cm 2 V f Forced voltage V V j Junction voltage V R s Series resistance Ω R diff Diffusion resistance Ω R T AT Trap assisted tunnelling resistance Ω R BT B Band-to-band tunnelling resistance Ω R shunt Shunt resistance Ω R surface Surface resistance Ω W Depletion width cm J diff Diffusion current A.cm 2 τ e Electron lifetime s τ h Hole lifetime s a n-type diode thickness cm d p-type diode thickness cm E t Trap energy level (unitless) J GR Generation-recombination current A.cm 2 N C Conduction band effective density of states cm 3 N V Valence band effective density of states cm 3 J BT B Band-to-band tunnelling current A.cm 2 E Electric field within the space-charge region V/cm Reduced Planck s constant J/s J T AT Trap assisted tunnelling current A.cm 2 vii

16 Symbol Description Value Units W c Transition matrix element between the trap level and conduction band V 1 cm 3/2 N t Trap density in the space-charge region cm 3 P Kane matrix element ev.m V R Reverse junction bias V W Gmax Maximum depletion region width cm I GR,F J Field-induced GR current A I GR,s Surface GR current, A I GR,MJ GR current through the metallurgic junction A E ss Energy of the effective trap level ev N st Surface trap density C.cm 2 v th Thermal velocity of an electron cm/s σ Effective capture cross section of both electrons and holes cm 2 F Effective electric field V/cm F 1 Fitting factor to account for geometrical effects ~ 1.0 (unitless) f, ω Frequency Hz, rad/s In 2 Total noise A 2 Hz 1 Iamp 2 Amplifier noise A 2 Hz 1 I1/f 2 1/f noise A 2 Hz 1 I 2 1/f 2 Noise due to the relaxation of material defects A 2 Hz 1 IGR 2 GR noise A 2 Hz 1 Ishot 2 Shot noise A 2 Hz 1 Iph 2 Photon noise. A 2 Hz 1 Q B Background photon flux s 1 A c Optical collection area cm 2 R(z) G(z) Recombination rate within the depletion region Generation rates within the depletion region s s S x (ω) Power spectral density W.Hz 1 σ Conductivity S cm 1 N tot Total number of charge carriers (unitless) viii

17 Symbol Description Value Units α, β, γ Noise fitting parameters A Hz 1/2 ix

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19 Acknowledgements There are many people who have contributed to this thesis. In particular, Assoc. Prof. Charles Musca for his support, guidance and help throughout the years. constant help and advice this thesis would never have been completed. Without his Thanks to W/Prof. Laurie Faraone for giving me the chance to work on this project, for his guidance and advice. Also thanks to Prof. John Dell and Dr Gia Parish. Thanks to the group secretary Sabine Betts for her help keeping everything running smoothly. Thanks to all those who helped with the technical side, Dr Jarek Antoszewski, Dr Thyuen Nguyen for help with fabrication of the diodes; Dr Richard Sewell and Dr Gordon Tsen for growing the MBE CdTe passivation layers; Dr Gilberto Umana-Membreno for his help with capacitance-voltage measurements; Dr Jason Milne for his help with the SiN fabrication. To the Gledden Trust and the Microelectronics Research Group for their financial support. To all the fellow MRG students along the years who helped keep me sane, Tim, Tam, Stuart, Byron, Ben, Justin, and Mariusz. To Jo for helping to proof read this thesis, and for her support. And finally to my family for being so supportive over the many years. xi

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21 Contents 1 Introduction Infrared radiation Types of infrared detectors Applications of infrared detection HgCdTe sensor devices Thesis aims and objectives Overview of thesis Summary HgCdTe as an infrared detector Growth of HgCdTe HgCdTe Properties Bandgap Intrinsic concentration Effective mass Dielectric constant Mobility Recombination mechanisms Fundamental limit of performance Focal plane arrays Conclusion Fabrication of HgCdTe photodiodes Photovoltaic detectors Theory of operation Fabrication process Cleaning and thinning of LPE layer Deposition of surface passivation Plasma type conversion Deposition of insulator ZnS deposition SiN deposition Contacts to HgCdTe xiii

22 CONTENTS Dry-etching process for SiN Final device structure Device mounting Summary of fabricated devices Junction formation technologies HgCdTe processing issues Surface passivation Surface charge effects Current passivation technologies CdTe Other passivation materials Conclusions SiN passivation of HgCdTe photodiodes Introduction The MIS capacitor Basic MIS Theory Surface charge (Q s ) Capacitance Deviations from the ideal CV curve Metal-semiconductor work function difference Interface-trapped charge Other charges within the insulator Polarization effects Deposition of SiN SiN plasma-enhanced chemical vapour deposition SiN characterisation Fabrication process Capacitor Fabrication Resistivity of Films Effect of RF power Effect of thickness Effect of chamber pressure Substrate temperature RF frequency Precursor gases Film Stress SiN film composition and stability HgCdTe photodiode passivation with SiN MIS capacitors SiN passivated HgCdTe photodiode fabrication xiv

23 CONTENTS Hysteresis caused by SiN films Conclusions Dark currents in HgCdTe photodiodes Introduction Current-Voltage measurements Dark currents in non-gated photodiodes Diffusion current Generation-recombination current Band-to-band tunnelling current Trap-assisted tunnelling current Other dark current mechanisms Dark current measurements Dark currents in gated photodiodes n + p gated diode behaviour GR currents in the surface space charge region Gated dark current modelling Modelled data Field-induced junction breakdown Other surface effects Gated Diode Experimental Results Effects of gate bias on R 0 A Changes in resistance area product due to gate bias Changes in dark current with gate bias The effects of temperature on R 0 A Comparison of passivation schemes Conclusions /f Noise in HgCdTe Photodiodes Introduction Fundamental noise sources in photodiodes Johnson-Nyquist noise Shot noise & photon noise Generation-recombination noise /f noise Upper and lower frequency limits of 1/f noise Number versus mobility fluctuations Physical mechanisms and theoretical models Contact noise Resistance fluctuations Temperature fluctuations xv

24 CONTENTS Hooge s theory Lattice scattering Surface trapping in semiconductors Discontinuous films /f noise in HgCdTe photovoltaic detectors Quantum 1/f noise Dark current dependence of 1/f noise Tunnelling current dependence Diffusion current dependence GR current dependence Photocurrent dependence Band bending at the surfaces Depletion region Dislocations Noise measurement equipment setup Low noise transimpedance amplifier Noise versus frequency results Noise and dark currents Comparison of passivation types Correlation with photodiode area Conclusions Conclusions Original Contributions and Achievements Summary of contributions and achievements SiN films for HgCdTe photodiodes HgCdTe photodiodes with SiN as the insulator Noise measurements on HgCdTe photodiodes Recommendations for Future Work Summary Author s Publication List Bibliography 179 A Processing methods 193 A.1 Resists A.1.1 HPR A.1.2 AZ A.2 Etches A.2.1 SiN wet etch A.2.2 SiN dry etch A.2.3 CdTe etch xvi

25 CONTENTS A.2.4 Surface etch in Br/Methanol A.2.5 Thinning active layer (HgCdTe etch) A.2.6 ZnS etch A.3 Sample Cleans A.3.1 Gallium clean A.3.2 Organics clean A.4 Deposition A.4.1 Evaporation of CdTe A.4.2 ZnS A.4.3 SiN A.4.4 Cr/Au A.5 RIE type conversion A.6 Masks xvii

26 CONTENTS xviii

27 List of Tables 1.1 Generally accepted IR regions Applications of IR detection Advantages and disadvantages of HgCdTe as an infrared detector Commercially available diode architectures List of fabricated devices Carrier concentrations in type converted Ag doped LPE HgCdTe The criteria for good passivation of HgCdTe photodiode arrays Properties of non-cdte passivant films on HgCdTe Summary of CVD processes Final process conditions determined for the fabrication of SiN passivated HgCdTe photodiodes SiN PECVD deposition process SiN wet etch process SiN dry etch process Conditions for SiN deposition in the PECVD system Deposition conditions for the two films used to study the effects of ageing on the film composition Process conditions for the fabrication of SiN films used to fabricated MIS capacitors on silicon Modelling parameters unless otherwise specified List of fabricated devices R 0 A for the different processing runs Parameters for modelling Highest measured R 0 A for each of the various passivation schemes Model parameters used to fit the experimental the data Selected models for 1/f noise in semiconductors and metals Summary of noise measurements for devices with different passivation schemes Summary of noise measurements for devices with different areas Final process conditions determined for the PECVD deposition of SiN passivation for HgCdTe photodiodes xix

28 LIST OF TABLES 7.2 Highest measured R 0 A for each of the various passivation schemes xx

29 List of Figures 1.1 Blackbody curves calculated from Planck s Law Transmission of IR through the atmosphere Overview of technology available for IR detectors Examples of infrared images Lattice constant for various IR detection materials Bandgap and cutoff wavelength versus x-mole ratio for 77 K, 200 K and 300 K Intrinsic carrier concentration for HgCdTe for x-ratios of 0.2, 0.3, and Recombination mechanisms in equilibrium Bandstructure of HgCdTe Dominant Auger transitions in HgCdTe Structure of a mesa isolated P-π-N HgCdTe non-equilibrium photovoltaic detector Hybrid FPA Commonly used photodiode configurations Cross-section of diodes fabricated at The UWA Band diagram of a p-n diode showing creation of an electron-hole pair via incident light Dry etching procedure used for fabricating SiN passivated HgCdTe photodiodes Growth temperature profile for CdTe passivation of photodiodes for MBE deposited and thermally evaporated CdTe Plasma Technology RIE80 parallel plate reactor used to type convert n-type HgCdTe material to p-type material Comparison of previous bonding pad configuration with current configuration Steps for dry etch of SiN Top view photograph of the fabricated photodiodes Photograph of the fabricated photodiodes mounted on a 84 pin chip carrier Theoretical depletion regions for an n + p photodiode under various surface charges MIS capacitor structure used to measure the properties of the insulator films for HgCdTe photodiodes Energy band diagram for a MIS capacitor for p-type silicon xxi

30 LIST OF FIGURES 4.3 Plot showing the variation of the surface charge in a MIS p-type semiconductor capacitor Q s as a function of the barrier height Ideal high and low frequency small-signal capacitance of p-type MIS device Band diagram schematic of various defects found in a MIS system Diagram of the effect of a metal-semiconductor work function difference on the CV curve Effect of interface states on the high frequency CV curve Charge density distribution of charge located within the insulator Effect of charges (trapped insulator, mobile and fixed) on the CV curve Diagram of the dielectric polarisation effect. An electric field generates dipoles which align with the field Schematic of transport and reaction mechanisms in the CVD process Diagram of the PECVD system used for SiN deposition MIM fabrication procedure Final structure of MIM capacitors used for testing insulator properties of SiN IV characteristics of a MIM capacitor with a SiN film deposited SiN resistivity as a function of varying process pressure Effect of pressure on SiN resistance of film over several weeks FTIR of two SiN films immediately after fabrication FTIR measurements taken after fabrication FTIR measurements taken after fabrication for film FTIR measurements as a function of time after fabrication Normalised curves of measured C-V characteristics for a p-type HgCdTe MIS capacitor with a SiN insulator Normalised curves of measured C-V characteristics for a p-type HgCdTe MIS capacitor with a ZnS insulator Dry etching procedure used for fabricating HgCdTe photodiodes with SiN as the insulation layer Cross-section of fabricated diodes Measured dynamic resistance area product for ungated photodiodes of 300 µm and 410 µm diameter at 77 K and 0 FOV. Device ID RJW Measured dynamic resistance area product for a SiN passivated gated photodiode of 410 µm diameter at 77 K and 0 FOV. Gate voltage is referenced to the p-type substrate. Maximum R 0 A of Ω cm 2 (>-2.5V gate bias). Device ID RJW Measured dynamic resistance area product for a gated photodiode from RJW Measured dynamic resistance area product for a gated photodiode from RJW MIS fabrication process CV result for three Si/SiN capacitors measured at 300 K Average hysteresis of SiN MIS capacitors measured at 300 K Setup for IV measurements on HgCdTe photodiodes xxii

31 LIST OF FIGURES 5.2 Example of a dark current measurement of a HgCdTe MWIR photodiode (RJW07, 300 µm diameter) Basic diode equivalent circuit Mechanism of diffusion and GR currents within the diode Dimensions for a n-p diode Theoretical effects of increasing recombination time (τ h ) Theoretical effects of changes in hole lifetime and trap position on GR current Mechanism of BTB tunnelling in HgCdTe photodiodes Theoretical effects on RA of changing depletion width for TAT current Mechanism of TAT tunnelling in HgCdTe photodiodes Theoretical effects of changing trap density and depletion width on TAT Theoretical effects of increasing trap density on TAT Resistance-area product for the different processing runs Model fit to dark current data for un-gated devices from RJW Cross-section of fabricated HgCdTe gated photodiodes Ideal gate controlled n + p diode. Shaded region represents the depletion region. W is the depletion width of the bulk junction Theoretical behaviour of a n + p gated diode with no applied junction bias Theoretical reverse bias current through a n + p gated diode as a function of the gate voltage Calculated and experimental dark current versus gate bias for a junction bias of -5 mv at 77 K Theoretical behaviour of a field-induced junction for various gate biases Theoretical depletion regions for a gated photodiode for varying gate bias voltages Top view of the gated diodes Measured dynamic resistance area product at a junction bias of 0 V versus gate bias for gated photodiodes at 77 K, RJW Schematic of the depletion region in a diode with the p-type region at flatband and at depletion Measured dark current for a gated photodiode of 300 µm diameter at 77 K and 0 FOV Measured dynamic resistance area product for a gated photodiode of 300 µm diameter at 77 K and 0 FOV Current as a function of junction bias for different gate voltages. RJW07, 300 µm diameter, 77 K. a) -8 V to 3 V gate bias, b) 3.5 V to 8 V gate bias Magnitude of dark current versus gate bias for a gated photodiode of 300µm diameter at 77 K from RJW R 0 A as a function of temperature for varying gate biases R 0 A versus gate bias for selected devices from RJW07, RJW09, RJW11, and RJW Examples of the best diodes take from samples with various passivation schemes Modelled data for the best diodes from samples with various passivation schemes xxiii

32 LIST OF FIGURES 6.1 Diagram of common noises sources found in photodiodes as a function of frequency Distribution of time constants for traps Two different types of traps that cause 1/f noise and Lorentzian noise Model of a discontinuous metal film Experimental setup to measure noise present in HgCdTe gated photodiodes Schematic for gate bias translation Schematic of amplifier and photovoltaic detector Amplifier calibration measurements Measured noise of a 500 MΩ wire-wound resistor at zero bias Measured amplifier noise with and without vibration isolation Measured noise spectra of a gated photodiode of 300µm diameter at 77 K and -5 mv junction bias for various gate biases Example of a fit to the noise data for a photodiode Cross-section of a fabricated HgCdTe gated photodiode Measured dark current on a gated photodiode of 300 µm diameter at 77 K and 0 FOV from RJW Measured noise at 1 Hz of a gated photodiode of 300 µm diameter at 77 K and 0 FOV from RJW Measured noise at 1 Hz of a gated photodiode of 300 µm diameter at 77 K from RJW07 and 0 FOV. The dashed lines are calculated using Equation /f noise measured at 1 Hz versus dark current magnitude for a 300µm diameter diode Measured dark current components at 1 Hz for a gated photodiode from RJW Measured noise at 1 Hz of a gated photodiode of 300 µm diameter at 77 K from RJW07 and 0 FOV with corrected equation Noise current versus dark current for photodiodes with various passivation schemes Noise current versus dark current for photodiodes with the same passivation scheme but different area A.1 Anneal profile A.2 Junction delineation mask A.3 SiN etch mask A.4 P-type etch mask A.5 Metalisation mask xxiv

33 Chapter 1 Introduction There are many areas in which the detection of infrared (IR) radiation plays a crucial role, such as astronomy, biomedical diagnostics, and defence and security applications. Photodiode-based sensors fabricated from HgCdTe are currently the most widely used technology for high performance IR detectors. For these high quality IR detectors the material of choice is an alloy of mercury, cadmium and tellurium (HgCdTe). These HgCdTe detectors provide low power operation, high density detection, fast response times and a uniform spatial response across the detector array. HgCdTe is used due to its many desirable properties, in particular the variable cutoff wavelength from 0.7 to 25 µm, and lattice matching across the complete alloy range. However, HgCdTe material is difficult to work with, and uniformity and yield are still issues. Most of the problems are due to the weak Hg-Te bond, the low melting point and the high vapour pressure of Hg. Nevertheless, high quality detectors have been fabricated from HgCdTe for many decades, and are in use today. The study of the material properties of HgCdTe is important to improve the quality of infrared detection devices. This chapter provides a general background to infrared radiation and infrared detection devices and reasons for the study of HgCdTe infrared detectors, as well as an overview of this thesis. 1.1 Infrared radiation Sir William Herschel first discovered infrared radiation in the year He used a prism to spread the sun s rays and used a thermometer to record the temperature of the rays. As the thermometer was moved from blue to red, an increase in temperature was recorded. However, once the thermometer was moved past the visible region, the temperature continued to increase. This showed that there is energy beyond the visible light spectrum, and this came to be known as infrared. The IR region of the electromagnetic spectrum spans from around 0.8 µm to 1000 µm in wavelength, with Table 1.1 showing the generally accepted IR regions; the region from 1.1 to 3 µm called shortwave IR (SWIR), 3 µm to 6 µm midwave IR (MWIR), and 8 µm to 14 µm long-wave IR (LWIR). One of the reasons these bands are of interest is due to the relationship between temperature and IR 1

34 1. Introduction Table 1.1: Generally accepted IR regions. Infrared band Abbreviation Approximate spectral region (µm) Near infrared NIR Shortwave infrared SWIR Midwave infrared MWIR 3-6 Longwave infrared LWIR 6-14 Very longwave infrared VLWIR Far infrared FIR Submillimeter infrared ) S W IR M W IR L W IR V L W IR F IR K µm K S p e c tra l R a d ia n t E m itta n c e (W c m K K K K K K W a v e le n g th (µm ) Figure 1.1: Blackbody curves calculated from Planck s Law (Equation 1.1). radiation, which is given by Planck s Law as follows: I (υ, T ) = 2hν3 c 2 1 e hν kt 1 (1.1) Where υ is the frequency and T is the temperature of the black body. Objects at room temperature (300 K) emit IR radiation in the LWIR and objects in the K range emit IR radiation in the MWIR range (see Figure 1.1). Another reason for the interest in these bands of IR is that they correspond to windows of transmission through the atmosphere (Figure 1.2). Common gasses found in the atmosphere are nitrogen, oxygen, CO 2, water vapour, ozone, methane, N 2 O and aerosols. Of these it is mainly CO 2 and water that absorb IR and cause a decrease in IR transmission through the atmosphere. 1.2 Types of infrared detectors Two general types of IR detectors exist that can be separated based on the method of detection: thermal or photon (Figure 1.3). Thermal detectors rely on absorption of energy which raises the temperature and hence changes the electrical properties of the material. 2

35 1.2. Types of infrared detectors Figure 1.2: Transmission of IR through the atmosphere [7]. Common thermal detectors are bolometers, thermopiles, and pyroelectric detectors [8]. The main advantage of thermal detectors is their room temperature operation and relative simplicity in comparison to photon detectors. However, thermal detectors typically have lower detectivity and a slower response than photon detectors. IR photon detectors work by absorbing photons which generate charge carriers, creating an electric signal. This category of devices can be broken down further into intrinsic, extrinsic, free carrier and quantum well detectors. Photon detectors have a high signal-to-noise ratio, fast response, and they show a selective wavelength dependence in their response. Since thermal transitions within the detector compete with optical transitions, it is necessary to cool the detectors to below room temperature. This cooling requirement makes photon detectors bulky, heavy and expensive. Significant research effort is currently being expended into increasing the operating temperature of these detectors. The two most commonly used types of photon detectors are photoconductors and photodiodes. The simpler of the two devices is the photoconductor which is a photosensitive resistor. It consists of a single type of semiconductor, either n-type or p-type. Incoming photons generate electron-hole pairs within the detector, increasing the conductivity of the device. This change in conductivity is measured as a change in voltage when the device is biased with a constant current. For photodiodes, incoming photons generate electron-hole pairs which diffuse throughout the detector. Once these carriers reach the depletion region of the photodiode they are swept across the junction by the in-built electric field. This causes a charge imbalance within the device, which can be measured using a transimpedance amplifier. Although photoconductors are easier to fabricate, photodiodes have several advantages which justify their increased complexity. For instance, they can be fabricated in 2-D arrays and generally have a lower power consumption. Additionally, operation in slight reverse bias increases the dynamic resistance of the photodiodes, improving the carrier injection efficiency into the readout circuit. Even at slight reverse bias the power consumption of photodiodes is still much lower than that of photoconductors. Moreover, the photodiode architecture lends itself towards dual colour detectors and other third generation devices. Photodiodes are currently the most commonly used detectors for high quality IR sensors, and will be the focus of this thesis. 3

36 1. Introduction IR Detectors Thermal Thermopile bolometers, pyroelectric Photon Advantages: Light, rugged, reliable, and low cost Room temperature operation Disadvantages: Low detectivity at high frequency Slow response (ms order) Intrinsic Extrinsic Si:Ga, Si:As, Ge:Cu, Ge:Hg Free carriers PtSi, Pt2Si, IrSi Quantum wells Quantum dots InAs/GaAs, InGaAs/ InGaP, Ge/Si IV-VI PbS,PbSe, PbSnTe Advantages: Available low-gap materials Well studied Disadvantages: Poor mechanical properties Large permittivity II-VI HgCdTe Advantages: Easy band-gap tailoring Well-developed theory Multicolour detectors Disadvantages: Non-uniformity over large area High cost in growth and processing III-V InGaAs, InAs, InSb, InAsSb Advantages: Advantages: Very long wavelength Low-cost, high yields operation Large and close packed 2D Relatively simple technology arrays Disadvantages: Disadvantages: Extremely low temperature Low quantum efficiency operation Low temperature operation Advantages: Good material and dopants Advanced technology Possible monolithic integration Disadvantages: Heteroepitaxy with large lattice mismatch Type I GaAs/AlGaAs, InGaAs/AlGaAs Type II InAs/InGaSb, InAs/InAsSb Advantages: Advantages: Matured material growth Low Auger recombination Good uniformity over large rate area Easy wavelength control Disadvantages: Disadvantages: Low quantum efficiency Complicated design and Complicated design and growth growth Sensitive to the interfaces Advantages: Normal incidence of light Low thermal generation Disadvantages: Complicated design and growth Figure 1.3: Overview of technology available for IR detectors. Adapted from [8]. 4

37 1.3. Applications of infrared detection (a) (b) Figure 1.4: Examples of infrared images. a) False-colour image of blood circulation in a horse [10]. b) Image of power lines with a fault shown as the white (hot) region [11]. 1.3 Applications of infrared detection Some major applications for IR detectors are shown in Table 1.2. Commercial development of IR detectors has primarily been driven by military applications; some of which include night operation, targeting and tracking abilities, and detection of stealth planes or ships. This drive for military IR detectors has lead to IR detector technology being available in non-military applications. In particular, areas such as astronomy benefit from IR detection as it allows observation through interstellar dust, and in certain absorption bands, studies of stars, and planet atmospheres. Detection of infrared light with focal plane arrays can provide images of IR intensity. These images can be used for surveillance, astronomy, fault finding, and many other applications. Figure 1.4 shows two IR images: first, the blood circulation of a horse with and without a nailed on shoe, and second, power lines containing a fault as indicated by the white (hot) region. The latter can be used for early detection of faults in power systems. 5

38 1. Introduction Table 1.2: Applications of IR detection (from [9]). Application Enabling features Industry leaders Astronomy High sensitivity and low cost Ball, CE, IR Labs, NASA Customs and border control Low cost systems FSI, Hughes, Inframetrics, Coast Gaurd Environmental monitoring Radiometric accuracy and repeatability Ball, Hughes, Perkin Elmer, NASA General purpose cameras Low cost, quiet, no cooling Raytheon, IR Labs, DRA Infrared search and track Large FPAs, clutter rejection, efficient image processing Hughes, USAF, Spar Medical Apeciliase requirements, low life-cycle costs GE Medical, Agema, CE, NIH Military FLIRs Image fusion, stabilisation, two colour Raytheon, Hughes Night vision Low cost, good imagery, high reliability Hughes, NV, Mitsubishi Remote pollution monitoring Spectral agility, low cost, high reliability EDO/Barnes, Inframetrics, EPA Weather instruments and cameras Radiometric accuracy and repeatability, high reliability ITT, Westinghouse, NASA, USAF 6

39 1.4. HgCdTe sensor devices 1.4 HgCdTe sensor devices High performance IR detectors are primarily fabricated from an alloy of CdTe and HgTe known as HgCdTe. This is due to its many desirable properties, in particular the variable cutoff wavelength from 0.7 to 25 µm (a wide range of the IR spectrum) and lattice matching across the alloy range. However, HgCdTe is difficult to work with, and uniformity and yield remain issues. Most of the problems are due to the weak Hg-Te bond, the low melting point of Hg, and the high vapour pressure of Hg. Since Hg in the lattice is highly mobile this leads to a large variation in the stoichiometry and transport properties, and results in oxidation, mechanical damage, and reaction with metals. Furthermore, the weak bonds and high mobility of Hg in the lattice means that the unprotected surface of HgCdTe cannot be exposed to temperatures above 90 C [12] which leads to surface defects and interface instabilities [8]. HgCdTe has a narrow band-gap which means that defects at the surface of devices can greatly affect the properties of the device. A surface potential of less than 100 mev can accumulate, deplete or invert the surface, affecting device performance [12]. Despite these problems, and after the examination of other material systems, HgCdTe still remains the leading material for high performance infrared detectors. For high performance IR detectors, photodiodes are currently the most widely used devices as they provide low power, high density detection, and faster response times. Also, for imaging applications photodiodes provide a more uniform spatial response across the array. 1/f noise often limits performance in focal plane arrays [4, 5], so determining the origins of this noise is important for the improvement of these arrays. At higher operating temperatures the impedance of photodiodes in these arrays can be significantly lower than that required due to diffusion currents. A low impedance detector reduces injection efficiency into the readout circuit, which reduces the external quantum efficiency [13]. Cooling these devices can increase the detector impedance, however cryogenic cooling systems are expensive, bulky and inconvenient. To reduce the cooling requirements of these devices the photodiode can be operated in reverse bias, which increases the detector impedance. However, photodiodes operating in this mode have large 1/f noise. Since infrared imaging systems operate at low frame rates where 1/f noise is dominant [6], understanding the mechanisms of 1/f noise generation within the photodiodes is important in improving focal plane array performance, and allowing operation of these devices at higher temperatures. Other methods for operating at higher temperatures have been proposed, such as using heterostructure based devices which will suppress generation-recombination (GR) noise (caused by Auger processes) by decreasing the free carrier concentration below its equilibrium value [14]. This will in turn lead to a decrease in the level of shot noise observed in these diodes and provide higher performance at elevated temperatures. However, these heterostructure devices exhibit large 1/f noise which seriously limits their performance. Reducing this 1/f noise will increase performance and allow operation of these devices at lower frequencies. In this thesis gated MWIR HgCdTe photodiodes will also be used to investigate the 7

40 1. Introduction physical origin of 1/f noise generation. By varying the gate bias the band-bending of the surface at the junction can be controlled, thereby affecting the dominant dark current mechanisms. Measuring the noise spectrum of the diode can thus reveal any correlation between these dark currents and the 1/f noise. Few studies have looked at the correlation between 1/f noise and surface band-bending using gated photodiodes in HgCdTe. Since gated photodiodes allow control of the photodiode characteristics with a voltage, achieving the correct charge in the insulator is not imperative. However, the requirements of the properties of the insulator are increased due to the larger voltage stress placed upon it during these measurements. Gated photodiodes allow the investigation of the correct levels of charge required at the interface for the photodiodes. Practical devices do not include this gate, since it is only used as a tool for investigation of the photodiode surfaces. At The UWA photodiode passivation is a two step process, consisting of a 100 nm layer of MBE grown CdTe and historically, a thermally evaporated 200 nm layer of ZnS [1, 2]. The ZnS is also used as an insulator for the gate electrode in gated photodiodes to control the dark current characteristics. When measuring the 1/f noise characteristics of these diodes, the gates are subjected to considerable voltage stress, with voltages from 5-10 V for several hours. During this time the insulating properties of the ZnS degrade, and current begins to flow through the ZnS, resulting in the diodes no longer being controlled by the gate electrode. Furthermore, ZnS is hygroscopic and further degradation of the insulation properties occur if the devices are left in atmosphere. An alternative insulator to ZnS needs to be found. It is proposed that SiN can replace ZnS as the insulator for HgCdTe photodiodes. SiN has been shown to be more moisture resistant than ZnS [15], as well as having a high dielectric field strength, V/cm field breakdown limit, a high resistivity ( Ω cm), and is an effective barrier to mobile ions such as Na +. SiN has been used in microelectronics as a protective layer against mobile ions in Si-SiO 2 technology, and is present in devices such as metal-nitride-oxide-semiconductors, non-volatile memories, metal-insulator semiconductor solar cells, and hydrogenated amorphous silicon thin-film transistors [16]. 1.5 Thesis aims and objectives The main aims of this thesis are: To determine a new passivation technology that replaces ZnS with a more stable, high resistivity film (possibly SiN) within HgCdTe photodiodes, To determine methods of reduction of 1/f noise within HgCdTe photodiodes. Ideally this will improve the stability of the HgCdTe photodiodes, and allow operation of these devices at higher temperatures by improving the signal to noise ratio. 1.6 Overview of thesis An overview of the thesis is as follows: 8

41 1.7. Summary Introduction to infrared radiation: what infrared is, how it was discovered and the importance of the ability to detect it (this chapter). HgCdTe: advantages and disadvantages of use, growth of HgCdTe, and its material properties. Fabrication of HgCdTe photodiodes: review of photovoltaics, specifically photodiodes and HgCdTe photodiodes; review of ZnS passivated HgCdTe photodiodes. SiN passivation of photodiodes: development of SiN passivation for HgCdTe photodiodes, analysis of low temperature deposited SiN films required for passivation, analysis of SiN passivated HgCdTe photodiodes. Dark currents in HgCdTe photodiodes: measurement and analysis of dark currents in MWIR gated photodiodes. 1/f Noise in HgCdTe: measurement and analysis of 1/f noise in MWIR gated photodiodes. Conclusions: Summary of results, original contributions and published work. 1.7 Summary There are many areas in which the detection of infrared radiation is useful such as astronomy, medical, and military applications. Photodiodes are currently the most widely used devices as they provide low power, high density detection, faster response times and a more uniform spatial response across the array. IR detectors are primarily fabricated from HgCdTe due to its desirable properties; however, HgCdTe material is difficult to work with, and uniformity and yield remain issues. Despite these problems, and after the examination of other material systems, HgCdTe still remains the leading material for high performance infrared detectors. HgCdTe MWIR photon detectors are operated at low temperatures to obtain a high signal-to-noise ratio. However, cryogenic cooling systems are expensive, bulky and inconvenient. It has been proposed that using heterostructure-based devices will provide higher performance at elevated temperatures. However, these devices exhibit large 1/f noise which seriously limits their performance. Reducing this 1/f noise will increase performance and allow operation of these devices at lower frequencies. Determining the origins of 1/f noise in HgCdTe photodiodes is also important in the improvement of focal plane arrays and allowing higher dynamic resistances at higher temperatures. In this thesis we will use the gated photodiode structure to deliberately induce bandbending at the surface of the photodiode. This will allow the control of the dark current magnitudes at the surface. Gated MWIR HgCdTe photodiodes will also be used to investigate the physical origin of 1/f noise generation. By varying the gate bias, the bandbending of the junction at the surface can be controlled, thereby affecting the dominant dark current mechanisms. Measuring the noise spectrum of the diode can thus reveal any correlation between these dark currents and the 1/f noise. Few studies have looked at the correlation between 1/f noise and surface band-bending using gated photodiodes in HgCdTe. At UWA photodiode passivation is a two step process, consisting of a MBE grown CdTe 9

42 1. Introduction layer, and historically, a thermally evaporated layer of ZnS [1, 2]. When measuring the 1/f noise characteristics of these diodes, the gates are subjected to considerable voltage stress. During this time the insulating properties of the ZnS degrade, and current begins to flow through the ZnS, resulting in the diodes no longer being controlled by the gate electrode. In addition to this problem, ZnS is hygroscopic, and further degradation of the insulation properties occur if the devices are left in atmosphere. It is proposed that SiN can replace ZnS as the insulator for HgCdTe photodiodes, since SiN is more stable, is not hygroscopic and has a higher resistivity than ZnS. 10

43 Chapter 2 HgCdTe as an infrared detector IR detectors are primarily fabricated from HgCdTe due to its desirable properties, in particular the variable cutoff wavelength from 0.7 to 25 µm and lattice matching across the alloy range. Table 2.1 shows the various advantages and disadvantages of HgCdTe. HgCdTe is an alloy of CdTe and HgTe which is usually expressed as Hg 1 x Cd x Te, where x is the x-mole ratio. Changing the x-value changes the cutoff wavelength of HgCdTe. HgCdTe material is difficult to work with, and uniformity and yield remain issues. Most of the problems are due to the weak Hg-Te bond, the low melting point of Hg, and the high vapour pressure of Hg. The Hg in the lattice is highly mobile, and thus moves throughout the lattice creating vacancies (negatively charged) or interstitials (positively charged) [12]. The mobility of Hg through the lattice can also lead to a large variation in the stoichiometry and transport properties. This results in oxidation, mechanical damage, and reaction with metals. The shape of the Hg-Cd-Te phase diagram results in serious difficulties in repeatable growth of uniform composition bulk crystals and epitaxial layers [17]. The surface of the HgCdTe cannot be exposed to temperatures above 90 C [12] for several reasons. The weak bonds and high mobility of Hg in the lattice (especially when Table 2.1: Advantages and disadvantages of HgCdTe as an infrared detector [12, 17, 18]. Advantages Variable cutoff wavelength from 0.7 to 25 µm. Direct bandgap with high absorption coefficient. Moderate dielectric constant/index of refraction. Moderate thermal coefficient of expansion. Availability of lattice-matched insulating substrates for epitaxial growth. Lattice matched across x-range (good for heterostructures). Disadvantages Mechanically fragile. Lattice, surface, and interface instabilities. Hg in the lattice is highly mobile. Difficult to obtain repeatable growth. 11

44 2. HgCdTe as an infrared detector 4.0 ZnS Energy gap at 4.2 K (ev) ZnSe AlP AlAs GaP GaAs Si Ge Zn Mn Se CdS InP ZnTe CdSe GaSb AlSb Cd 0.5 Mn Te 0.5 CdTe 0.0 HgS InAs HgSe InSb HgTe o Lattice constant (A) Figure 2.1: Lattice constant for various IR detection materials. From [17]. HgCdTe is heated but not capped) lead to surface defects and interface instabilities [8]. Once formed, these defects can move throughout the lattice over hundreds of angstroms, even at room temperature [12]. Due to the narrow band-gap of HgCdTe, defects at the surface of devices can greatly affect the properties of the device. A surface potential of less that 100 mev can accumulate, deplete or invert the surface, thus affecting device performance [12]. These problems with HgCdTe have lead to the examination of other material systems for use as an IR detector. However, none of these materials have proven to have any fundamental advantages over HgCdTe. This is mainly due to the flexibility of the material, where the HgCdTe can be tailored for detection over a wide range of the IR spectrum. In addition, compared to other variable bandgap semiconductors, HgCdTe is the only material that covers a wide range of the IR spectrum whilst having nearly the same lattice parameter. The lattice parameter varies approximately 0.2 % between CdTe (E g =1.5 ev) and Hg 0.8 Cd 0.2 Te (E g =0.1 ev) [17], with the range from CdTe to HgTe shown in Figure 2.1. Therefore, complex bandgap devices such as dual and multicolour detectors can be constructed. This lattice matching across the range of the alloy is one of the major advantages of HgCdTe over other materials for IR detection. 2.1 Growth of HgCdTe There are four main technologies for growth of HgCdTe material [19]: liquid phase epitaxy (LPE), molecular beam epitaxy (MBE), bulk methods, and vapour phase epitaxy (VPE). For device quality epitaxial material, LPE is the most mature growth method. However since LPE is a high temperature growth process, this causes interdiffusion and graded interfaces; therefore it is undesirable for more advanced devices such as heterostructure devices. The current focus is on lower temperature growth methods such as MBE and metalorganic chemical vapour deposition (MOCVD). Growth of HgCdTe via MBE typically occurs at temperatures less than 200 C and for MOCVD at temperatures less than 12

45 2.1. Growth of HgCdTe 350 C [8]. MBE is the dominant growth method, and although crystal quality is not as high as LPE, many devices have been demonstrated with this technology [19]. Such devices include high density focal plane arrays, multicolour and avalanche detectors. Bulk techniques consist of three main methods: Solid State Recrystallisation (SSR), the Bridgman method, and the Travelling Heater Method (THM) [19]. At first the electrical properties of bulk as-grown HgCdTe were superior to other methods, whereas structural properties were seen as the main limiting factor. Growth by SSR is achieved when pure elements are melted and rocked to ensure complete mixing; this mixture is then rapidly quenched in air or oil to room temperature. In the Bridgman method, elemental Cd, Hg and Te are homogenised by melting/rocking and then frozen slowly from one end in a vertical system. Finally, for THM a homogeneous alloy can be used as the starting ingot and the source material is moved through a stationary heater. These bulk methods can produce first generation IR detectors; however, more sophisticated devices require other growth methods. LPE is a well established growth method for III-V compounds since the early 1960s, but was not applied to HgCdTe until the late 1970s by Harman [20]. Currently, LPE is the most advanced and mature epitaxial technology for growth of HgCdTe. The HgCdTe wafers used in this work are LPE grown material sourced externally from either Fermionics Corporation or Epitech. The LPE process involves using either Hg- or Te-rich solutions as solvents, with the mixture heated in a tipping, dipping or sliding boat. This material is then cooled with either step-cooling, ramp-cooling or supercooling (initial step with a ramp). Most groups use Te-rich growth in either the vertical-dip or horizontal sliding-boat technology, and/or Hg-rich growth using the vertical dip method. Since LPE is a growth technique which operates close to equilibrium, the substrate is extremely important. CdTe was used as an early substrate; however, even though the lattice mismatch was small, it was found that growth on a lattice matched substrate such as Cd 0.96 Zn 0.04 Te or CdTe 0.96 Se 0.04 results in an improved surface morphology and lower dislocation densities [21, 22]. MBE is one of the leading growth techniques due to its ability to precisely control the growth parameters. More advanced multilayer structures can be fabricated using MBE, such as: p-i-n photodetectors, multi-colour detectors, quantum well devices and injection diode lasers. In addition, the reproducibility of wafers is improved due to in situ real time monitoring. MBE growth occurs in an ultra-high vacuum chamber. Liquid Hg, solid CdTe and solid Te sources are heated in effusion ovens until they sublimate. Shutters on the effusion ovens control the flux of these gaseous elements that then condense on the substrate and form a thin epitaxial layer. Growth of MBE HgCdTe can be achieved on a variety of substrates including CdZnTe, GaAs, Ge, InSb and Si. MBE growth of CdTe is used for passivation of HgCdTe material at The UWA. In VPE the substrate is exposed to volatile precursors that react/decompose on the substrate to form HgCdTe. Two main categories for VPE exist: sublimation techniques, generally called isothermal-vpe (ISOVPE); and metal-organic vapour phase epitaxy (MOVPE). Practical difficulties exist with both methods due to the difficulty of maintaining sufficient Hg partial pressure over the growth surface. MOVPE has the advantage of lower growth temperatures than other VPE methods (around 410 C) which can be further reduced with 13

46 2. HgCdTe as an infrared detector techniques such as plasma-enhanced chemical vapour deposition (PECVD), precracking, and photo-assisted MOVPE. Growth temperatures with these methods can be as low as C [23 25]. Purity and crystal quality of VPE grown material still needs to be improved to challenge the crystal quality of LPE. There are several methods in which HgCdTe wafers can be grown for use in IR detectors. LPE growth methods produce the highest quality crystals; however, MBE growth allows the fabrication of complicated multilayer structures. In this thesis LPE HgCdTe is used as the basis for fabrication of IR detectors, with the material obtained externally from Fermioncs Corporation and Epitech. These devices are passivated with MBE-grown CdTe. These methods have been used previously at UWA to produce high-quality infrared photodetectors [1, 2, 26, 27]. 2.2 HgCdTe Properties The basic properties of HgCdTe have been well-reported in the literature, with a comprehensive review given by Capper [19]. The following section gives a brief overview of the parameters used in later chapters for modelling of device behaviour Bandgap The bandgap (E g ) of HgCdTe is a function of the x-mole ratio (x) and the temperature (T ), where x is the ratio of CdTe to HgTe, i.e. Hg 1 x Cd x Te. The expression for the bandgap is given as [28]: E g = x T (1 2x) 0.81x x 3 (2.1) By adjusting the x-ratio from 0 to 1 the bandgap varies from approximately -0.3 ev to 1.6eV. The relationship between E g and the cutoff wavelength (λ) is given by: λ = hc E g (2.2) Therefore the cutoff wavelength of HgCdTe can be adjusted from the short-wave to longwave infrared regions of the electromagnetic spectrum by varying the x-mole ratio (Figure 2.2). This adjustability is one of the properties that has made HgCdTe the material of choice for IR detectors for the past 30 years [17] Intrinsic concentration The intrinsic concentration (n i ) for HgCdTe is required for modelling of devices. The most widely used expression for HgCdTe is that of Hansen and Schmit [29]: n i = ( ) ( ) x T xt Eg 0.75 T 1.5 exp( E g /2kT ) 14 (2.3)

47 2.2. HgCdTe Properties Cutoff wavelength (µm) 12 LWIR K 200K 6 300K MWIR x mole ratio Energy Gap (ev) Figure 2.2: Bandgap and cutoff wavelength versus x-mole ratio for 77 K, 200 K and 300 K. Figure 2.3: Intrinsic carrier concentration for HgCdTe for x-ratios of 0.2, 0.3, and 0.4. Which is valid for 0.16 < x < 0.7 and 50 < T < 359. A plot of n i is shown in Figure Effective mass The effective mass of an electron in HgCdTe is given by Weiler [30] as follows: m o /m e = 1 + 2F E p [(2/E g + 1/(E g + )] (2.4) where F is a constant, E p is the interband energy, and is the split-off energy. Commonly used values are E p = 19 ev, = 1 ev and F = 0.8. The variation of the electron effective mass is primarily determined by the variation of E g, which is dependent on x and T. For light holes the effective mass is equal to the magnitude of the conduction band 15

48 2. HgCdTe as an infrared detector effective mass as predicted by Kane s theory. For heavy holes the effective mass ranges anywhere from 0.4 to 0.7m o [19]. It has been shown that the heavy hole effective mass is independent of x and T [30] Dielectric constant The high frequency dielectric constant (ɛ ) and the static constant (ɛ 0 ) are derived from reflectivity data. The accuracy of the data depends on sample preparation, defects and free carrier concentration, which means there is variation in published results [19]. However, polynomial expressions for both ɛ and ɛ 0 can be derived from these data: ɛ = x + 8.2x 2 (2.5) ɛ 0 = x + 5.7x 2 (2.6) These equations are valid for temperatures from 77 K to 300 K, with differences within this temperature range masked by experimental uncertainties Mobility The mobility of electrons and holes in HgCdTe depends on x-mole ratio and temperature. For 0.2 x 0.6 we have for the electron mobility [31]: Z = T The mobility of holes is given as: ( ) 0.6 µ e = x (2.7) 0.2 Z 2( x ) T T < 50K T > 50K (2.8) µ h = 0.01µ e (2.9) Recombination mechanisms There are three fundamental recombination mechanisms in HgCdTe: Shockley-Read-Hall (SRH) recombination, radiative recombination and Auger recombination [30]. These are shown in Figure 2.4. SRH recombination occurs via traps within the energy gap of the semiconductor. These traps are present due to defects and impurities within the lattice, and can be controlled by the growth method. Conversely, Radiative and Auger recombination are fundamental processes that are related to the bandstructure of the semiconductor. Radiative recombination occurs when an electron from the conduction band annihilates a hole in the valence band, releasing a photon. A good approximation for radiative lifetime 16

49 2.3. Fundamental limit of performance hν Shockley-Read Radiative Auger Impact ionization Figure 2.4: Recombination mechanisms in equilibrium. Energy Conduction band k Γ Heavy-hole band Light-hole band Split-off band Figure 2.5: Bandstructure of HgCdTe. Some features are exaggerated to illustrate the features of the different bands [30]. is that it is inversely proportional to the free carrier concentration. Maximum performance of detectors is achieved when radiative recombination dominates, and it is therefore desirable to have Auger recombination lower than radiative recombination. Auger recombination occurs when the energy released from an electron falling from the conduction to valence band is transferred to a second electron (or hole) in the conduction band (or valence). The second electron (or hole) is excited into a higher level in the conduction (or valence) band, and returns to its initial state via phonon emission. Figure 2.4 shows a simple 2-band model of the Auger recombination, however in HgCdTe there are four bands of interest [30] (see Figure 2.5). These are the conduction band, heavy-hole band, light-hole band and split-off band. For Auger recombination the splitoff band can be ignored due to the heavy-hole and light-hole bands being degenerate at the Γ point, and the splitoff band being about 1.0eV below these bands. There are ten types of phononless Auger recombination mechanisms in HgCdTe. Of these AM-1 is the dominant mechanism in n-type HgCdTe and AM-3 and AM-7 in p-type material. These are shown in Figure Fundamental limit of performance The noise in electronic systems refers to the random fluctuation in the voltage (or current) at the terminals of devices. This noise is inherent to the system itself and is undesirable since it often imposes the practical limit to performance as it can obscure the desired signal. The signal-to-noise (SNR) ratio is defined as: 17

50 2. HgCdTe as an infrared detector AM-1 AM-3 AM-7 Figure 2.6: Dominant Auger transitions in HgCdTe. SNR = P signal P noise (2.10) with P signal and P noise being the signal and noise power respectively. For IR detectors a common figure-of-merit is called the detectivity (D ) which is the area normalised signal to noise ratio of the detector. The following is a summary of the derivation of D for the performance measure of IR detectors, which closely follows that from Rogalski [32]. A photodetector converts infrared radiation into an electrical signal. A widely used figure-of-merit for photodetectors is the spectral current responsivity, which measures the number of carriers at the contacts for one photo-generated electron-hole pair. This shows how well the incident photons are converted to an electrical response within the detector. The spectral current responsivity is defined as [32]: R λ = λη qg (2.11) hc where λ is the wavelength, η is the quantum efficiency, c speed of light, q the electron charge, and g is the photoelectric gain. Both η and g are assumed to be constant throughout the detector. The detectivity D is then given as: D = R λ (A o f) 1/2 I n (2.12) where f is the frequency bandwidth (typically 1 Hz) and I n is the noise current. Common noise sources in IR detectors are: 1/f noise, Johnson-Nyquist noise, shot noise, photon noise and generation-recombination noise. These will be explored in greater detail in Section For good quality devices the 1/f noise is small and if the limiting noise is the generation and recombination noise then the noise current is given as [32]: I 2 n = 2q 2 g 2 (G + R)(A e t) f (2.13) where G and R are the generation and recombination rates, and t is the thickness of the detector. Equation 2.12 then becomes: ( Ae ) 2 η [2 (G + R) t] 1/2 (2.14) D = λ hc A o 18

51 2.3. Fundamental limit of performance which contains an electrical area A e and an optical area A o. In most cases the optical and electrical areas are similar; however, an optical concentrator such as a microlens can increase the A o /A e ratio. To maximise D we must maximise η [(G + R) t] 1/2, which means we require a high quantum efficiency for a thin detector. Assuming that A o /A e is 1, and there is a single pass of the incident radiation, and negligible backside and frontside reflections, then η and D are: η = 1 exp ( αt) (2.15) D = λ hc (1 exp ( αt)) [2 (G + R) t] 1/2 (2.16) where α is the absorption coefficient. The detectivity is then at a maximum when t = 1.26/α and η = 0.716, and D max = 0.45 λ hc ( ) α 1/2 (2.17) G + R When the detector is in equilibrium the generation and recombination rates are equal, then this expression becomes: D max = 0.31 λ hc ( α G ) 1/2 (2.18) The ratio α/g is the fundamental figure of merit for IR photodetectors. To obtain this maximum performance, thermal generation must be reduced to a lower level than optical generation. This is usually achieved by cryogenic cooling, although other methods such as thermoelectric coolers are also used. Note that this only applies when 1/f noise is not the dominant noise source. There are three main mechanisms of generation-recombination in HgCdTe: SRH, radiative and Auger. Since SRH is related to lattice defects it can be controlled; however, radiative and Auger recombination are band-to-band mechanisms. These give the ultimate limit on carrier lifetimes, with Auger recombination being the dominant process. To reduce the device cooling requirements it has been proposed that the non-equilibrium photodiode structure can be used to suppress Auger generation [14, 33]. The non-equilibrium P-π-N structure is shown in Figure 2.7, and consists of a low doped p-type layer (π) between wider gap N and P layers. The p-type layer is electrically neutral with only a narrow depletion region occurring at the p n interface. This device is operated in reverse bias which extracts minority carriers. Since the electron concentration is negligible and hole concentration is the extrinsic acceptor concentration, the thermal generation due to Auger 1 and 7 is reduced. These non-equilibrium devices suffer from large 1/f noise, with the improvements in detectivity only being realised at high frequencies (40 MHz). Determining the source of this 1/f noise could lead to improvements in these devices, and, in turn operation at higher temperatures. 19

52 2. HgCdTe as an infrared detector P-HgCdTe -HgCdTe N-HgCdTe CdZnTe substrate hν Figure 2.7: Structure of a mesa isolated P-π-N HgCdTe non-equilibrium photovoltaic detector. 2.4 Focal plane arrays Focal plane arrays (FPA) consist of an array of detectors (typically rectangular) which are most commonly used for imaging purposes. HgCdTe photovoltaic devices have been successfully fabricated into focal plane arrays [17]. Typically, HgCdTe arrays are hybrid, with a silicon readout flip-chip bonded to a HgCdTe detector array (Figure 2.8), where indium is used as the electrical connection between the two. The flip-chip bonding method allows the separate optimisation of HgCdTe detectors and the silicon readout array and a very high fill factor near 100%. The devices that are fabricated in this thesis are single devices and not part of an array; however, it is possible to use a similar fabrication process with indium bump-bonds to create high fill factor FPA [34]. Figure 2.8: Hybrid FPA. a) indium bump b) indium bump c) loophole. From [8]. 20

53 2.5. Conclusion 2.5 Conclusion HgCdTe is the material of choice for infrared detectors due to properties such as the variable cutoff wavelength from 0.7 to 25 µm and lattice matching across the alloy range. Although HgCdTe is the most widely used material for high quality infrared detectors, it suffers from problems with uniformity and yield of devices. Most of these problems are due to the weak Hg-Te bond, the low melting point of Hg, and the high vapour pressure of Hg. To obtain the maximum performance of these detectors, thermal generation must be reduced to a lower level than optical generation by cooling the devices. P-π-N devices have the potential to operate at higher temperatures; however, they suffer from high 1/f noise. Reduction of this noise will therefore allow these devices to operate at higher temperatures. 21

54 2. HgCdTe as an infrared detector 22

55 Chapter 3 Fabrication of HgCdTe photodiodes HgCdTe photodiodes are currently the most widely used devices for IR detection as they provide low power, high density detection, faster response times and a more uniform spatial response across the focal plane array. There are many different configurations of photodiodes that are currently in use such as homojunction, heterojunction, and non-equilibrium devices. Homojunction devices are the focus of this thesis, and several homojunction configurations are shown in Figure 3.1. The first two diodes are frontside illuminated devices (Figure 3.1a, 3.1b) and the last two are backside illuminated (Figure 3.1c, 3.1d). The planar homojunction shown in Figure 3.1a has the metal contact covering part of the junction. This is also the case for the loophole configuration (Figure 3.1b). For these devices care must be taken to avoid blocking the incident light with the metal contact. The backside illumination configuration is more commonly used, where the incident light travels through the transparent substrate. Figures 3.1c and 3.1d show the planar and mesa configurations for the backside illuminated devices. A readout circuit can be indium-bump bonded to the frontside of the device, and all the incident light can be captured at the active region. The aforementioned device architectures are only a small selection of the many different types of photodiodes which can be fabricated, and other devices include non-equilibrium P-π-N devices, heterojunction photodiodes, devices with varying substrates and multicolour detectors [17]. Table 3.1 shows some photodiode architectures in FPA that are currently used in industry. Most manufacturers use a planar or mesa configuration except for BAE Systems Ltd and DRS infrared technologies. BAE uses the loophole configuration (Figure 3.1b), and DRS uses the vertically integrated photodiode (VIP) configuration, which is similar to the loophole configuration [17]. Technologies presented in Table 3.1 are based on two junction formation techniques: ion-implantation/ion milling methods, or indium/arsenic doping. Further details on these techniques will be given later in the chapter. Devices are fabricated on LPE, MOCVD or material grown via MBE. The current structure of photodiodes fabricated at The UWA is shown in Figure 3.2 which is the frontside homojunction configuration (Figure 3.1c) [1, 2, 26, 27]. This device structure is planar, with an n-on-p homojunction. The base material is p-type HgCdTe 23

56 3. Fabrication of HgCdTe photodiodes Table 3.1: Commercially available diode architectures. From [17]. Configuration Junction formation Company n-on-p VIP Ion implantation forms n-on-p diode in p-type HgCdTe, grown by Tesolution LPE on CdZnTe and epoxied to silicon ROIC wafer; over the edge contact. DRS Infrared Technologies (formerly Texas Instruments) n p loophole Ion beam milling forms n-type islands in p-type Hg-vacancy-doped p-type layer grown by Te-solution LPE on CdZnTe, and epoxied onto silicon ROIC wafer; cylindrical lateral collection diodes. Selex (formerly BAE Systems Ltd) n + -on-p planar Ion implant into acceptor-doped p-type LPE film grown by Te-solution slider. Sofradir (Societe Francaise de Detecteurs Infrarouge) n + n p planar homojunctions Boron implant into Hg-vacancy p-type, grown by Hg-solution tipper on 3 dia. sapphire with MOCVD CdTe buffer; ZnS passivation. Rockwell/Boeing P-on-n mesa 1. Two-layer LPE on CdZnTe: Base: Te-solution slider, indium-doped Cap: Hg-solution. dipper, arsenic-doped 2. MOCVD in situ on CdZnTe Iodine-doped base, arsenic-doped cap. IR Imaging Systems, Sanders A LockheedMartin Company (LMIRIS) P-on-n mesa 1. Two-layer LPE on CdZnTe or Si: Base: Hg-solution dipper, indiumdoped Cap: Hg-solution dipper, arsenic-doped 2. MBE in situ on CdZnTe or Si Indium-doped base, arsenic-doped cap. Raytheon Infrared Center of Excellence (RIRCoE, formerly SBRC) and Huges Research Laboratories (HRLs) P-on-n planar buried heterostructure Arsenic implant into indium-doped N n or N n N film grown by MBE on CdZnTe. Teledyne Technologies (formerly Rockwell)/Boeing 24

57 3.1. Photovoltaic detectors Contact hν Passivation Passivation Contact hν n-hgcdte p-hgcdte n n p-hgcdte p-hgcdte Substrate Silicon ROIC Substrate Expoxy (a) (b) Contact Passivation Contact p-hgcdte n-hgcdte Substrate n-hgcdte P-HgCdTe Interdiffusion region hν (c) hν (d) Substrate Figure 3.1: Commonly used photodiode configurations. From [17]. a) Frontside illuminated planar n-on-p homojunction. b) Frontside illuminated n-p loophole" homojunction. c) Backside illuminated n-on-p planar homojunction. d) Backside illuminated mesa P-on-n heterojunction. with a cutoff value in the MWIR or LWIR region. LPE material on a CdZnTe substrate is used for all the diodes presented in this thesis. The junction was formed by type converting the p-type HgCdTe using a reactive ion etching (RIE) plasma process. This technique of forming the junctions reduces the number of processing steps required, and removes the need for an anneal after junction formation [1, 2, 26, 27]. For the device shown in Figure 3.2, passivation of the diodes consists of two layers, with CdTe as the first layer and ZnS as the second. The CdTe provides passivation of the HgCdTe surface, and the addition of ZnS provides a high resistivity layer. Contacts are made with a two metal Au/Cr system. This chapter will cover the current status of the diode fabrication process at The UWA, which includes the junction formation technology and the insulation/passivation process. A review of the current status of photodiode passivation technology available in the literature will also be given. 3.1 Photovoltaic detectors Theory of operation Photodiodes are more complex to fabricate than photoconductors, however they have several advantages which justify this increase in complexity. These include lower power consumption; they can be fabricated into 2-D arrays; and operation in slight reverse bias which improves the resistance of the photodiodes, thus improving the carrier injection efficiency into the readout circuit. Even at slight reverse bias the power consumption of a 25

58 3. Fabrication of HgCdTe photodiodes Junction Bias (Vf ) Au/Cr ZnS n p HgCdTe CdTe Au/Cr CdZnTe substrate Figure 3.2: Cross-section of diodes fabricated at The UWA. Devices were fabricated on vacancy doped p-type MWIR material, grown via liquid phase epitaxy. The CdTe is used as both a passivant and a mask for the plasma-based type conversion. Devices were passivated with ZnS, and contacts were formed with Au/Cr. photodiode is still lower than that of a photoconductor. For photodiodes incoming photons generate electron-hole pairs which diffuse throughout the detector. This generation can occur within the depletion or neutral region of the photodiode. Once these carriers reach the depletion region of the photodiode they are swept across the junction by the in-built field. This causes a charge imbalance within the device, which can be measured using a transimpedance amplifier. The band diagram for a p-n photodiode is shown in Figure 3.3. Photodiodes can be characterised by their dynamic resistance area (RA) product, which is the slope of the IV characteristic multiplied by the junction area. This is given as: [ ] 1 δi RA (V j ) = A j (3.1) δv j Where A j is the area of the junction, and I and V j are the current through the junction and the voltage across the junction, respectively. A commonly used Figure of merit for depletion region Hole Electron E C E I hν E V n-type region p-type region Figure 3.3: Band diagram of a p-n diode showing creation of an electron-hole pair via incident light. 26

59 3.2. Fabrication process HgCdTe photodiodes is the R 0 A product, which is the RA product at zero junction bias: R 0 A (V j = 0) = [ δi δv j ] 1 A j Vj =0 (3.2) More detail for HgCdTe photodiodes will be given in the second half of this chapter and subsequent chapters. 3.2 Fabrication process This thesis focuses on MWIR n-on-p photodiodes fabricated on LPE-grown p-type HgCdTe. Since the bandgap of MWIR is larger than LWIR devices, the HgCdTe is less sensitive to surface passivation. This is important when developing new techniques of fabrication as it eases the constraints on the processing. Once completed, techniques learnt for MWIR photodiode fabrication can be extended to LWIR photodiodes. Although the bandgap of MWIR material is larger than that of LWIR material it is still narrow compared to that of other materials. This means that the quality of HgCdTe material must be high to produce high performance devices. The processing steps shown here (excluding SiN passivation) have been previously developed for MWIR photodiodes at The UWA [1, 2, 34, 35]. Shown in Figure 3.4 is the processing flow for the fabrication of photodiodes, with the main processing steps as follows: Cleaning and thinning of the LPE layer Surface passivation Formation of the junction Deposition of an insulation material Formation of contacts to the HgCdTe These steps will be covered in more detail in the following sections, with the step-by-step process given in Appendix A. There are two separate fabrication procedures that can be used, and these are shown in Figure 3.4. The first process is the standard procedure for the fabrication of photodiodes at The UWA [1]. This involves a wet etch of the passivation/insulation layer. The second process is a variation which uses dry etching of the insulation layer. Use of the dry etching method requires an additional metallization step to be included in the process. It will be shown in subsequent chapters that both processes are similar and produce high quality photodiodes Cleaning and thinning of LPE layer Devices were fabricated on liquid phase epitaxy p-type HgCdTe MWIR material purchased from Fermionics Corporation or Epitech. The p-type material typically had a vacancy doped concentration of cm 3, x = 0.31, and mobility of 420 cm 2 /V s. It has 27

60 3. Fabrication of HgCdTe photodiodes Passivation with 100nm MBE deposited CdTe CdTe etch and junction delineation RIE type conversion for junctions ZnS (SiN) Process 1 Process 2 SiN ZnS deposition for insulation Etch CdTe for access to p-type Etch of ZnS for access to contacts Cr/Au deposition for contacts to n and p-type MCT Etch ZnS/CdTe for p-type contact SiNx deposition for insulation Cr/Au deposition for gate and contacts Dry etch of SiNx for access to contacts (Au is used as etch stop) p-type HgCdTe n-type HgCdTe Cr/Au CdTe SiN ZnS Cr/Au deposition for gate Figure 3.4: Dry etching procedure used for fabricating SiN passivated HgCdTe photodiodes. Process 1 shows the wet etch process for photodiodes with ZnS or SiN (SiN replaces ZnS in the diagram). Process 2 shows the dry etch process for HgCdTe photodiodes with SiN used as an insulation layer. A detailed description of each processing step is given in Appendix A. 28

61 3.2. Fabrication process been shown that surface preparation before deposition of the passivation layer is extremely important in order to obtain high quality devices [36]. Therefore, all wafers underwent an organic clean, surface etch and a pre-anneal before deposition of the passivation layer. Wafers were cleaned of organics by soaking in successive baths of trichloroethylene, acetone, and methanol at 50 C. The wafers were then placed in room temperature methanol to cool down. In some circumstances wafers were thinned to 10 µm from an initial thickness of µm, in a 0.1% solution of Br/methanol. This was done to reduce the contribution of diffusion and generation-recombination dark currents from the bulk region of the devices. After thinning of the wafer a light surface etch was performed in 0.01% Br/methanol solution. This surface etch removes any thin oxide layer that has formed, and minimises exposure time to atmosphere. P-type HgCdTe surfaces that are exposed to atmosphere have been observed to produce an n-type layer due to formation of an oxide [37, 38]. Once etching was complete, the wafers were rinsed and stored in DI water prior to CdTe deposition. This was to ensure that the exposure time to atmosphere was limited in order to prevent the formation of surface oxides. For both etches, care was taken to avoid exposing the surface to atmosphere between the Br/methanol etch and the methanol rinse, so as not to contaminate the surface Deposition of surface passivation Due to the narrow bandgap of HgCdTe, surface passivation is a critical step in the fabrication of diodes. CdTe is still the most widely used passivation technology for HgCdTe photodiodes [19]. The photodiodes fabricated in this work used either MBE grown or thermally evaporated CdTe deposited in a separate process to the formation of the absorbing layer. It has been shown that in situ deposition of CdTe produces the best passivation for photodiodes, however this technology is not currently available at The UWA. However, separately deposited CdTe can still produce state-of-the-art photodiodes [1, 2, 34, 35]. Since the deposition takes place separately, surface preparation, and pre and post anneals are critical for achieving good quality diodes [36]. For both MBE and evaporation methods of CdTe deposition used, all surface preparation and anneals were kept as similar as possible. After the surface preparation described in the previous section, 100 nm of CdTe was deposited at 100 C at a rate of 0.24 nm/s. For the evaporated CdTe and MBE deposited CdTe, the deposition conditions were kept the same. Following growth, an anneal at 180 C was performed with the anneal profile shown in Figure 3.5. For this anneal the temperature was ramped to 180 C in 2 min and held there for 26 min. The anneal temperature was chosen to be 180 C as this is the growth temperature for MBE deposited HgCdTe. All anneals were performed without a Hg background. The aim of the anneal is to create a grading at the interface between CdTe and HgCdTe, and to smooth out spikes in the conduction and valence bands that may occur at the interface [39]. It is possible that the anneal could also remove defects from the interface, however there is no experimental evidence for this 1. 1 Capacitance-voltage measurements could potentially confirm or deny this. 29

62 3. Fabrication of HgCdTe photodiodes Growth (7 min) Anneal (26 min) Cooling Temperature ( C) time (min) Figure 3.5: Growth temperature profile for CdTe passivation of photodiodes for MBE deposited and thermally evaporated CdTe. Heating and cooling profile time may differ due to different thermal masses of each deposition chamber (times shown are for thermal evaporation). It is expected that CdTe deposited via MBE is of a higher quality than that deposited via thermal evaporation, since MBE has several advantages over thermal evaporation [40]. These include the better vacuum that was reached before deposition thus reducing the chance of film contamination, a rotating stage which improves uniformity of the film, and more accurate temperature control of the stage. Both the thermal and MBE depositions were performed in a clean chamber, with both chambers baked out before deposition to remove excess Hg. The Hg source was not used between the chamber clean and prior to CdTe deposition to avoid contamination of the MBE deposited CdTe. The use of CdTe as a passivation layer has been widely covered in the literature [12, 19, 36, 39, 41 45]. An in-depth review on the use of CdTe passivation, and surface passivation will be given in Section Plasma type conversion The fabrication of planar photodiodes requires the conversion of part of (or regions of) the substrate material to the opposite type. For the case of n-on-p diodes, conversion of p-type substrate material to n-type is required. This is different to non-planar device fabrication where the n-type material is grown on the p-type, and the device is mesa isolated to form a photodiode. Type conversion can be achieved by several methods, which include: ion implantation, plasma type conversion, ion beam milling, diffused dopants, in-diffusion and out-diffusion of mercury, and pulsed laser radiation [30]. Section 3.3 covers type conversion technologies in more detail. The devices fabricated in this study are based on p-to-n type-conversion using a plasma process as reported previously [1, 2, 46]. This method has the advantage of being much simpler than traditional ion implantation and ion milling methods. With this method, CdTe is used as both a passivant and a mask for the plasma-based type conversion. This reduces the number of steps in fabrication of the diodes. Ion implantation technologies damage the masking/passivation layer during the junction formation process, and thus this masking layer needs to be removed. Ion implantation also adds extra steps to the process since an anneal is required after junction formation to activate dopants and move the junction into the material. The RIE plasma type conversion process does not require 30

63 3.2. Fabrication process Matching network RF Power MHz plasma Precursor gas in Sample Throttle Heater Pump Figure 3.6: Plasma Technology RIE80 parallel plate reactor used to type convert n-type HgCdTe material to p-type material. The precursor gasses are H 2 and CH 4. Exposure time to the plasma was two minutes. these additional steps. The RIE plasma type conversion process has been shown to work for vacancy-doped, Au-doped, and As-doped material of both MWIR and LWIR composition, producing high quality devices [1, 35]. To form the junction, the first step is to photolithographically mask the CdTe. The CdTe is then etched away with a 1% Br/HBr solution to form windows. This etch does not use methanol, unlike the thinning and surface clean etch, because the methanol would dissolve the photoresist. The etch rate is low, and samples are slightly overetched to ensure that no CdTe remains in the window. The samples are then exposed to plasma in a Plasma Technology RIE80 parallel plate reactor (Figure 3.6). The chamber conditions are 54:10 sccm H 2 :CH 4 at 100 mt, 120 W RIE power for two minutes. After exposure to the plasma the p-type HgCdTe is now n-type approximately 1.5 µm deep, in the region of the opened windows [47]. CdTe on the HgCdTe substrate that is exposed to the plasma is not damaged and, as such, does not need to be removed. The junctions laterally diffuse approximately 10% of the depth [1], meaning that they are never exposed to atmosphere. This removes the need for further passivation. In addition, no high-temperature anneal is required to activate the n-type region. For these reasons the number of steps required to fabricate the photodiodes is reduced, limiting the damage to the HgCdTe, and improving the quality of these devices Deposition of insulator Although CdTe is an excellent passivant of the HgCdTe surface, its resistivity and stability can be low, especially when exposed to higher voltages. The photodiode surface insulation can be improved by adding a second layer of higher resistivity material such as ZnS or 31

64 3. Fabrication of HgCdTe photodiodes SiN after RIE type-conversion has occurred. Use of this dual layer passivation method has been shown to improve the performance of HgCdTe plasma type-converted photodiodes considerably in terms of diode resistance and bake stability [2, 48]. The CdTe passivates the surface, and the ZnS or SiN provides a higher resistivity layer that also protects the CdTe from environmental factors [2, 43, 48]. For this work two insulation materials were used; thermally evaporated ZnS and PECVD SiN. The first insulation material, ZnS, is a previously established technology at UWA, with many published results available [1, 2, 34, 35, 48 50]. This deposition technology has been shown to produce state-of-theart photodiodes, with high responsivity and low noise. The second insulation material, SiN, is a new technology that was developed as part of this thesis. There has only been one published study on the use of SiN passivation/insulation for HgCdTe devices in the literature [15]. This study has shown that SiN is more moisture resistant than ZnS [15], has a high dielectric field strength, V/cm field breakdown limit, a high resistivity ( Ω cm), and is an effective barrier to mobile ions such as Na + [15] ZnS deposition As previously stated, the deposition of ZnS for insulation on HgCdTe photodiodes is an established process at The UWA [1, 2]. ZnS is thermally evaporated in a vacuum of mtorr at a starting temperature of 50 C. During deposition the sample temperature reaches a maximum of 70 C. The deposition rate is limited to 0.01 nm/s, with the film thickness limited to nm to achieve a high quality, dense film that does not crack. A typical value for the thickness of the insulation layer is 200 nm, which shall be used throughout this thesis unless otherwise stated. Removal of moisture from the chamber is important for producing a high quality ZnS insulating film. Moisture from within the chamber will be incorporated into the film, reducing its insulating properties. Reduction in moisture contamination is achieved by cleaning of the chamber before deposition, as ZnS left over from previous depositions will outgas water. The ZnS crystals and sample are also outgassed during pumpdown. Incorporation of moisture into the film is not limited to the deposition phase of ZnS. Since ZnS is hygroscopic, exposure to atmosphere after insulator deposition will lead to a decrease in the resistivity and, thus, vacuum storage is recommended. This decrease in resistivity of the ZnS leads to the gate no longer being able to control the dark currents within the gated photodiode. This degradation in the ZnS can be reversed with baking at low temperatures (40 C, 1 hour) under vacuum. After baking, most of the control of the dark currents with the gate is returned SiN deposition The SiN passivation was deposited in a PECVD chamber at 125 C, 300 mtorr process pressure, 200 W RF power and SiH 4 :NH 3 :N 2 ratio of 5:45:100. These are the conditions that give the best insulating properties and stability, and were determined by studies that will be described in Chapter 4. 32

65 3.2. Fabrication process The PECVD system used in this study is a dual PECVD and RIE 80 system (Figure 3.6), with a gas showerhead configuration. The gasses leave the chamber from underneath the chuck to obtain a laminar flow of the gases, which improves the uniformity of the film. The electrode configuration is reversed for this system, which accelerates ions away from the sample, reducing damage to the sample. SiN deposited via PECVD will be covered in more detail in Chapter 4, which details the theory, characterisation and development of the SiN technology used throughout this thesis Contacts to HgCdTe Before contacts can be made to p and n-type HgCdTe, the insulator and passivation layers must be etched. For n-type contacts, a single etch through the insulation layer is required. ZnS is wet etched in a 2:1 HCl:DD water solution, which is selective for ZnS. For SiN a buffered oxide etch (BOE) is used, which is also selective for SiN. Care must be taken to minimise overetching as both etches are isotropic. This can lead to shorting of the n-type contact to the p-type region. Also, for a gated diode overetching can lead to the gate electrode insulation being reduced, or in extreme cases the gate electrode shorting to the n-type HgCdTe. For the p-type contact two etches are performed, an insulation etch of ZnS or SiN, and a passivation etch of CdTe. The CdTe is etched with a 1% Br/HBr solution, as the previous Br/Methanol etch will dissolve the photoresist used to define the contact areas. The Br/HBr CdTe etch is not selective and will etch the underlying p-type HgCdTe. However, since this contact is remote, stopping the etch at the CdTe/HgCdTe interface is not critical. Typically the CdTe is overetched to ensure that access to the p-type HgCdTe has been achieved. After etching through the insulator and/or passivation layers, contacts to the p and n- type HgCdTe were formed. In this technology, 5 nm of Cr and 200 nm of Au was thermally evaporated to make contact to both the p and n-type regions. A liftoff process was used with a single photolithographic mask for both contacts. All photodiodes on a wafer share a common contact for the p-type region, and individual contacts for the n-type regions. Indium is typically used as a contact to the n-type region, however, to reduce the number of fabrication steps Au/Cr was used instead. Although this contact can have a higher resistance than In, it was not perceived to be a problem for the purposes of these experiments. This is due to the resistance of the junction being significantly larger than the contact resistance at the temperatures of interest (less than 150 K). The Cr metal layer is used to prevent the interdiffusion of Au into the n-type HgCdTe, and the subsequent change of doping to p-type [36]. The Cr layer also helps with the adhesion of the contact to the HgCdTe. The contact pads in previous devices overlapped the junction and the p-type region as shown in Figure 3.7. This was changed for several reasons: to reduce leakage through the insulator to the p-type region, to allow for the junction perimeter to be controlled with the use of an additional gate electrode, and to ensure that this contact has no influence on the surface properties of the photodiode. Prevention of leakage through the insulator can be 33

66 3. Fabrication of HgCdTe photodiodes Current leakage path Bonding pad overlay Cr/Au Passivation/Insulation Reduced current leakage path Cr/Au n-type HgCdTe p-type HgCdTe Previous configuration Current configuration Figure 3.7: Comparison of previous bonding pad configuration with current configuration. The contact pad in the new devices do not overlap the junction. particularly important for MWIR photodiodes, as the resistance of the diodes can become comparable to that of the insulator. Because indium-bump bonding was not used, device sizes were restricted to relatively large areas, with circular devices of 300 and 410 µm diameter Dry-etching process for SiN In this thesis two different processes were used to etch SiN, a wet and a dry etch (process 1 and 2 in Figure 3.4). Dry etching was performed in a RIE chamber similar to the one used for type-conversion of the p-type HgCdTe (Oxford Instruments PlasmaLab100 system). Metal is used as an etch stop in this process, as exposure to the plasma formed during etching will damage the underlying HgCdTe. This adds an additional photolithographic step to the process as the metal contact deposition is separated from the gate metal deposition. The dry-etch process is shown in Figure 3.8. The etch is achieved with a plasma formed with 20:0.5 sccm CF 4 :O 2 at 80 mt, 50 W RIE power for 5 minutes. This is an anisotropic etch, which ensures that the gate electrode insulation resistance is not reduced, and that no shorting to the n-type HgCdTe occurs. SiN is deposited after contacts to the HgCdTe are formed, and then the SiN is dry etched to obtain access to the contacts. The gate metal is deposited after the SiN is etched. This additional step is not required in certain applications such as focal plane arrays since the inclusion of a gate electrode is not necessary. This dry-etch process has greater potential for scaling to smaller device sizes as over-etching of the insulator becomes a problem when using wet etch processes Final device structure A top view of the final fabricated device is shown in Figure 3.9 for a gated photodiode. The devices are circular with diameters of 300 µm or 410 µm and have a gate electrode around the perimeter of the device. A non-gated diode is similar but does not have the gate electrode. Bonding pads for the gate electrode extend away from the junction area, and were kept small to minimise the effects of leakage through the insulator. Cross-sections of the final device structures are shown in Figure 3.2 for a non-gated diode, and Figure 3.4 for a gated diode. 34

67 3.2. Fabrication process Cr/Au deposition for contacts to n and p-type MCT SiNx deposition for insulation Dry etch of SiNx for access to contacts (Au is used as etch stop) p-type HgCdTe n-type HgCdTe Cr/Au CdTe SiN Figure 3.8: Steps for dry etch of SiN. Metal contacts are deposited before the SiN passivation layer, which is the opposite of the wet etch procedure Device mounting Once fabrication is complete, devices are mounted on a 84 pin chip carrier (Figure 3.10). Bonding is achieved with gold wire and conductive epoxy, as ultrasonic bonding will damage the soft underlying HgCdTe and ZnS. Care must be taken to ensure that no mechanical damage occurs in the HgCdTe due to human error. Flip-chip bonding was not used in this thesis to reduce the number of fabrication steps in the process. The devices in this study were not able to be illuminated due to the metal covering the junction area. Devices were loaded into a dewar, and cooled with liquid nitrogen (LN 2 ) to 77K. Temperature control was achieved via a temperature controller and a resistive element under the sample stage Summary of fabricated devices Table 3.2 shows the devices that were fabricated for this thesis. Devices shall be referred to by their device ID. There were several passivation schemes used with either ZnS or SiN as the insulation layer, and CdTe as the passivation layer. The CdTe was either thermally evaporated or deposited via MBE. 35

68 3. Fabrication of HgCdTe photodiodes Table 3.2: List of fabricated devices. Device ID Description CdTe Insulator x / (cutoff wavelength) p-type doping (cm 3 ) HgCdTe thickness Comments RJW01 Trial run Trial run RJW02 Trial run Trial run RJW03 Trial run Trial run RJW04 Heterostructure Attempted heterostructure device RJW05 ZnS only none ZnS 0.31/ µm Low R0A RJW06 Evap. CdTe and ZnS evap. ZnS 0.31/ µm First trial of evaporated CdTe RJW07 Evap. CdTe and ZnS evap. ZnS 0.31/ µm Second trial of evaporated CdTe RJW08 MBE CdTe and evap. ZnS RJW09 MBE CdTe and evap. ZnS MBE ZnS µm Incorrect thickness of CdTe MBE ZnS µm - RJW10 Flip Chip MBE ZnS µm Indium liftoff failed RJW11 Dry etch of SiN MBE SiN µm - RJW12 Wet etch of SiN MBE SiN µm - 36

69 3.3. Junction formation technologies (a) E D D E D A C B (b) 300μm Figure 3.9: Top view photograph of the fabricated photodiodes. a) Photograph, b) Legend. A: n-type contact, B: bonding pad for gate, C: gate electrode, D: p-type/cdte/sin, E: contact to p-type. 3.3 Junction formation technologies Type conversion of p-type HgCdTe to n-type material can be achieved by several methods, which include: ion implantation, plasma type conversion, ion beam milling, diffused dopants, in-diffusion of mercury, and pulsed laser radiation. Of these, ion implantation with boron is the most commonly used technique [51]. Although several other ions such as H, Hg, Al, Be and In have been used, the boron ion is favoured due to its small mass which minimises crystal damage. With this technique accurate control of junction formation is possible and the lateral extension of the junctions is small allowing fabrication of small geometry devices. Type conversion via ion implantation has problems, since the subsequent anneal required to remove implantation damage causes additional damage. This damaged layer must be removed and replaced with a second layer. During this process the junction is exposed to air which can reduce diode performance. In addition, the post-implantation anneal can 37

70 3. Fabrication of HgCdTe photodiodes 5 cm Figure 3.10: Photograph of the fabricated photodiodes mounted on a 84 pin chip carrier. Contact is made to the devices via gold wire and conductive epoxy. lead to impurity redistribution, changes in Hg content and grading of any heterojunctions present. This can cause a further degradation in diode performance. Plasma type conversion does not damage the passivation layer which greatly simplifies the fabrication process. In fact, it has been shown that exposure to the RIE plasma can improve the characteristics of the passivation layer [48]. RIE is an anisotropic etching technology widely used in etching of Si, III-V and II-VI semiconductors. This allows delineation of high density device elements such as that required for FPAs. The use of the plasma type conversion technique means that the passivation layer does not need to be removed, therefore the junction is never exposed to atmosphere and no post-anneal is required. For HgCdTe it has been shown that exposure to a H 2 /CH 4 or H 2 /Ar plasma leads to type conversion of p-type material to n-type [26, 46, 52]. Belas et al. determined how process conditions affected the HgCdTe material [46]. The focus of Belas study was to determine process conditions that favoured etching of the HgCdTe. Since type conversion was an undesired effect, efforts were made to reduce it. It was found that the depth of the p-n junction decreases with an increasing CH 4 fraction, and the roughness of the etch was minimised with 20-30% H 2. Low levels of hydrogen also lead to the least amount of electrical damage during the etch. The conversion mechanism for plasma type conversion is still under investigation; however, the weakly bonded Hg is thought to be important. It is thought that the mechanism of type conversion is similar to that caused by ion implantation and ion beam milling [46]. It has also been suggested that damage may be responsible for type-conversion [30]. In vacancy doped material it is thought that when accelerated plasma ions sputter the surface, the liberated Hg creates a source of Hg interstitials under the etched surface. These interstitials then diffuse into the material and decrease the concentration of acceptors by annihilating the Hg vacancies to reveal the background n-type doping. In general, conver- 38

71 3.4. HgCdTe processing issues Table 3.3: Carrier concentrations in type converted Ag doped LPE HgCdTe with N A = cm 3, x = 0.3, 100W RF power, 40 sccm (5:1 H 2 CH 4 ratio), and a total pressure of 500 mtorr from [26]. Each line corresponds to a peak in the mobility spectrum. Carriers Concentration (cm 3, cm 2 ) Mobility (cm 2 V 1 s 1 ) Unconverted p-type epilayer Bulk electrons Surface electrons to to sion may occur through a combination of RIE induced damage, Hg interstitial formation (to which H forms strong bonds), and/or hydrogen induced neutralization of acceptors [52]. Transport measurements on MWIR HgCdTe show that RIE type conversion proceeds to a depth of 2 µm on p-type LPE HgCdTe with N A = cm 3, x = 0.3, 100 W RF power, 40 sccm (5:1 H 2 CH 4 ratio), and a total pressure of 500 mtorr [26]. Type converted material shows three distinct carrier species present (see Table 3.3). There are holes associated with the unconverted epilayer, bulk electrons associated with the RIE type converted region and low mobility surface electrons (2-D sheet concentration). The surface electron mobility is affected by RIE induced damage within the thin layer at the surface of the HgCdTe. This low mobility region can be readily removed by a quick dip etch in Br/Methanol. 3.4 HgCdTe processing issues HgCdTe material is difficult to work with, and uniformity and yield are still issues. Most of the problems are associated with the weak Hg-Te bond, the low melting point of Hg, and the high vapour pressure. The Hg in the lattice is highly mobile, and it moves throughout the lattice creating vacancies (negatively charged) or interstitials (positively charged) [12]. The mobile lattice atoms can also lead to a large variation in the stoichiometry and transport properties as a result of treatments as diverse as oxidation, mechanical damage, and reaction with metals. The shape of the Hg-Cd-Te phase diagram results in serious difficulties in repeatable growth of uniform composition bulk crystals and epitaxial layers [17]. Despite these problems, HgCdTe still remains the leading material for high performance infrared detectors. The exposure of HgCdTe to temperatures above 90 C is undesirable for several reasons [12]. First, the weak bonds and high mobility of Hg in the lattice (especially when HgCdTe is heated but not capped) lead to surface defects and interface instabilities [8]. Once formed, these defects can move throughout the lattice over hundreds of angstroms even at room temperature [12]. Second, due to the narrow band-gap of HgCdTe, defects at the surface of devices can greatly affect the properties of the device. A surface potential of less that 100 mev can accumulate, deplete or invert the surface, thus affecting device 39

72 3. Fabrication of HgCdTe photodiodes performance [12]. To reduce the effects of oxidation on the HgCdTe, exposure time to air needs to be kept to a minimum. This is particularly important during junction formation and subsequent passivation. Specific solvent cleaning and drying procedures were followed throughout this thesis to avoid contaminants remaining on the surface. HPR resist was used for photolithography for wet etches, and AZ resist for liftoff metallization. Samples were susceptible to process induced damage from too much mechanical pressure, and scratching from handling. Further details of the individual processes are available in Appendix A. 3.5 Surface passivation Due to the narrow bandgap of HgCdTe, the characteristics and performance of devices are largely influenced by the interface at the surface of the semiconductor. A small change in the surface potential can lead to a change that is of the order of the bandgap of the material. Therefore, correct passivation is important in obtaining high quality devices. The criteria for good passivation for HgCdTe devices are summarized in Table 3.4 and are divided into two categories: the HgCdTe passivant interface properties and the bulk characteristics of the passivant itself. There are several properties of the passivant that play an important role in device quality, such as the bulk properties of the passivant and its fixed charge. Controlling the fixed charge within the passivation layer puts the surface as close to flatband as possible, minimising unwanted dark currents within the photodiode. For the work presented in this thesis, the stability and resistivity of the passivating film are important since the passivation layer is also used as a gate insulator. The fixed charge within the passivation layer is important in determining the behaviour of the photodiode. Fixed charge in the passivation modifies the surface potential at both sides of the junction. This can lead to an increase in surface leakage current and degradation of device performance. The magnitude and type of dark current depends on whether the surface is at flatband, accumulation, depletion or inversion, and also on the relative doping concentrations of the p and n material, dimensions of the diode, and operating temperature. These surface currents dominated the behaviour of germanium and silicon diodes during the early development stage of these technologies. As such, extensive work has been undertaken to study and eliminate these problems. Similarly, dark currents in HgCdTe were also a problem, due to the narrow bandgap of the material. Passivation technology has progressed to a stage in which commercial FPA arrays are widely available. However, there is still more work required to further improve these devices [17] Surface charge effects The effects of surface charge on the dark currents within the junction of the photodiode shall be briefly considered in this section. A more in-depth analysis can be found in Chapter 5 on the theory of dark currents within HgCdTe photodiodes. The surface potential in both the p and n-type region determines the type and magnitude of the surface currents present in the diode. For the sake of simplicity, we shall consider the case of a 40

73 3.5. Surface passivation Table 3.4: The criteria for good passivation of HgCdTe photodiode arrays (from [53, 54]) Parameter Interface potential (controls surface recombination velocity, surface-related dark currents and noise) Density of states: fixed, fast and slow surface states/interface traps/ insulator traps Surface recombination velocity Heterostructure band diagram Passivant/HgCdTe interface properties Photodiodes and MIS devices: The surface related dark current, as well as tunnelling currents are large for either accumulated or inverted interfaces; the lowest surface-related and tunnelling dark currents are obtained when the surface adjacent to the junction is close to flat-band conditions [55, 56]. Photoconductors: Accumulated surfaces (to reduce surface recombination velocity). The fixed surface state density should be less than cm 2 to obtain close to flat band conditions. In addition, a low density of fast and slow interface states is required to reduce low frequency noise currents [5, 43]. To reduce the magnitude of the surface generation current it is essential to form interfaces with a low surface recombination velocity [57]. The passivant/hgcdte heterostructure should provide barriers to both majority and minority carriers close to the surface, so that the generation-recombination currents are minimized. Passivant bulk properties Insulation Dielectric properties Optical transparency Adhesion Stability The film must be electrically insulating with high specific resistivity (ρ> Ω cm). An appropriate index of refraction (n) for anti-reflection coating, and a high dielectric constant (ɛ) is an asset to shield the semiconductor from charges on the surface of the passivation. A high optical transparency for IR radiation is required for front-illuminated devices. Excellent adhesion is more easily obtained when the passivating film and the semiconductor have similar chemistries and coefficients of thermal expansion. Chemical and mechanical stability as well as thermal stability up to 150 C compatible with device processing steps, outgassing, storage and packaging requirements. Deposition technology Low-temperature deposition is essential. The technology should also yield a film with a high quality surface morphology. There must be adequate step coverage over mesa devices. Radiation hardening A good passivation should also exhibit radiation hardening to avoid degradation of the detectors in harsh environments such as space. 41

74 3. Fabrication of HgCdTe photodiodes n-type n-type p-type p-type (a) (b) n-type p-type n-type p-type (c) (d) Figure 3.11: Theoretical depletion regions for an n + p photodiode under various surface charges. The grey area represents the depletion region of the diode. Diagrams are not to scale. a) Negative fixed charge causes accumulation in the p-type region. b) Flatband. c) Depletion in the n-type region caused by positive charge. d) Inversion in the p-type region caused by large amounts of positive fixed charge. p-n + junction. Since the n-side is more heavily doped than the p-side of the photodiode, the surface potential on the p-side is more sensitive to the fixed charge in the passivation layer. There are several cases to consider, which are characterised by the state of the p-type surface: flatband, accumulation, depletion, and inversion (Figure 3.11). The first case is flatband, when the potential at the surface is zero. The surface properties are the same as the bulk and this is the most desirable case since it leads to the lowest levels of surface current leakage. The depletion width at the surface is the same as in the bulk junction (Figure 3.11b). Tunnelling currents at the surface are at the same levels as the junction. Any deviations away from flatband will increase the leakage currents at the surface, causing a decrease in the performance of the diode. Now consider accumulation within the p-type region caused by small amounts of negative fixed charge within the passivation layer (Figure 3.11a). This leads to a narrowing of the depletion region at the surface, a breakdown of the junction and an increase in the surface leakage currents. Since the electric field across a junction is inversely proportional to the depletion width, narrowing of the junction causes high electric fields across the junction. This leads to breakdown of the junction at the surface, which occurs at low junction biases when compared to the bulk junction. This breakdown occurs via tunnelling, avalanche or microplasmas, with the first two being the most common mechanisms in HgCdTe. If small amounts of fixed positive charge are present, depletion occurs within the p- type region (Figure 3.11c). This widens the depletion region of the diode at the surface, increasing the generation-recombination currents within the diode at the surface. Larger amounts of positive fixed charge leads to inversion in the p-type HgCdTe (Figure 3.11d). The surface region reverses its conductivity and becomes n-type. This creates a 42

75 3.6. Current passivation technologies low resistance shunt path in parallel with the diode which reduces the performance of the device, possibly shorting the diode with neighbouring devices. In addition, this n-type region induces a depletion region that extends throughout the p-type region, causing an increase in GR currents and breakdown currents through this junction. For the previous four cases tunnelling currents are more prevalent at low temperatures due to their relative independence from temperature, as compared to GR or thermally generated currents. Further details on the effects of passivation on surface currents, and how this affects the 1/f noise within these devices will be presented in Chapters 5 and Current passivation technologies The characteristics of narrow bandgap devices are strongly influenced by the properties of the semiconductor surface and interfaces. Surface passivation of the narrow bandgap HgCdTe is extremely important since incorrect passivation can lead to a reduction in quality of the device. As a consequence of this, passivation technologies are often proprietary. However, comprehensive reviews of passivation of HgCdTe surfaces have previously been published [39, 42, 43, 58, 59]. A more general review on passivation in narrow gap materials was published by Nemirovsky [54]. Based on the success of silicon dioxide for silicon passivation, initial passivation efforts for HgCdTe focused on anodic oxide growth. It was found that the large positive charge within the anodic oxides led to shorting of devices due to the inversion of the p-type surface [39]. Other native films were tried such as anodic sulfide, plasma oxide, photochemical oxide and anodic fluro-oxide, as well as various deposited films such as ZnS, SiN, CdTe, and CdZnTe [60]. CdTe has eventually emerged as the leading passivation technology for HgCdTe devices. Some devices employ dual layer passivation schemes, for example CdTe and ZnS [2, 34]. The CdTe layer provides a good passivation of the surface, whilst the ZnS provides a higher resistivity insulator, improves the stability of the CdTe, and provides an anti-reflection (AR) coating. The following section will review the current status of CdTe and other passivation technologies available for HgCdTe CdTe CdTe is the passivation of choice for HgCdTe detectors [8, 53]. The CdTe passivation layer can be deposited by MBE, MOCVD, sputtering, thermal evaporation and e-beam evaporation. For the latest FPAs CdTe is typically grown in situ via the MBE deposition technique [36, 39]. CdTe has several properties which makes it a good passivation layer for HgCdTe: CdTe is nearly lattice-matched with HgCdTe (within 0.3%); the chemistries are similar and hence adhesion, chemical and thermal stability are readily obtained; CdTe is not hygroscopic (unlike ZnS) and is mechanically harder than HgCdTe [61]. At 77 K, fully depleted CdTe is insulating and the dielectric properties are adequate. CdTe films are highly transparent to IR radiation but, because of the high index of refraction and its similarity to that 43

76 3. Fabrication of HgCdTe photodiodes of HgCdTe, CdTe films cannot provide AR coating for front-illuminated photodiodes. This AR coating can be provided with an additional film of ZnS which adheres well to CdTe. Finally, since the average atomic number of CdTe is high (50), CdTe is an efficient absorber of high energy radiation and exhibits radiation hardness. CdTe can also minimise Hg segregation in HgCdTe solid solutions [62]. Three key aspects of CdTe passivation have been studied by Bubulac et al. [63]: morphology of the film, compositional profile across the interface, and impurities at the interface and in the CdTe films. Studies were made on LPE HgCdTe with CdTe deposited by MBE (1200 nm) and electron-beam deposition (800 nm). Atomic force microscopy (AFM) reveals microstructure differences in the CdTe films due to the deposition technique, surface preparation, and post-deposition annealing conditions. Impurity spikes at the interface are present regardless of deposition technique and post-deposition annealing. Also, initial HgCdTe surface conditions are shown to affect the CdTe characteristics. The CdTe/HgCdTe interface forms a heterostructure which provides a barrier to majority and minority carriers and yields an excellent passivation of the surface. Nemirovsky et al. [44] have calculated the band diagram of the abrupt CdTe/HgCdTe interface. The calculated band diagram depends on the valence band offset, doping levels, surface charges and traps at the interface and deep traps in the CdTe. Control of these properties must be achieved to obtain the required interface properties. The results of modelling of the heterojunction indicate that barriers can be formed both in the valence and the conduction bands, and these barriers can provide significant passivation. Moreover, the surface potential is close to flat band, which is a requirement for good passivation. Nemirovsky et al. [45] extended this work to include the graded MOCVD CdTe/HgCdTe interface. It has been suggested that interface grading at the CdTe/HgCdTe interface is beneficial for surface passivation [45, 61]. This may shift the HgCdTe defective surface to a wider gap CdTe region and result in greater thermal stability and improvements in passivation, irrespective of the CdTe growth method [39]. In MBE-grown heterostructures, the diffusion of the mercury concentration across the CdTe/HgCdTe interface is not expected to be very pronounced [64]. Annealing at elevated temperatures is accompanied by an additional spreading of the concentration profile, as is revealed in High Resolution X-Ray Diffraction (HRXRD) spectra [64]. Shcheritsa et al. [65] reported on numerical modelling of the formation of the CdTe/HgCdTe interface during LPE growth. It is imperative to control the interfaces between the HgCdTe and the deposited CdTe. In situ growth of CdTe after the growth of the HgCdTe absorber layer reduces the likelihood of contamination at the CdTe/HgCdTe interface and is the ideal method of CdTe deposition [44]. However, direct deposition of CdTe is not always possible for all device structures; for example, etching of mesas or passivation of buried implanted junctions in a planar process [66]. When in-situ growth of CdTe is not possible an appropriate surface pretreatment and annealing must be performed prior to deposition, as well as a post-deposition anneal [43, 63, 67, 68]. These surface treatments control the stoichiometry of the surface and interface, and determine the surface potential and density of surface states [54]. Details are not often reported in the open literature but are an important part of CdTe deposition technology. 44

77 3.7. Conclusions Other passivation materials Although CdTe is to date the most favoured passivant for HgCdTe photodiode focal plane arrays, other passivation materials are still relevant in certain device applications. These passivants and their characteristics are summarized in Table 3.5, with additional references from given by Nemirovsky [53, 54]. Low temperature grown oxides reduce the density of fast and slow surface states that are observed, control the surface electrical properties, and remove the damaged surface layer in a controlled manner. However, native films formed with a wet electrochemical process have problems of porosity (with increasing thickness) and adhesion, and this makes them less favoured in industry. Hence, native layers should be considered as a surface treatment and the insulation should be achieved with a deposited dielectric film. Table 3.5 shows the results of direct passivation of HgCdTe with deposited dielectrics. Often a dual layer passivation scheme is used, where CdTe provides a good interface with the HgCdTe, and a second layer (typically ZnS) provides improved insulation. The deposited dielectric provides protection of the interface from environmental conditions, and insulation for the metal contacts/bonding pads. 3.7 Conclusions HgCdTe photodiode fabrication methods have been the subject of intense research for many years, although details in the literature remain limited. This is especially true for passivation technologies. This chapter has reviewed the process fabrication technology at The UWA, as well as the current status of the different types of passivation materials for HgCdTe. CdTe is the current passivation of choice for photodiodes and is used in the majority of FPA technologies available commercially. In some cases it is combined with ZnS to provide an improved passivation layer and anti-reflection coating. The various techniques of junction formation for photodiode fabrication were covered, with ion implantation favoured in industry, but plasma-enhanced type conversion being the favoured method at The UWA. This method works by exposing the p-type HgCdTe to a plasma in an RIE chamber, thus type converting the material to n-type. It is not known exactly what mechanism is responsible for type conversion of the p-type material, however the weakly bonded Hg is thought to be important. It is thought that the type conversion mechanism caused by the plasma is similar to that caused by ion implantation and ion beam milling. The advantage of this method is simplification of the process which leads to a reduction in damage to the HgCdTe and therefore improved diode performance. This is of particular importance as HgCdTe is a fragile material due to the Hg in the lattice being highly mobile. 45

78 3. Fabrication of HgCdTe photodiodes Table 3.5: Properties of non-cdte passivant films on HgCdTe (after [53]): Nfc fixed charge density; Nss fast surface state density; PV Photodiode arrays; PC photoconductive arrays; MIS metal-insulator-semiconductor photocapacitors; Encap. encapsulation; Aff. - affected. Passivant Ref. Nfc (cm 2 ) Nss (cm 2 ev 1 ) Adhesion Insulating Properties Thermal stability ( C) Chemical stability Application Area Native Anodic oxide [41, 69, 70] Anodic sulphide (CdS) Excellent Inferior to SiO2 (PV) 70 Attacked by alkalis [71 77] < Excellent (<100 nm) Inferior to SiO2 105 Attacked by HCl PC, MIS, Encap. Plasma oxide [78] Inferior to anodic oxide 90 - Encap. Photochemical oxide [79 81] [82, 83] Anodic fluro-oxide [84] Low (inferred) Excellent Inferior to SiO PV, MIS Inferior to SiO2 and ZnS PV 90 - PC Deposited ZnS [42, 50, 85 90] < Very good Inferior to SiO2 90 Aff. by H20, etched by HCl PV, MIS, Encap. SiO2 (Photo-CVD) [91 93] < Problems Excellent 90 Aff. by H20 PV, MIS SiN [15, 94] Good Very good - Resistant to moisture CdZnTe [95, 96] Mid PV Compositionally graded HgCdTe [67] - - Excellent Inferior to SiO2 and ZnS

79 Chapter 4 SiN passivation of HgCdTe photodiodes 4.1 Introduction HgCdTe photodiode passivation at The UWA is currently undertaken as a two step process, consisting of a 100 nm thick layer of MBE deposited CdTe and, historically, a thermally evaporated 200 nm thick layer of ZnS [1, 2]. The ZnS is also used as an insulator for the gate electrode in gated photodiodes to control the dark current characteristics of the p-n junction [3]. When measuring the 1/f noise characteristics of HgCdTe gated diodes, the gate is subjected to considerable voltage stress, with voltages in the range of 2.5 to 5 V for several hours. During this time the insulating properties of the ZnS are found to degrade, and significant current begins to flow through the ZnS layer, resulting in the diode characteristics no longer being controlled by the gate electrode. Moreover, ZnS is hygroscopic and further degradation of the insulating properties will result if the devices are exposed to laboratory atmosphere. Thus, an alternative insulator to ZnS needs to be found in order to develop a more reliable HgCdTe photodiode technology. It is proposed that SiN is a suitable replacement for ZnS as the insulating layer in HgCdTe gated diodes. SiN has been shown to be more moisture resistant than ZnS [15], as well as having a high dielectric field strength, V/cm breakdown limit, a high resistivity ( Ω cm), and it is an effective barrier to external contaminants. SiN has been used in Si-SiO 2 based microelectronics as an overcoat layer to protect against mobile ions such as N +. In this thesis, plasma-enhanced chemical vapour deposition (PECVD) will be used to deposit the SiN insulating layer HgCdTe photodiodes. SiN can be deposited at lower temperatures using PECVD, in comparison to other chemical vapour deposition techniques such as low pressure chemical vapour deposition (LPCVD). This low temperature deposition capability is critical for HgCdTe device processing, in addition to providing control of the SiN properties such as stress, density, deposition rate and thickness of the deposited film [97, 98]. In contrast, evaporated ZnS must be deposited at a very low rate of 0.02 nm/s to achieve the stress and density required for passivation. In addition, the 47

80 4. SiN passivation of HgCdTe photodiodes maximum thickness of the ZnS film is limited to around 200 nm, since thicker ZnS films deposited at The UWA tend to crack. Low temperature PECVD-deposited SiN films have already been investigated at The UWA for the integration of a MEMS-based, tunable optical filter on HgCdTe [99 101]. In this case, low temperature refers to processing temperatures at or below 125 C, as required for HgCdTe photodiode processing. However, since these films are amorphous and close to zero internal stress (less than 20 MPa at 125 C deposition temperature [101]), they degrade over time in a laboratory atmosphere. This chapter deals with the characterisation of PECVD-deposited SiN films, in an attempt to develop low temperature SiN for use as an insulator for HgCdTe photodiodes. Of particular importance in the passivation of HgCdTe photodiodes is the charge state of the insulator. Since HgCdTe has a narrow bandgap (0.24 ev for x = 0.3 at 77 K), charge trapped in the insulator has a large effect on the surface condition of HgCdTe devices, causing a shift in the the flatband voltage of the p and n-type semiconductor. The energy bands at the n-type or p-type surface can then be bent into accumulation, depletion or inversion, depending on the flatband voltage. This results in a change in the p-n junction depletion width at the surface, which can lead to an increase in the surface related dark currents, thus degrading diode performance. Reducing and controlling insulator trapped charge is therefore an important issue in the production of high quality HgCdTe photodiodes. In this thesis the gated photodiode structure will be used to directly influence the bandbending at the surface of the photodiode. This will allow the dark current magnitudes at the surface of the photodiode to be controlled, which will give insight into the 1/f noise mechanisms resulting from these surface related currents. Since this allows the photodiode characteristics to be controlled by the gate voltage, achieving the correct charge in the insulator is not imperative for this study. However, the requirements for good insulating properties of the SiN layer become more stringent due to the larger voltage stress placed upon it during gated diode measurements. This chapter is devoted to the development of a new process technology to passivate the HgCdTe photodiodes based on PECVD of SiN thin films. 4.2 The MIS capacitor The metal-insulator-semiconductor 1 (MIS) structure is an important diagnostic tool in the development of semiconductor technologies. The analysis of high and low frequency capacitance-voltage (CV) curves enables the extraction of important electrical parameters that characterise the insulator, the insulator/semiconductor interface, the semiconductor surface, and the underlying semiconductor layer. This includes semiconductor surface doping concentration and profile, minority carrier lifetime, insulator thickness, insulator stored charge, interface traps, and density of mobile ions within the insulator. MIS test structures can be fabricated on the same wafer as functioning detector devices, thus providing 1 The term oxide can be used interchangeably with insulator 48

81 4.2. The MIS capacitor Cr/Au Gate bias SiN or ZnS p-type HgCdTe Figure 4.1: MIS capacitor structure used to measure the properties of the insulator films for HgCdTe photodiodes. Cr/Au is used as both the p-type contact and the gate metal. The insulator is either thermally evaporated ZnS, or PECVD SiN. information on individual device fabrication runs. This section covers some basic theory of CV measurements, which also serves as background information for understanding surface effects on gated photodiode structures (see Chapter 5). MIS theory has been covered in great detail in many excellent books and review articles [ ], therefore only the important points are covered in the following section Basic MIS Theory A p-type MIS capacitor consists of a metal plate and a semiconductor separated by an insulating material. Figure 4.1 shows this structure, with the metal plate separated from the p-type semiconducting HgCdTe by an insulating material, for example ZnS or SiN. The above MIS structure is considered ideal if two conditions are met: 1. No current flows through the structure at any applied bias i.e. between gate and substrate 2. The electric field is zero everywhere when the applied bias is zero Since no DC current can flow through the insulator, no DC current can flow through the space-charge region. Therefore, the MIS capacitor can be considered to be in thermal equilibrium, with np = n 2 i and a constant Fermi level throughout the semiconductor. Deviations from this situation that occur due to leakage through the insulator will not be considered here. The band diagram of such a system is shown in Figure 4.2. First the potential ψ(x) is defined as: qψ(x) = E f E i (x) (4.1) where E f is the extrinsic Fermi level and E i is the intrinsic Fermi level, which is parallel to the conduction and valence bands. In the bulk ψ(x) is called the bulk potential ψ b, and at the surface, where x = 0, it is called the surface potential ψ s. The bulk potential can be calculated for a p-type semiconductor from: ψ b = V t ln ( ) NA n i (4.2) and for n-type 49

82 4. SiN passivation of HgCdTe photodiodes x x x d qφ S E c E c qφ S qψ b qψ b qψ S E i E i E f qψ S E f E v E v (a) (b) Figure 4.2: Energy band diagram for a MIS capacitor for a p-type semiconductor. The symbols are defined in the text. An arrow pointing up denotes a negative potential, and pointing down denotes a positive potential. a) Accumulation b) Weak inversion ψ b = V t ln ( ) ND n i (4.3) where V t = kt/q. The band bending φ(x) is then defined as φ(x) = ψ(x) ψ b (4.4) where the band bending at x = 0 is known as the surface potential φ s, which is φ s = ψ s ψ b. When a negative voltage is applied to the gate, holes are attracted to the surface creating a hole accumulation layer, and hence the surface is more p-type than the bulk semiconductor (Figure 4.2a). The reverse occurs with the application of a positive voltage on the metal gate, which leads to the majority p-type carriers being forced away from the surface. This creates a depletion region within the semiconductor due to the fixed ionized acceptors. The charge per unit area within this depletion region (Q s ) is given as Q s = qn a x d (4.5) where x d is the depletion width at the surface, and N a is the p-type doping density. When a large positive bias is applied on the gate the negative charges at the surface increase, which results in a wider space charge region and increased band-bending at the surface. This band-bending increases until eventually the Fermi level at the surface is below the Fermi level in the bulk (Figure 4.2b). Under these conditions the semiconductor 50

83 4.2. The MIS capacitor at the surface is now n-type, and an inversion layer of electrons has been formed. This region of operation is called weak inversion. The width of the depletion layer in depletion and weak inversion can be calculated using the abrupt depletion approximation. x d = 2εs φ s qn A (4.6) Strong inversion occurs at the threshold voltage when φ s = 2ψ b, where the electron concentration at the surface is equal to the hole concentration in the bulk. Increasing the gate voltage above the threshold voltage only slightly increases the band-bending, and the depletion width has reached a maximum value. This is because small changes in the band bending will cause a large increase in the surface inversion charge, and a corresponding small change in the depletion width. This maximum depletion width is given as: x dmax = 4εs ψ b qn A (4.7) This expression is similar to that of a zero-biased single-sided n + p step junction. When strong inversion occurs a thin n-type inversion layer is formed at the surface with an electron density greater than the bulk hole density, which is separated from the p-type bulk by the insulating depletion region. This differs from a n + p junction in which the n- type region is formed via doping, rather than inversion. Therefore, when the MIS capacitor is biased into strong inversion, a field-induced junction has been formed Surface charge (Q s ) To obtain an expression for the capacitance of the MIS structure, the surface charge as a function of the gate voltage needs to be determined. It is convenient to define three dimensionless parameters u s, v s and u b as The surface concentrations are then given by: u s = ψ s V t, v s = φ s V t, u b = ψ b V t (4.8) n s = n i exp (u s ) = N D exp (v s ) p s = n i exp ( u s ) = N A exp ( v s ) (4.9) The total charge per unit area at the surface (Q s ) can be determined from the solution of the 1-D Poisson equation and Gauss s law, under the assumptions outlined in Section 4.2.1, and is given as Q s = ε s F s (4.10) where ε s is the semiconductor permittivity, and F s is the surface electric field, given as follows [104]: F s = sgn(v s ) V t λ i 2 [ vs sinh (u b ) (cosh (u b ) cosh (v s + u b ))] 1/2 (4.11) 51

84 4. SiN passivation of HgCdTe photodiodes Q S (C/cm 2 ) Accumulation Strong inversion 2ψ B Depletion Weak inversion Flatband φ s (V) Figure 4.3: Plot showing the variation of the surface charge in a MIS p-type semiconductor capacitor Q s as a function of the total band bending, φ s. After [104]. The function sgn(v s ) is -1 for v s < 0, +1 for v s > 0 and 0 for v s = 0. λ i is the intrinsic Debye length given as: λ i = εs V t 2qn i (4.12) The calculated surface charge as a function of the surface potential is shown in Figure 4.3 [104]. This expression is important in determining the ideal high and low frequency capacitance-voltage curves, and determining how the gate bias affects a gated photodiode. Four distinct regions are shown in Figure 4.3, from accumulation to strong inversion, with flatband between depletion and accumulation Capacitance The small signal capacitance (C) of a MIS capacitor is defined as the ratio of the charge increment δq M or δq SC (where M and SC stand for metal and semiconductor, respectively) to the corresponding increment δv g, the change in the gate voltage. This is expressed as: with units of F.cm 2. C = δq M δv g = δq SC δv g (4.13) The ideal CV curve for a p-type MIS capacitor (Figure 4.4) has four main regions of interest: accumulation, depletion, inversion and deep depletion. For accumulation, changes in the charge on the metal side are balanced by changes in charge on the semiconductor side via majority carriers very close to the semiconductor surface. The device behaves as a parallel plate capacitor with a dielectric between two electrodes, where the insulator capacitance C I, with thickness t I, is given by 52

85 4.2. The MIS capacitor C/CI Accumulation Flatband Weak Inversion Inversion (LF) Depletion Inversion (HF) Deep depletion Voltage (Gate to semiconductor) Figure 4.4: Ideal high and low frequency small-signal capacitance of p-type MIS device. C I = ε Iε 0 t I (4.14) The capacitance does not vary with bias as long as the semiconductor remains in accumulation. In depletion, the change in charge on the metal side is balanced by a change in charge due to a change in the width of the depletion layer. This structure is equivalent to two capacitors in series, C I and C D, where C D is the depletion layer capacitance given by: C D = ε scε 0 x d (4.15) The depletion width is calculated from Equation 4.6. The capacitance varies with gate bias since the surface potential is a function of gate bias. For inversion there exists two ways in which the gate charge can be balanced by changes in the semiconductor charge: in the inversion layer, or changes in the depletion layer charge. For low frequencies, charges are balanced by the inversion charge, since minority carriers can be generated and recombined fast enough to respond to the small-signal changes in gate bias. The low frequency capacitance structure is equivalent to the accumulation case, and the capacitance equals the insulator capacitance C I. At high frequencies charge balancing occurs via the depleted layer at the depletion width maximum, since the inversion layer charge cannot respond to the small-signal changes in gate bias. The total capacitance is thus given by the series combination of C I and C D, with x dmax substituted for x d. Both the low and high frequency capacitance in inversion are relatively independent of gate bias. Finally, deep depletion occurs when minority carriers cannot be supplied fast enough for the gate bias sweep rate. Changes in the inversion layer charge are a slow process, since minority carriers must be generated in the depletion region. Capacitance is calculated as 53

86 4. SiN passivation of HgCdTe photodiodes for inversion and depletion, however the depletion width is no longer limited to x dmax. This is shown by the dotted line in the ideal capacitance (Figure 4.4), where the capacitance drops below that of the inversion capacitance. Deep depletion can be avoided by externally supplying minority carriers; for example from a light source. Derivations of the ideal capacitance-voltage curve from Equations 4.13 and 4.10 are presented in detail in Nicollian [104]. Such calculations are outside the scope of this work, however the results are presented below. The capacitance of the MIS structure is the insulator capacitance C I in series with the semiconductor capacitance C s. For a p-type capacitor, the closed form expression for the high frequency semiconductor capacitance is: where C L is C s (v so ) = C L (v so ) v so < v m C s (v so ) = C L (v m ) v so v m (4.16) C L (v so ) = 2 1/2 sgn (v so ) C F BS [1 exp (v so )] [(v so 1) + exp ( v so )] 1/2 (4.17) and the match-point v m is v m = 2.10u B (4.18) v so is the DC component of the total band-bending at the surface and C F BS is the capacitance at flatband. This closed-form approximation for the capacitance is within 1.5% of the true value of the capacitance. And finally, the low frequency surface capacitance for a p-type capacitor is given by: C s = C F BS 1 exp ( v s ) + (n i /N A ) 2 exp (v s ) [ ] (4.19) 2 (v s 1) + exp ( v s ) + (n i /N A ) 2 exp (v s ) High frequency capacitance measurements are typically made by superimposing a small AC signal onto a DC bias. Low frequency measurements can be made using the quasi-static method, which ramps the voltage bias at a specific rate. By comparing these ideal curves to the experimental data, valuable information such as the flatband voltage, insulator charge and interface traps can be obtained Deviations from the ideal CV curve A real MIS structure always contains features which shift it away from ideal behaviour. Such features include: 1. A difference in the metal and semiconductor work functions, which results in electric fields within the structure at zero-bias; 2. Charges within the insulator or insulator/semiconductor interface; 3. A dipolar polarization. There are several types of charges that affect the MIS behaviour, as shown in Figure 4.5. These are defined as: 54

87 4.2. The MIS capacitor Oxide or Dielectric HgCdTe or semiconductor E c Insulator-trapped charge (Q ot ) Mobile ionic charge (Q m ) Na + K + Oxide or Dielectric Empty { Filled { Interface trap states E f E v Fixed charge (Q f ) x x x x x x x x x Interface trapped charge (Q it ) Transition region HgCdTe or semiconductor Figure 4.5: Band diagram schematic of various defects found in a MIS system. Q f Q m Q ot Q it Fixed insulator charges due to structural defects within the insulator less than 2.5 nm from the insulator/semiconductor interface. Mobile ion charge due to ionic impurities that can move under thermal and electrical stress. Impurities include Li +, Na +, K +, and possibly H +. insulator-trapped charges due to holes and electrons in the bulk of the insulator. Caused by ionising radiation, avalanche injection, or similar processes. Unlike fixed charge, can be annealed out at low temperatures. Interface trap charges due to trapping centres located at the insulator/semiconductor interface. Caused by structural defects, metal impurities, and other defects induced by radiation or similar bond-breaking processes Metal-semiconductor work function difference For the ideal case of a MIS structure the metal (Φ m ) and semiconductor (Φ s ) work functions are equal (Φ m = Φ s ) and there is no electric field at zero applied bias. When the work functions are not equal there is a change in the behaviour of the MIS device, and a voltage must now be applied to reach flatband at the insulator/semiconductor interface. This applied bias V fb is given as: V fb = Φ m Φ s q = Φ ms q = 1 q [ ( Φ m χ + E g 2 ± k bt ln N )] n i (4.20) The sign of the ± is positive for p-type, and negative for n-type, with the doping level given by N, and the electron affinity by χ. If the work functions are not equal then V fb is non-zero, and the ideal CV shifts by the value of V fb as shown in Figure 4.6. Flatband conditions at the surface of a photodiode allows for the maximum perform- 55

88 4. SiN passivation of HgCdTe photodiodes C/C I Ideal V fb (Ф ms <0) V fb (Ф ms =0) 0V V fb (Ф ms >0) V g Figure 4.6: Diagram of the effect of a metal-semiconductor work function difference on the CV curve. ance of the diode (see Chapter 5 for more details). The MIS structure is a vital tool in determining the flatband conditions for passivation of HgCdTe photodiodes Interface-trapped charge Interruption of the semiconductor lattice at the insulator interface leads to states within the bandgap of the semiconductor. Traps below the Fermi-level are occupied and a trapped charge exists at the interface of the insulator and semiconductor (Figure 4.5). Changes in the charge on the metal electrode are balanced by a change in the interface trapped charge, Q it. The overall effect is a spread of the CV curve across the voltage range as shown in Figure 4.7. If slow interface states are present then the effect is a shift of the curve which is dependent on the voltage sweep direction. The shift at the flatband position is given by: where Q it(fb) is the interface charge at flatband. V Qit = Q it(fb)t ox ε I ε 0 (4.21) Two types of interface states exist: acceptor and donor states. Interface states change their charge depending on whether they are filled or empty. Acceptor states are negative when filled, neutral when empty; donor states are positive when filled, neutral when empty. Both interface states can exist in a device, sometimes simultaneously. For the high frequency CV curve the presence of interface states modifies the relationship of C with V but not the values of minimum and maximum capacitance. This is because the interface states cannot keep up with the applied AC signal. For the low frequency CV curve the minimum and maximum capacitance values are modified by the presence of interface states. 56

89 4.2. The MIS capacitor C/C I Ideal Slow interface states Fast interface states V g Figure 4.7: Effect of interface states on the high frequency CV curve. The ideal CV curve is given by the dotted line. ρ(x) Metal Insulator Semiconductor 0 x x+dx t I x Figure 4.8: Charge density distribution of charge located within the insulator. x is the distance from the the metal-insulator interface, t I is the insulator-semiconductor interface and the shaded region shows the charge density ρ(x) Other charges within the insulator Unlike interface charges, insulator-trapped charges, mobile ions, and fixed charge (Q ot, Q m, Q f, respectively) do not change the shape of the CV curve. Instead, they shift the curve in the positive or negative direction by a fixed amount. The voltage shift depends on the type and amount of charge, and its location within the insulator. The distribution of all the charges in the insulator can be represented by the volume density of the charge ρ(x) (Figure 4.8). The voltage required to bring the semiconductor surface to flatband V Q is given as: ti ρ(x)x V Q = dx (4.22) 0 ε I ε 0 Where the origin is set at the metal/insulator interface. Charges located closer to the insulator/semiconductor interface have a greater effect than those located near the origin. The overall effect of charges within the insulator is to shift the ideal curve by a value V Q, similar to the effect of a metal-semiconductor work function difference. This is shown in Figure 4.9, where the different types of charge cause a shift, V 1 or V 2, in the ideal curve. 57

90 4. SiN passivation of HgCdTe photodiodes C/C I ΔV 1 ΔV 2 Ideal V g Figure 4.9: Effect of charges (trapped insulator, mobile and fixed) on the CV curve. The ideal CV curve is given by the dotted line. V 1 and V 2 are caused by a net positive and negative charge within the insulator, respectively. The type of charge trapped in the insulator determines how the CV curve changes. For mobile ion charge, Q m, the amount of shift is determined by the location of the ions within the insulator. Applying a stress to the insulator (temperature and/or electric field) will cause the ions to migrate to one interface, and a flatband voltage shift can be measured. By applying a reverse stress the ions can migrate to the opposite interface and a second value of flatband voltage shift can be measured. From the difference between the two voltages the density of mobile ions can be determined. For insulator-trapped charge, Q ot, the distribution of trapped carriers can change due to an excitation from temperature or photons. This causes a shift in the CV curve. Finally, for fixed insulator charge the impact is similar to the other insulator charges. The flatband voltage shift is given by: V Qf = Q f t I ε I ε 0 (4.23) where Q f is the fixed charge within the insulator. Fixed insulator charges are located at, or very near, the insulator/semiconductor interface Polarization effects Polarization effects arise in materials in which application of an electric field generates dipoles which align with the direction of the electric field. This has been observed in SiN films [105], and other materials such as phosphosilicate glass. Polarization does not change the charge density in the bulk semiconductor since the overall charge of each dipole is zero. However, polarization gives rise to superficial charge at the interfaces which, for a positive gate bias results in positive charge at the metal-insulator interface, and negative charge at the insulator-semiconductor interface (see Figure 4.10). This charge layer leads to a shift V proportional and opposed to the applied V g. Therefore the high frequency capacitance curve is not uniformly shifted along the voltage axis, since V is proportional to V g. 58

91 4.3. Deposition of SiN + - dipole M O S E ti Figure 4.10: Diagram of the dielectric polarisation effect. An electric field generates dipoles which align with the field Deposition of SiN SiN films that are used in microelectronics can be deposited in several ways. These can be broadly grouped into three categories [16]: direct interaction of silicon with ammonia or nitrogen, chemical vapour deposition (CVD), and plasma-enhanced chemical vapour deposition. CVD is the most widely used method due to the high quality films that it produces. A summary of the various CVD methods is shown in Table 4.2 During CVD gases in vapour phase (often diluted) react with an inert carrier gas at a heated surface and deposit a film. Such films include (but are not limited to) poly- Table 4.2: Summary of CVD processes (adapted from [40]). Pressures and temperatures are typical deposition conditions. Process Advantages Disadvantages Comments Pressure/ Temp. APCVD LPCVD MOCVD PECVD Simple, high deposition rate, low temperature Excellent purity and uniformity, conformable step coverage, large wafer capacity Excellent for epi on large surface areas Lower substrate temperatures, fast, good adhesion, good step coverage, low pinhole density High temperature and low deposition rate Poor step coverage, particle contamination Masstransport controlled Surfacereaction controlled Safety concerns High volume, large surface area production (e.g. and con- Chemical hydrogen) particulate tamination Tends to have more pinholes than LPCVD Torr C 0.75 Torr C kpa C 2-5 Torr C 59

92 4. SiN passivation of HgCdTe photodiodes silicon, silicon dioxide and silicon nitride. CVD is versatile and works at relatively low temperatures and pressures. Deposition temperatures are typically higher than 300 C, although deposition can occur at temperatures as low as 125 C. CVD films can be deposited with a great degree of control and economy. CVD is used as a principal fabrication technique for surface micromachining [40], as well as MEMS-based, tunable optical filters on HgCdTe [99 101] For CVD the reactions can be either surface reaction limited or mass-transport limited. At low temperatures the rate limiting step is the surface reaction, at higher temperatures it becomes mass-transport limited. Atmospheric pressure CVD (APCVD) operates in the mass transport region where the flux of reactant species is important. This method of CVD is susceptible to gas phase reactions, particulate contamination and impurity problems. In contrast, LPCVD operates at pressures between 0.25 and 2 Torr, and is reaction rate limited; as process temperature drops the reaction rate drops. The energy for this reaction is provided by substrate heating, generally from 600 C to 900 C, which is too high for HgCdTe processing. Since the surface reaction rate is sensitive to substrate temperature, reducing the temperature to levels suitable for HgCdTe leads to unacceptably low deposition rates. This makes LPCVD unsuitable for HgCdTe processing. It is also possible to deposit SiN via MOCVD. This relies on the flow of gases past a heated sample placed in the stream of gases. Such gases can include arsine, phosphine, and trimethyl aluminium. MOCVD is a cost effective way of depositing films, and is even used for the production of HgCdTe epitaxial layers [106]. Unfortunately, the temperature for SiN deposition using MOCVD is incompatible with HgCdTe processing, with low temperature deposition starting at 545 C [107]. To deposit SiN on HgCdTe the deposition temperature needs to be lowered to less than 125 C. Since APCVD, LPCVD and MOCVD all require a high substrate temperature for deposition, an additional source of energy is required, such as radio frequency (RF) or photon energy. This leads to PECVD, photon-assisted CVD (PCVD), and laser-assisted CVD (LCVD). For photon and laser assisted deposition the energy comes from photons and for PECVD the energy needed for deposition comes from the plasma. With these methods lower temperature deposition is possible due to the additional source of energy, with film depositions able to occur at temperatures as low as 100 C. There are other methods to deposit low temperature SiN films such as electron cyclotron resonance CVD (ERVCD), which also uses a plasma to provide energy for reaction. The PECVD method for depositing SiN films was chosen for this study due to previous experience at The UWA with this method [99 101, 108, 109], and its compatibility with HgCdTe processing. Many factors affect the characteristics of the deposited film, such as temperature, sample surface chemistry, and thermodynamics. Figure 4.11 shows the reaction mechanisms that can occur within the plasma. Such reactions are more complex than physical vapour deposition (PVD) due to the diffuse connective transport which involves intermolecular collisions. They are as follows: 1. Gas phase reactions lead to film precursors and by-products which are often undesirable and unselective, 60

93 4.3. Deposition of SiN 1. Gas phase reactions 2. Transport to surface 3. Redesorption of film precursor 6. Desorption of volatile surface reaction products Surface diffusion Film 5. Nucleation and island growth 3. Adsorption of Film Precursor 7. Step growth Figure 4.11: After[40]. Schematic of transport and reaction mechanisms in the CVD process. 2. Transport of film precursors and reactants to the growth surface, 3. Adsorption/redesorption of film precursors and reactants on the growth surface, 4. Surface reactions (heterogeneous) of adatoms occurring selectively on the heated surface, 5. Incorporation of film constituents into the growing film (nucleation/island formation), 6. Desorption of volatile surface reaction products, 7. Step growth: surface migration of film formers to the growth sites. Reactions which occur on or close to the heated sample are the preferred mechanism for film deposition and are known as heterogeneous reactions [40]. However, the formation of a solid material can also occur in the gas phase (homogeneous reactions) which leads to gas phase cluster deposition. This results in poor adhesion, low density, and high defect density films. Homogeneous reactions need to be avoided when possible. PECVD SiN can be deposited at lower temperatures than other chemical vapour deposition techniques such as LPCVD. This low temperature is critical for HgCdTe processing. Deposition temperatures of PECVD SiN range from 200 to 800 C [97, 98, 110, 111], although deposition can occur as low as 50 C [112]. An added advantage of PECVD is that it is possible to control the properties of the SiN such as stress, density, deposition rate and thickness to a greater degree than other CVD methods. In contrast, the evaporated ZnS must be deposited at a rate of 0.02 nm/s to achieve the required stress and density for passivation. The maximum thickness of the ZnS film is limited to around 200 nm, since thicker films tend to crack. Finer control of the ZnS film parameters is not possible to the same extent as that of SiN. 61

94 4. SiN passivation of HgCdTe photodiodes SiN plasma-enhanced chemical vapour deposition In addition to the low deposition temperature, one of the major advantages of PECVD is the ability to control the mechanical, electrical and chemical properties of the deposited film. This high degree of control is made possible by the control of reaction parameters such as the total reactor pressure, frequency of the source, RF power, growth temperature and the precursor gases. Ideally, the deposited film should be of high density, have a selective etch, low stress, be highly conformal, and be stable over time. Also, the deposition of the film must produce minimal damage to the underlying substrate. This is particularly important in the case of the easily damaged HgCdTe. control of these parameters to produce a high quality film on HgCdTe. The use of PECVD allows the For PECVD, energy for the plasma is supplied via a RF source. The RF-induced plasma transfers energy to the gases allowing the sample to remain at lower temperatures than that of APCVD and LPCVD. PECVD has several advantages over PVD, such as high quality conformal films, low temperature deposition, good adhesion, low pinhole density, greater degree of control over the chemical, mechanical and electrical properties of the film, and high throughput. The higher degree of control of the properties of the film is important, as it allows optimisation of the film properties for the passivation of photodiodes. This includes the stress, film composition and density of the films. The goal is to produce a stoichiometric film at the surface. For this to occur several activation energies must be overcome, and this is achieved with an energy source such as photo bombardment or a plasma. The reactant gases are silane (SiH 4 ), ammonia (NH 3 ) with nitrogen (N 2 ) used as a diluent gas. Since silane concentrations above 2% are pyrophoric, the diluent gas is often bottled with silane to reduce the risk of explosion. The PECVD system used in this work is an Oxford Instruments dual PECVD and RIE80 system, with a schematic of the PECVD system shown in Figure This system is a parallel plate design, which places the samples within the plasma. This means that the samples are subjected to the physical effects of the plasma such as ion bombardment and heating. The substrate electrode is grounded and has a diameter of 200 mm with the top electrode 50 mm away with a diameter of 300 mm. The substrate electrode is grounded to reduce damage caused by ion bombardment. A gas showerhead is used to inject the gas, and exhaust gasses leave the chamber from underneath the electrode. This provides a laminar flow of gases, which improves the uniformity of the deposited films. The sample stage is heated via a resistive element, and is capable of reaching 300 C. The matching network for the RF power source is a fixed inductor and two variable capacitors. SiN films deposited via PECVD are non-stoichiometric and are more properly described as SiN x H y [98]. Many studies correlate the deposition conditions of SiN to the composition of the films [97, ]. Therefore, several authors have determined the reaction mechanisms underlying deposition of SiN using PECVD [97, 98, 116]. Under amino-saturated conditions, a gas-phase precursor-forming reaction occurs [98] SiH 4 + 4NH 3 plasma Si(NH 2 ) 4 + 4H 2 (4.24) 62

95 4.4. SiN characterisation Matching network RF Power MHz plasma Precursor gas in Sample Throttle Heater Pump Figure 4.12: Diagram of the PECVD system used for SiN deposition. The system is a parallel plate Oxford Instruments dual PECVD and RIE80 system. The plasma is formed from SiH 4, NH 3, and N 2, and is represented by the cloud between the plates. The sample stage temperature can be set from room temperature to 300 C. followed by a surface condensation reaction 3Si(NH 2 ) 4 heat Si 3 N 4 + 8NH 3 (4.25) A more complicated reaction scheme with the dilution gas N 2 is given by Claassen [97]. 4.4 SiN characterisation Prior to fabrication of photodiodes with SiN as an insulator, conditions for the deposition of suitable SiN films were investigated. As previously stated, the typical deposition temperature of PECVD SiN is from 200 to 300 C [40]. Processing temperatures for HgCdTe must be kept below 125 C to reduce surface damage associated with diffusion of Hg and interface defects. Limiting the thermal budget of HgCdTe is important in ensuring good quality devices are produced. However, low temperature SiN films (less than 125 C) are amorphous [40], and often unstable, particularly when deposited under conditions to achieve close to zero stress [99 101]. Furthermore, it is expected that reducing the film deposition temperature will cause a decrease in the quality of the film as we move further away from stoichiometry [98, 112, 117, 118]. Suitable conditions for the deposition of PECVD SiN films need to be determined. Several properties of the SiN layer were required to be tailored, including: low leakage current through the insulator (high film resistivity); deposition conditions (e.g. temperature and ion bombardment) that cause minimal 63