Film Deposition Part 1
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1 1 Film Deposition Part 1 Chapter 11 : Semiconductor Manufacturing Technology by M. Quirk & J. Serda Spring Semester 2013 Saroj Kumar Patra Semidonductor Manufacturing Technology, Norwegian University of Science and Technology ( NTNU )
2 2 Objectives 1. Introduction and a historical overview 2. Film Layering Terminology 3. Thin Film Characteristics 4. Film Growth 5. Film Deposition Techniques 6. CVD Chemical Processes 7. CVD Reaction
3 3 What is deposition? A microchip is a wafer with different film layers on top of the wafer surface. The process to place the layers on top of the wafer is called deposition. Conductor and insulation films are essential
4 4 Historical overview SSI: Small Scale Integration, IC s with a number of transistors of magnitude 10 per chip (early 1960's) MSI: Medium Scale Integration, 10 2 transistors per chip (late 1960 s) LSI: Large Scale Integration, 10 3 transistors per chip (mid 1970 s) VLSI: Very Large Scale Integration, 10 5 transistors per chip (late 1980 s) ULSI: Ultra Large Integration, 10 7 transistors per chip
5 5 Topside Nitride Oxide Pad Metal ILD Oxide Poly Poly Field oxide Metal n+ n+ p+ p+ Pre-metal oxide Sidewall oxide Gate oxide p- epi layer p+ silicon substrate n-well
6 6 Passivation layer ILD-6 Bonding pad metal M-4 ILD-5 M-3 ILD-4 ILD-3 M-2 ILD-2 Vi a LI metal M-1 Poly gate ILD-1 LI oxide n+ p+ p+ STI n+ n+ n-well p-well p+ p- Epitaxial layer p+ Silicon substrate
7 7 Terminology Metal Layers Multilevel metallization The metal and dielectric layers needed to interconnect the devices on the wafer. Aluminium metallization
8 8 Noncritical layers Critical layers Usually upper metal levels. Less sensitive and wider linewidth. Can affect chip speed and power consumption depending on the length. Metal layers with linewidths etched to the CD of the device. Sensitive to contamination and reliability issues.
9 9 Dielectric Layers ILD-1 (first interlayer dielectric) The main function is to isolate the transistor devices in two ways. Electrically from the metal interconnect layers and physically from contamination sources like mobile ions. ILD is used between metal layers to insulate between conducting metals or adjacent metal lines. The dielectric constant is an important property of insulating films because it directly affects circuit speed performance.
10 10 Vias The metal layers are connected by openings in the dielectric film. These openings are referred to as vias.
11 11 Film Deposition
12 12 Film Deposition Thin-Film Characteristics Step coverage
13 13 Film Deposition Thin-Film Characteristics Ratio gaps aspect (conformality) Application: Submicrometers sensors and%20submicrometer%20sensors.htm
14 14 Film Deposition Thin-Film Characteristics Stoichiometries ratio «The chemical reactions are complex, leading to films with different composition than intended»
15 15 Film Deposition Thin-Film Characteristics Film Structure
16 16 Film Deposition Thin-Film Characteristics Film Adhesion
17 17 Film Growth 3 stages Gas molecules 1st stage 2nd stage 3rd stage Nucleation Coalescence Continuous film Substrate
18 18 Film Growth Big or small? or?
19 19 Film Growth Forms of semiconductor film
20 20 Film Deposition Techniques
21 21 Film Deposition Techniques Comparison in details Chemical Processes 3 Physical Processes 1 Chemical Vapor Deposition (CVD) Plating Physical Vapor Deposition (PVD or Sputtering) 4 Evaporation Spin On Methods Atmospheric Pressure CVD (APCVD) or Sub-Atmospheric CVD (SACVD) Electrochemical deposition (ECD), commonly referred to as electroplating DC Diode Filament and Electron Beam Spin on glass (SOG) Low Pressure CVD (LPCVD) Plasma Assisted CVD: Plasma Enhanced CVD (PECVD) High Density Plasma CVD (HDPCVD) Electroless Plating 5 Radio Frequency (RF) DC Magnetron Molecular Beam Epitaxy (MBE) Spin on dielectric (SOD) 2 Vapor Phase Epitaxy (VPE) and Metal-organic CVD (MOCVD) Ionized metal plasma (IMP) Dielectrics: Chapter 11 Metals: Chapter 12 Chapter 12 Chapter 12 Chapter 12 Chapter 11
22 22 Chemical Vapor Deposition (CVD) Depositing solid film on wafer surface through chemical reaction: 1. Chemical action 2. External supplementation 3. Vapor phase. - Heated wafer surface. - Chemical compounds in a reactor. - Particles deposit on wafer surface forming film.
23 23 CVD Chemical Processes 1. Pyrolysis: Dissociation by heat (no oxygen). 2. Photolysis: Dissociation by readiant energy. 3. Reduction: Chemical reaction with hydrogen. 4. Oxidation: Chemical reaction with oxygen. 5. Redox: 3 + 4, formation of 2 compounds.
24 24 Reaction for depositon of SiO 2 (heat) SiH 4 + O 2 SiO 2 + 2H 2 silane oxygen silicon dioxide hydrogen
25 25 CVD reaction Heterogeneous: close to surface (surface catalyzed). - Good. Homogeneous: in gas phase above surface. -Bad: Gas-phase clusters, poor adhesion, defects, low density.
26 26 Reaction steps 1) Gas transport to deposition zone CVD Reactor Gas delivery 2) Film precursor reactions By-product 7) Desorption of by-products 8) By-product removal Exhaust 3) Diffusion of gas molecules 4) Adsorption 5) Diffusion into substrate 6) Substrate reactions Continuous film Substrate
27 27 Example process With silicon hydride precursor 1. SiH 4 (g) SiH 2 (g) + H 2 (g) (Pyrolysis) 2. SiH 4 (g) + SiH 2 (g) Si 2 H 6 (g) Silane and SiH 2 adsorbed. 3. Si 2 H 6 (g) 2Si (s) + 3H 2 (g) Decomposition to form final (solid) product
28 28 Rate limiting step Slowest step decides speed of process Mass-transport limited: Weak temperature dependence High T and p processes Reaction-rate limited: (kinetically controlled) «The liquid will not flow faster than the funnel permits». Low T gives insufficient energy. Important to maintain uniform T.
29 29 Gas Flow Gas flow Diffusion Product Deposited film Si substrate
30 30 Gas Flow We assume diffusion is the dominant transfer mechanism - On wafer surface: boundary layer with zero velocity at surface. - Narrow boundary layer: stagnant layer. Gas flow Gas flow Boundary layer Stagnant layer
31 31 Pressure Low pressure: - increased diffusivity, better transport of reactants. - better removal of by-products - rate-limiting step is surface reaction Can stack wafers vertically in reactor.
32 32 Doping during CVD Benefits: Reduction of film stress Moisture and ionic contaminant barrier SiH 4 (g) + 2PH 3 (g) + O 2 (g) SiO 2 (s) + 2P(s) + 5H 2 (g) silane phoshine oxygen silicon dioxide phosphorous hydrogen PSG glass: SiO weight% P 2 O 5 - First interlayer dielectric layer - Low deposition temperature - Planar surface - Gap-filling - Ionic contaminant barrier
33 33 Other glasses (amorphous crystal structure) - Borosilicate glass (BSG) (diborane) - Borophosphosilicate Glass (BPSG) (boric oxide, phosphorous pentoxide) - Fluorosilicate Glass (FSG) (Silicon tetrafluoride) Silicon and Silicon Oxide Doping -Not the same! - Dopants in oxide are not acceptors/donors. - Done to improve oxide characteristics.
34 34 g{tç~ léâ
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