Digital Fundamentals

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1 Online Instructor s Manual for Digital Fundamentals Eleventh Edition Thomas L. Floyd Boston Columbus Indianapolis New York San Francisco Hoboken Amsterdam Cape Town Dubai London Madrid Milan Munich Paris Montreal Toronto Delhi Mexico City Sao Paulo Sydney Hong Kong Seoul Singapore Taipei Tokyo

Copyright 015 Pearson Education, Inc., publishing as Prentice Hall, Hoboken, New Jersey and Columbus, Ohio. All rights reserved. Manufactured in the United States of America.

2 Copyright 015 Pearson Education, Inc., publishing as Prentice Hall, Hoboken, New Jersey and Columbus, Ohio. All rights reserved. Manufactured in the United States of America. This publication is protected by Copyright, and permission should be obtained from the publisher prior to any prohibited reproduction, storage in a retrieval system, or transmission in any form or by any means, electronic, mechanical, photocopying, recording, or likewise. To obtain permission(s) to use material from this work, please submit a written request to Pearson Education, Inc., Permissions Department, 1 River Street, Hoboken, New Jersey. Many of the designations by manufacturers and seller to distinguish their products are claimed as trademarks. Where those designations appear in this book, and the publisher was aware of a trademark claim, the designations have been printed in initial caps or all caps ISBN-13: ISBN-10:

3 CONTENTS PART 1: PROBLEM SOLUTIONS...1 CHAPTER 1 Introductory Concepts... CHAPTER Number Systems, Operations, and Codes... CHAPTER 3 Logic Gates...4 CHAPTER 4 Boolean Algebra and Logic Simplification...37 CHAPTER 5 Combinational Logic Analysis...66 CHAPTER 6 Functions of Combinational Logic...10 CHAPTER 7 Latches, Flip-Flops, and Timers CHAPTER Shift Registers CHAPTER 9 Counters...15 CHAPTER 10 Programmable Logic...11 CHAPTER 11 Data Storage CHAPTER 1 Signal Conversion and Processing...00 CHAPTER 13 Data Transmission...0 CHAPTER 14 Data Processing and Control...1 CHAPTER 15 Integrated Circuit Technologies...4 PART : APPLIED LOGIC SOLUTIONS...31 CHAPTER CHAPTER CHAPTER CHAPTER CHAPTER...47 CHAPTER CHAPTER PART 3: LABORATORY SOLUTIONS FOR EXPERIMENTS IN DIGITAL FUNDAMENTALS by David Buchla and Doug Joksch...51 PART 4: MULTISIM PROBLEM SOLUTIONS iii

4 PART 1 Problem Solutions

5 Chapter 1 CHAPTER 1 INTRODUCTORY CONCEPTS Section 1-1 Digital and Analog Quantities 1. Digital data can be transmitted and stored more efficiently and reliably than analog data. Also, digital circuits are simpler to implement and there is a greater immunity to noisy environments.. Pressure is an analog quantity. 3. A clock, a thermometer, and a speedometer can have either an analog or a digital output. Section 1- Binary Digits, Logic Levels, and Digital Waveforms 4. In positive logic, a1 is represented by a HIGH level and a 0 by a LOW level. In negative logic, a 1 is represented by a LOW level, and a 0 by a HIGH level. 5. HIGH = 1; LOW = 0. See Figure A 1 is a HIGH and a 0 is a LOW: (a) HIGH, LOW, HIGH, HIGH, HIGH, LOW, HIGH (b) HIGH, HIGH, HIGH, LOW, HIGH, LOW, LOW, HIGH

6 Chapter 1 7. See Figure 1-. Ampl = 10 V tpw.7 μs. T = 4 ms. See Figure f = 1 = T 1 4 ms = 0.5 khz = 50 Hz 10. The waveform in Figure 1-61 is periodic because it repeats at a fixed interval. 11. t W = ms; T = 4 ms tw ms % duty cycle = 100 = 100 = 50% T 4 ms 1. See Figure

7 Chapter Each bit time = 1 μs Serial transfer time = ( bits)(1 μs/bit) = μs Parallel transfer time = 1 bit time = 1 μs T f 3.5 GHz = 0.6 ns Section 1-3 Basic Logic Functions 15. L ON = SW1 SW SW1 SW. An AND gate produces a HIGH output only when all of its inputs are HIGH. 17. AND gate. See Figure An OR gate produces a HIGH output when either or both inputs are HIGH. An exclusive-or gate produces a HIGH if one input is HIGH and the other LOW. Section 1-4 Combinational and Sequential Logic Functions 19. See Figure

8 Chapter T = = 100 μs 10 khz 100 ms Pulses counted = 100 μ s = See Figure 1-7. Section 1-5 Introduction to Programmable Logic. The following do not describe PLDs: VHDL, AHDL 3. (a) SPLD: Simple Programmable Logic Device (b) CPLD: Complex Programmable Logic Device (c) HDL: Hardware Description Language (d) FPGA: Field-Programmable Gate Array (e) GAL: Generic Array Logic 4. (a) Design entry: The step in a programmable logic design flow where a description of the circuit is entered in either schematic (graphic) form or in text form using an HDL. (b) Simulation: The step in a design flow where the entered design is simulated based on defined input waveforms. (c) Compilation: A program process that controls the design flow process and translates a design source code to object code for testing and downloading. (d) Download: The process in which the design is transferred from software to hardware. 5. Place-and-route or fitting is the process where the logic structures described by the netlist are mapped into the actual structure of the specific target device. This results in an output called a bitstream. Section 1-6 Fixed-Function Logic Devices 6. Circuits with complexities of from 100 to 10,000 equivalent gates are classified as large scale integration (LSI). 7. The pins of an SMT are soldered to the pads on the surface of a pc board, whereas the pins of a DIP feed through and are soldered to the opposite side. Pin spacing on SMTs is less than on DIPs and therefore SMT packages are physically smaller and require less surface area on a pc board. 5

9 Chapter 1. See Figure 1-. Section 1-7 Test and Measurement Instruments 9. Amplitude = top of pulse minus base line V = V 1 V = 7 V 30. Amplitude = (3 div)( V /div) = 6 V. 31. T = (4 div)( ms/div) = ms f = 1 1 = 15 Hz T ms 3. Record length = (Acquisition time)(sample rate) = ( ms) 1 Msamples/s = 4 ksamples Section 1- Introduction to Trouble Shooting 33. Troubleshooting is the process of recognizing, isolating, and correcting a fault or failure in a system. 34. In the half-splitting method, a point half way between the input and output is checked for the presence or absence of a signal. 35. In the signal-tracing method, a signal is tracked as it progresses through a system until a point is found where the signal disappears or is incorrect. 36. In signal subsitution, a generated signal replaces the normal input signal of a system or portion of s system. In signal injection a generated signal is injected into the system at a point where the normal signal has been determined to be faulty or missing. 37. When a failure is reported, determine when and how it failed and what are the symptoms. 6

10 Chapter 1 3. No output signal can be caused by no dc power, no input signal, or a short or open that prevents the signal from getting to the output. 39. An incorrect output can be caused by an incorrect dc supply voltage, improper ground, incorrect component value, or a faulty component. 40. Some types of obvious things that you look for when a system fails are visible faults such as shorted wires, solder splashes, wire clippings, bad or open connections, burned components, Also look for a signal that is incorrect in terms of amplitude shape, or frequency or the absence of a signal. 41. To isolate a fault in a system, apply half-splitting or signal tracing. 4. Two common troubleshooting instruments are the oscilloscope and the DMM. 43. When a fault has been isolated to a particular circuit board, the options are to repair the board or replace the board with a known good board. 7

11 CHAPTER NUMBER SYSTEMS, OPERATIONS, AND CODES Section -1 Decimal Numbers 1. (a) 136 = = The digit 6 has a weight of 10 0 = 1 (b) 54,69 = = 5 10, The digit 6 has a weight of 10 = 100 (c) 671,90 = = 6 100, , The digit 6 has a weight of 10 5 = 100,000. (a) 10 = 10 1 (b) 100 = 10 (c) 10,000 = 10 4 (d) 1,000,000 = (a) 471 = = = (b) 9,356 = = = 9, (c) 15,000 = = 1 100,000 10, = 100,000 0,000 5, The highest four-digit decimal number is Section - Binary Numbers 5. (a) 11 = = 1 = 3 (b) 100 = = 4 (c) 111 = = 4 1 = 7 (d) 1000 = = (e) 1001 = = 1 = 9 (f) 1100 = = 4 = 1 (g) 1011 = = 1 = 11 (h) 1111 = = 4 1 = 15

12 Chapter 6. (a) 1110 = = 4 = 14 (b) = = = 10 (c) = = 4 = (d) = 1 4 = (e) 1 = = 4 1 = 1 (f) = = 4 1 = 9 (g) = = 4 1 = 3 (h) = = 4 1 = (a) = = = (b) = = = 4.5 (c) = = = (d) = = = (e) = = = (f) = (g) = = = = = (h) = = = (a) 1 = 3 (b) 3 1 = 7 (c) 4 1 = 15 (d) 5 1 = 31 (e) 6 1 = 63 (f) 7 1 = 17 (g) 1 = 55 (h) 9 1 = 511 (i) 10 1 = 103 (j) 11 1 = (a) ( 4 1) < 17 < ( 5 1); 5 bits (b) ( 5 1) < 35 < ( 6 1); 6 bits (c) ( 5 1) < 49 < ( 6 1); 6 bits (d) ( 6 1) < 6 < ( 7 1); 7 bits (e) ( 6 1) < 1 < ( 7 1); 7 bits (f) ( 6 1) < 114 < ( 7 1); 7 bits (g) ( 7 1) < 13 < ( 1); bits (h) ( 7 1) < 05 < ( 1); bits 9

13 Chapter 10. (a) 0 through 7: 000, 001, 010, 011, 100, 101, 110, 111 (b) through 15: 1000, 1001,, 1011, 1100, 1101, 1110, 1111 (c) through 31: 10000, 10001, 10010, 10011, 0, 1, 10110, 10111, 11000, 11001, 1, 11011, 11100, 11101, 11110, (d) 3 through 63: , , , , , , , , 0, 01, 10, 11, , , , , , , , , 10, 11, , , , , 11, , , , , (e) 64 through 75: , , , , , , , , , , 100, Section -3 Decimal-to-Binary Conversion 11. (a) 10 = = 3 1 = (b) 17 = 1 = 4 0 = (c) 4 = = 4 3 = (d) 4 = 3 = 5 4 = (e) 61 = = = (f) 93 = = = (g) 15 = = = (h) = 1 3 = = (a) = (b) = (c) =

14 Chapter 13. (a) 15 = 7, R = 1( LSB) (b) 1 = 10, R = 1 (LSB) (c) = 14, R = 0 (LSB) 7 = 3, R = 1 10 = 5, R = 0 14 = 7, R = 0 3 = 1, R = 1 5 =, R = 1 7 = 3, R = 1 1 = 0, R = 1 (MSB) = 1, R = 0 3 = 1, R = 1 1 = 0, R = 1 (MSB) 1 = 0, R = 1 (MSB) (d) 34 = 17, R = 0 (LSB) 17 =, R = 1 = 4, R = 0 4 =, R = 0 = 1, R = 0 1 = 0, R = 1 (MSB) (e) 40 = 0, R = 0 (LSB) 0 = 10, R = 0 10 = 5, R = 0 5 =, R = 1 = 1, R = 0 1 = 0, R = 1 (MSB) (f) 59 = 9, R = 1 (LSB) 9 = 14, R = 1 14 = 7, R = 0 7 = 3, R = 1 3 = 1, R = 1 1 = 0, R = 1 (MSB) (g) 65 = 3, R = 1 (LSB) (h) 73 = 36, R = 1 (LSB) 3 =, R = 0 36 = 1, R = 0 =, R = 0 1 = 9, R = 0 = 4, R = 0 9 = 4, R = 1 4 =, R = 0 4 =, R = 0 = 1, R = 0 = 1, R = 0 1 = 0, R = 1 (MSB) 1 = 0, R = 1 (MSB) 11

15 Chapter 14. (a) 0.9 = (MSB) (b) = (MSB) 0.96 = = = = = = = = = = continue if more accuracy is desired 0.0 = continue if more accuracy is desired (c) 0.90 = (MSB) = = = = = = continue if more accuracy is desired Section -4 Binary Arithmetic 15. (a) (b) (c) (d) (e) (f) (a) (b) (c) (d) (e) (f)

16 Chapter 17. (a) (e) (b) (f) (c) (d) (a) = 010 (b) = 0011 (c) = Section -5 Complements of Binary Numbers 19. Zero is represented in 1 s complement as all 0 s (for 0) or all 1 s (for 0). 0. Zero is represented by all 0 s only in s complement. 1. (a) The 1 s complement of 101 is 010. (b) The 1 s complement of 110 is 001. (c) The 1 s complement of is (d) The 1 s complement of 1111 is (e) The 1 s complement of 111 is 000. (f) The 1 s complement of is Take the 1 s complement and add 1: (a) 01 1 = 10 (b) = 001 (c) = 0111 (d) = 0011 (e) = (f) = (g) = 0000 (h) = Section -6 Signed Numbers 3. (a) Magnitude of 9 = (b) Magnitude of 5 = = = 1101 (c) Magnitude of = (d) Magnitude of 13 = = =

17 Chapter 4. (a) Magnitude of 34 = (b) Magnitude of 57 = = = (c) Magnitude of 99 = (d) Magnitude of 115 = = = (a) Magnitude of 1 = 1100 (b) Magnitude of 6 = = = (c) Magnitude of = (d) Magnitude of 15 = = = (a) = 5 (b) 0110 = 1 (c) = (a) = ( ) = 10 (b) 0110 = (110) = 1 (c) = ( ) = 64. (a) = ( ) = 103 (b) 0110 = (110) = 1 (c) = ( ) = (a) sign = exponent = = Mantissa = (b) sign = exponent = = 13 = 1000 Mantissa = (a) Sign = 1 Exponent = = = Mantissa = = = (b) Sign = 0 Exponent = = = 77 Mantissa =

18 Chapter Section -7 Arithmetic Operations with Signed Numbers 31. (a) 33 = = (c) 46 = = = (b) 56 = = = (d) = = = = (a) (b) (a) (b) (a) (b) Changing to s complement with sign: = =, remainder of 1 5 Section - Hexadecimal Numbers 37. (a) 3 = (b) 59 = (c) A14 = (d) 5C = (e) 4100 = (f) FB17 = (g) A9D =

19 Chapter 3. (a) 1110 = E (b) 10 = (c) = 17 (d) 0110 = A6 (e) = 3F0 (f) = (a) 3 = = 3 3 = 35 (b) 9 = = 144 = 146 (c) 1A = = 10 = 6 (d) D = = 1 13 = 141 (e) F3 = = 40 3 = 43 (f) EB = = 4 11 = 35 (g) 5C = = = 1474 (h) 700 = 7 = (a) = 0, remainder = hexadecimal number = (b) 14 = 0, remainder = 14 = E hexadecimal number = E (c) 33 =, remainder = 1 (LSD) (d) 5 = 3, remainder = 4 (LSD) = 0, remainder = 3 = 0, remainder = 3 hexadecimal number = 1 hexadecimal number = 34 (e) 4 = 17, remainder = 1 = C (LSD) (f) 90 = 10, remainder = 10 = A (LSD) 17 = 1, remainder = 1 10 = 11, remainder = 4 1 = 0, remainder = 1 11 = 0, remainder = 11 = B hexadecimal number = 11C hexadecimal number = B4A (g) 4019 = 51, remainder = 3 (LSD) (h) 6500 = 406, remainder = 4 (LSD) 51 = 15, remainder = 11 = B 406 = 5, remainder = 6 15 = 0, remainder = 15 = F 5 = 1, remainder = 9 hexadecimal number = FB3 1 = 0, remainder = 1 hexadecimal number = (a) 37 9 = 60 (b) A0 6B = 10B (c) FF BB = 1BA

20 Chapter 4. (a) = 11 (b) C 3A = E (c) FD = 75 Section -9 Octal Numbers 43. (a) 1 = = = 10 (b) 7 = = 7 = 3 (c) 56 = = 40 6 = 46 (d) 64 = = 4 4 = 5 (e) 103 = = 64 3 = 67 (f) 557 = = = 367 (g) 3 = = = 115 (h) 104 = = 51 4 = 53 (i) 7765 = = = (a) 15 = 1, remainder = 7 (LSD) (b) 7 = 3, remainder = 3 (LSD) 1 = 0, remainder =1 3 = 0, remainder = 3 octal number = 17 octal number = 33 (c) 46 = 5, remainder = 6 (LSD) (d) 70 =, remainder = 6 (LSD) 5 = 0, remainder = 5 = 1, remainder = 0 octal number = 56 1 = 0, remainder = 1 octal number = 106 (e) 100 = 1, remainder = 4 (LSD) (f) 14 = 17, remainder = 6 (LSD) 1 = 1, remainder = 4 17 =, remainder = 1 1 = 0, remainder = 1 octal number = 144 = 0, remainder = octal number = (g) 19 = 7, remainder = 3 (LSD) (h) 435 = 54, remainder = 3 (LSD) 7 = 3, remainder = 3 54 = 6, remainder = 6 3 = 0, remainder = 3 octal number = = 0, remainder = 6 octal number =

21 45. (a) 13 = (b) 57 = (c) 101 = (d) 31 = (e) 540 = (f) 4653 = (g) 1371 = (h) = (i) = (a) 111 = 7 (b) 010 = (c) = 67 (d) = 5 (e) = 14 (f) = 136 (g) = 5431 (h) = 603 (i) = Section -10 Binary Coded Decimal (BCD) 47. (a) 10 = (b) 13 = (c) 1 = (d) 1 = (e) 5 = (f) 36 = (g) 44 = (h) 57 = (i) 69 = (j) 9 = (k) 15 = (l) 156 = (a) 10 = 4 bits binary, bits BCD (b) 13 = bits binary, bits BCD (c) 1 = bits binary, bits BCD (d) 1 = 1 5 bits binary, bits BCD (e) 5 = bits binary, bits BCD (f) 36 = bits binary, bits BCD (g) 44 = bits binary, bits BCD (h) 57 = bits binary, bits BCD (i) 69 = bits binary, bits BCD (j) 9 = bits binary, bits BCD (k) 15 = bits binary, 1 ibts BCD (l) 156 = bits binary, 1 bits BCD 1

22 Chapter 49. (a) 104 = (b) 1 = (c) 13 = (d) 150 = (e) = (f) 10 = (g) 359 = (h) 547 = (i) 1051 = (a) 0001 = 1 (b) 0110 = 6 (c) 1001 = 9 (d) = 1 (e) = 19 (f) = 3 (g) = 45 (h) = 9 (i) = (a) = 0 (b) = 37 (c) = 346 (d) = 41 (e) = 754 (f) = 00 (g) = 97 (h) = 3 (i) = 901 (j) = (a) (d) (g) (b) (e) (h) (c) (f)

23 Chapter (a) (c) (e) (g) (b) (d) (f) (h) invalid invalid invalid invalid invalid invalid invalid invalid

24 Chapter 54. (a) (c) (e) (g) (b) (d) (f) (h) Section -11 Digital Codes 55. The Gray code makes only one bit change at a time when going from one number in the sequence to the next number. Gray for 1111 = 1000 Gray for 0000 = (a) Binary (b) Binary Gray Gray (c) Binary Gray 57. (a) Gray (b) Gray Binary Binary (c) Gray Binary 5. (a) (b) (c) (d) (e) (f) (g) (h) (i)

25 Chapter 59. (a) CAN (b) 100 J (c) = (d) # (e) > (f) B H e l l o. # H o w # a r e # y o u? C 6C 6F E F F 75 3F INPUT A, B SP I N E P U T SP A , C B Section -1 Error Codes 63. Code (b) has five 1s, so it is in error. 64. Codes (a) and (c) 0 are in error because they have an even number of 1s. 65. (a) (b) (c)

26 Chapter 66. (a) (a) (b) (b) (c) (c) In each case, you get the other number Remainder = 0110 Append remainder to data CRC is Error in MSB of transmitted CRC: Remainder is 10, indicating an error. 3

Essentials of College Algebra

Essentials of College Algebra For these Global Editions, the editorial team at Pearson has collaborated with educators across the world to address a wide range of subjects and requirements, equipping students