Bidirectional DC-DC Converter Using Modular Marx Power Switches and Series/Parallel Inductor for High-Voltage Applications

Transcription

1 Bdrectnal DC-DC Cnverter Usng Mdular Marx Pwer Swtches and Seres/Parallel Inductr fr Hgh-Vltage Applcatns Rcard Luís, J. Slva, Jsé Quadrad, Sóna Pnt, Duarte Mesquta E Susa T cte ths versn: Rcard Luís, J. Slva, Jsé Quadrad, Sóna Pnt, Duarte Mesquta E Susa. Bdrectnal DC-DC Cnverter Usng Mdular Marx Pwer Swtches and Seres/Parallel Inductr fr Hgh-Vltage Applcatns. Lus M. Camarnha-Mats; Nun S. Barrent; Rcard Mendnça. 5th Dctral Cnference n Cmputng, Electrcal and Industral Systems (DCEIS), Apr 214, Csta de Caparca, Prtugal. Sprnger, IFIP Advances n Infrmatn and Cmmuncatn Technlgy, AICT-423, pp , 214, Technlgcal Innvatn fr Cllectve Awareness Systems. <1.17/ _53>. <hal > HAL Id: hal Submtted n 16 Feb 216 HAL s a mult-dscplnary pen access archve fr the depst and dssemnatn f scentfc research dcuments, whether they are publshed r nt. The dcuments may cme frm teachng and research nsttutns n France r abrad, r frm publc r prvate research centers. L archve uverte plurdscplnare HAL, est destnée au dépôt et à la dffusn de dcuments scentfques de nveau recherche, publés u nn, émanant des établssements d ensegnement et de recherche franças u étrangers, des labratres publcs u prvés. Dstrbuted under a Creatve Cmmns Attrbutn 4. Internatnal Lcense

2 Bdrectnal DC-DC Cnverter Usng Mdular Marx Pwer Swtches and Seres/Parallel Inductr fr Hgh- Vltage Applcatns Rcard Luís 1, J. Fernand Slva 2, Jsé C. Quadrad 1, Sóna Ferrera Pnt 2, Duarte de Mesquta e Susa 2 1 Insttut Superr de Engenhara de Lsba, R. Cnselher Emíd Navarr, Lsba, Prtugal rlus@deea.sel.pt, jcquadrad@sel.pt 2 Insttut Superr Técnc, Insttut Superr Técnc, INESC-d, DEEC, AC Energa Av. Rvsc Pas, Lsba, Prtugal Fernand.alves@ tecnc.ulsba.pt, duarte.susa@tecnc.ulsba.pt, snafp@tecnc.ulsba.pt Abstract. Ths paper presents the mdellng and the numercal smulatn results f a bdrectnal DC-DC cnverter usng mdular Marx pwer electrnc swtches t be applcable n hgh-vltage cnverters. T acheve ample vltage rat between hgh-vltage and lw-vltage sdes, the prpsed DC-DC cnverter uses als a pwer electrnc crcut, n the lw-vltage cnverter sde, that changes the cnnectn between three nductrs, as a seres r parallel cnnectn, t ad the energy transfer t the nductrs. Keywrds: Bdrectnal DC-DC cnverter; mdular Marx swtches; seresparallel nductr crcut. 1 Intrductn The recent ndustral applcatns request energy strage systems (ESS) based n lthum-n batteres banks and/r ultracapactrs cells fr lng-term energy strage r shrt-term energy strage, respectvely. Examples f these applcatns can be seen n unnterruptble pwer supples, hybrd pwered tractn systems, renewable energy generatn, mble energy generatn and ntegrated actve flters. The cntrl f the charge and dscharge mdes f the ESS need a bdrectnal pwer electrnc nterface between the strage banks and the lads r t hgher vltage DC-bus systems generally used wth three-phase nverters, actve frnt-end rectfers and ther pwer cnverters tplges. Due the lw nmnal vltage f ths batteres and ultracapactrs cells, t s requred a large vltage cnversn rat fr bdrectnal DC-DC cnverter. In case f ultracapactrs ther wde varatn vltage n chargng and dschargng peratn make dffcult t desgn a bdrectnal DC-DC cnverter wth hgh vltage rat.

3 478 R. Luís et al. In the last decade several wrks has been dne t desgn slutns fr bdrectnal DC-DC cnverters. A gd revew can be fund n [1][2], where the man slated and nn-slated bdrectnal cnverter tplges are deplyed. In ths paper, the prpsed pwer electrnc cnverter s a bdrectnal nn slated half-brdge DC-DC cnverter based n buck-bst cnverter, [3]. T make the cnverter able t hgh-vltage applcatns, t uses a seres-stacked semcnductrs based n sld-state Marx generatr cncept, [4]. Usng a Marx generatr as a seres swtch, allws the use f lw-vltage semcnductrs and arrange the verall structure f the DC-DC cnverter wth mdular cells, whch leads t cmpactness, lw weght, lw cst and prtablty f these pwer cnverters, [4]. The Fg. 1 presents the bdrectnal DC-DC cnverter emplyng sx mdules f Marx cells and seres-parallel nductr electrnc crcut. The mdular Marx pwer electrnc swtches, SM 1 and SM 2, each ne, uses three mdular Marx cells. The HV sde vltage, n steady-state peratn, wll be the sum f the capactrs vltage, v Ck, fr each three cells f SM 1 r SM 2. T rght peratn f the bdrectnal DC-DC cnverter, the DC vltage capactr balancng shuld be takng accunt, usng sme strateges t equalze the v Ck, whch als depends f mdular Marx cells quantty used, [5][6]. (a) (b) Fg. 1. Bdrectnal DC-DC cnverter usng Marx pwer swtches and seres-parallel nductr crcut: (a) the prpsed bdrectnal DC-DC pwer electrnc cnverter; (b) the mdular Marx pwer electrnc cell. 2 Cntrbutn t Cllectve Awareness Systems Ths paper prpses a bdrectnal DC-DC pwer cnverter usng mdular Marx swtches t acheve hgh vltage rats. The bdrectnal DC-DC pwer electrnc cnverters tgether wth the energy strage systems have sgnfcant mprtance t vercme the pwer avalablty ssues f renewable energy surces. Als ther applcatns fr bdrectnal DC-DC cnverters, as electrc tractn systems, have a

4 Bdrectnal DC Cnverter Usng Mdular Marx Swtches and Inductr 479 remarkable pstn n sustanable grwth. Due the applcatn f mdular cells n ths DC-DC cnverter and als the prpsed slutn t acheve hgh vltage rats, ths wrk als allws the develpment f new technlges, whch shuld be accunted n sustanablty-aware decsns fr cllectve awareness systems. 3 Seres-parallel Inductr Electrnc Crcut The desgn f the nductr L assumes cnsderable mprtance, snce t s respnsble fr the pwer transfer, n bth drectns, between the lw-vltage (LV) t hgh-vltage (HV) sdes. The szng f the nductr L determnes als the LV sde current rpple and the swtchng frequency f the DC-DC cnverter. In ths wrk, the nductr L can swtch frm a parallel t a seres arrangement thught the use f bdrectnal semcnductrs crcut that changes between cnnectns t btan hgh vltages rats frm LV t HV sdes. Fg.2(a) presents the seres-parallel nductr electrnc crcut (SPIEC) wth three nn-cupled nductrs, L 1, L 2, L 3, the semcnductrs fr parallel nductrs cnnectn, S P1, S P2, S P3, S P4 and the semcnductrs fr seres nductrs cnnectn, S S1, S S2. The termnals a and b represents the nput and utput f ths electrnc crcut. The Fg.2(b) presents ne cell f SPIEC, that can be used t extend ths cncept t k = 1,2,..., m + 1 and m hgher number f nn-cupled nductr cnnectns, where { } the ttal number f SPIEC cells. (a) (b) Fg. 2. The seres-parallel nductr electrnc crcut: (a) example f SPIEC wth three nductrs; (b) the SPIEC mdule cell. Cnsderng the SPIEC peratng n the bdrectnal DC-DC cnverter the vltage rat frm HV t LV sdes can be deduced takng accunt the duty cycle, δ, f swtchng perd, T, f mdular Marx swtches, SM 1, SM 2 and the number f SPIEC cells, m. The Fg. 3 presents an example f tw SPIEC mdular cells (three nn-cupled nductrs).

5 48 R. Luís et al. (a) (b) Fg. 3. The seres-parallel nductr electrnc crcut: (a) parallel mde peratn; (b) seres mde peratn. Startng frm parallel nductrs cnnectn, represented n Fg.3(a), the S S1 and S S2 semcnductrs are synchrnsed wth S 1 (whch s turned Off) and S P1, S P2, S P3 and S P4 are tuned wth S 2 (whch s On) durng tme δt. Beng v L1, v L2, v L3 the vltage acrss the nductrs L 1, L 2 and L 3 respectvely and v the vltage f LV surce, then vl 1 = vl2 = vl3 = v. Fr seres nductrs cnnectn, represented n Fg.3(b), the S S1 and S S2 semcnductrs are synchrnsed wth S 1 (whch s turned On) and S P1, S P2, S P3, S P4 1 δ T. If v represents the vltage f HV tuned wth S 2 (whch s Off) durng tme ( ) sde f DC-DC pwer cnverter, then vl 1 + vl2 + vl3 = v v. Cnsderng equal nductrs, where v L s the vltage acrss each nductr, the prevus equatn can be rewrtten as (1). v L v v = (1) 3 Cnsderng the SPIEC steady-state peratn wth nductrs current at cntnuus mde, the ntegral f the vltage acrss each nductr s zer ver a cycle f swtchng T, whch leads t (2). v v δ v + ( 1 δ ) = (2) 3 Frm (2) the vltage rat f DC-DC cnverter can be fund as (3). v 2δ + 1 = (3) v 1 δ Generalzng (3) fr dfferent number f nn-cupled nductrs, n, the vltage rat f DC-DC cnverter becmes (4). v v = ( n ) 1 δ δ Fg.4 presents the vltage rat f (4) fr tw, three and fur nn-cupled nductrs cnsderng duty cycles varyng frm.4 t.9 and deal crcut parameters. (4)

6 Bdrectnal DC Cnverter Usng Mdular Marx Swtches and Inductr 481 4, 35, 3, 25, n=2 n=3 n=4 2, 15, 1, 5,,,4,5,6,7,8,9 Fg. 4. Vltage rats wth dfferent number f nductrs and duty cycle values. Frm Fg.4 and cnsderng acceptable values fr duty cycle between.7 and.8 the vltage rat f the DC-DC cnverter can be change frm 6 t 17 tmes dependent f the nn-cupled nductrs number used n SPIEC. 5 Swtchng Cntrl Lps The swtchng cntrl lps necessary t the bdrectnal DC-DC cnverter peratn are depcted n Fg. 5. T cntrl the utput vltage frm HV sde, s used a prprtnal-ntegral cntrller (PI), that based n vltage errr, ( vref v ), prduces an nput current reference, ref, t LV sde n nner current cntrl lp. On ther hand, ths nner cntrl lp uses a current hysteress cntrller that generates the swtchng state, γ, asscated wth SM 1 and SM 2. Fg. 5. Swtchng cntrl lps f bdrectnal DC-DC cnverter. The PI cntrller has an nternal lmter, t avd vercurrents n the nner cntrl lp, wth an ant-wndup system t prevent the accumulatn f ntegral errr when that lmter s actve. The tunng f PI cntrller can be made usng the lnear cntrl thery r the well knw Zegler-Nchls methd, [7], cnsderng a lnearzed clsed 1 st + 1, where T d s the lp transfer functn f current cntrller ( ) ref d average current delay related t the swtchng frequency f bdrectnal DC-DC cnverter, [8].

7 482 R. Luís et al. Frm Fg.1, analysng the turn-n and turn-ff sgnals asscated wth varable γ, frm the pulsed vltage acrss SM 2, v sw, fllws, (5). v sw ( γ ) ( γ = ) v f SM1 s ON ; = 1 = f SM 2 s ON ; The state-space mdel that descrbes the dynamc f nput current,, cnsderng v = γ v s (6). that ( ) sw d L u usw u γ u dt (5) = = (6) T cntrl the SPIEC nput current,, ts current errr, e, shuld be zer. Hwever, snce the bdrectnal DC-DC cnverter s perated at fnte frequency, the current errr s mantaned wth a small rpple, (7). e = <ε (7) ref The hysteretc current cntrller, frm Fg.5, uses a hysteress band f wdth 2ε t mantan the nput current errr between: ε < < + ε. The cmmand strategy that decdes γ s gven by (8). d e > + ε ref > > vsw = γ = dt d e ε 1 ref vsw v γ < < dt < = = The hysteretc current cntrller uses als a gan, K, t adjust the varable swtchng frequency, f s, wthn the semcnductrs peratng lmts, [8], (9). ( ) e (8) u u u fs = (9) 2ε K Lu 6 Numercal Smulatn Results The numercal smulatn results f bdrectnal DC-DC cnverter where perfrmed wth Matlab /Smulnk and uses the SmPwerSystems tlbx t nclude the lsses f semcnductrs, nductrs and capactrs. The man crcut parameters are: v = 1.5kV ; v = 15 kv ; L = 1mH ; C = 1µ F ; 2ε = 1 A. T smulate dfferent lad cndtns, an utput current f surce n HV sde was cnsdered, where the values and smulatn tme, t, A n lad ;.2 = 15A dschargng LV sde, ntervals are: = ( ), t [ [ ; ( ) ref k

8 Bdrectnal DC Cnverter Usng Mdular Marx Swtches and Inductr 483 [.2;.8[ t ; 15A = ( chargng LV sde ), t [.8;.14]. Snce a vltage rat f 1 s needed, fr a δ.8 three nn-cupled nductrs are used (Fg.4). Fg. 6 presents the results f bdrectnal DC-DC cnverter wth three nncupled nductrs n SPIEC and Fg.7 presents a zm vew n lad transent at.8s. v [V] ref [A] [A] k [A] t [s] v ref, v [V] [A] v cf [V], SM 1 v cf [V], SM x t [s] Fg. 6. Smulatn results f bdrectnal DC-DC cnverter. Frm Fg.6, the DC-DC cnverter keeps a gan f 1 n vltage rat. Due the lad transents, the utput vltage and the balance f vltage capactrs n Marx cells are tracked wth varatns abut 3%. In Fg.7 t s shwn that the nductr currents have hgh rpple (21%), whle the LV sde current dsplays a rpple f 94% related wth ther reference values. [A] v ref, v [V] 1.55 x k [A] t [s] γ t [s] Fg. 7. The lad transent n bdrectnal DC-DC cnverter.

9 484 R. Luís et al. 7 Cnclusns Ths paper presents the applcatn f mdular Marx cells n a bdrectnal DC-DC pwer cnverter fr HV applcatns. The hgh vltage rat depends f nn-cupled nductrs number used n SPIEC and the duty cycle. The balance f the Marx capactr f the need stack cells remanng under 3%, whle the utput vltage has a rpple belw.1%. The develped smulatn mdel s valuable as a prf f cncept and t mtgate sme drawbacks as the hgh rpple current n LV sde. Acknwledgments Ths wrk was supprted by Prtuguese natnal funds thrugh FCT - Fundaçã para a Cênca e a Tecnlga, under prject PEst-OE/EEI/LA21/213. References 1. S. Kumar and H. P. Ikkurt, Desgn and cntrl f nvel pwer electrncs nterface fr battery-ultracapactr hybrd energy strage system, Int. Cnf. Sustan. Energy Intell. Syst., n. SEISCON, pp , R. M. Schupbach and J. C. Balda, Cmparng DC-DC cnverters fr pwer management n hybrd electrc vehcles, n Electrc Machnes and Drves IEEE Internatnal Cnference, H. R. Karshenas, H. Daneshpajh, A. Safaee, P. Jan, and A. Bakhsha, Bdrectnal DC- DC Cnverters fr Energy Strage Systems, n n Energy Strage n the Emergng Era f Smart Grds, R. Carbne, Ed. InTech, 211, p L. Rednd and J. Fernand Slva, Sld State Pulsed Pwer Electrncs, n n Pwer Electrncs Handbk, Thrd Edt., Elsever Inc., 211, pp L. Encarnaçã, J. F. Slva, S. F. Pnt, and L. M. Rednd, Grd Integratn f Offshre Wnd Farms Usng Mdular Marx Multlevel Cnverters, n Dctral Cnference n Cmputng, Electrcal and Industral Systems, DCEIS 12, 212, pp L. Encarnaçã, J. F. Slva, S. F. Pnt, and L. M. Rednd, A New Mdular Marx Derved Multlevel Cnverter, n 2nd Dctral Cnf. n Cmputng Electrcal and Industral Systems DCEIS Csta da Caparca, Prtugal (211), 211, pp K. Ogata, Mdern Cntrl Engneerng, 5th Ed. Prentce Hall, J. Fernand Slva, Sstemas de Cnversã Cmutada: Semcndutres e Cnversres Cmutads de Ptênca. Lsba: ACEnerga/DEEC/IST, 212. (n prtuguese)