Warpage Studies of Printed Circuit Boards with Shadow Moiré and Simulations

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1 Warpage Studies of Printed Circuit Boards with Shadow Moiré and Simulations Sim Jui Oon, Khai Shiang Tan, Teck Yong Tou, Seong Shan Yap Faculty of Engineering, Multimedia University, Cyberjaya, Malaysia Abstract The demand for lightweight and high functionality devices is always a driving force in development of smaller, lighter and compact electronics circuit. Printed circuit board (PCB) is the most important structure that provides interconnection and supports the components; hence its flatness is always the main concern in SMT manufacturing. In order to ensure product reliability, the monitoring of thermally induced warpage of PCB during high temperature reflow is essential. PCB deformation occurs when there is mismatch of coefficients of thermal expansion between the materials. Thermally induced warpage in PCB can be obtained from the Shadow Moiré measurement, which is a non-contact full-field optical method integrated with a high temperature oven. In this study, a singlesided, small PCB (105 mm 100 mm 1.5 mm) and a large, multi-layer PCB (300 mm 180 mm 1.6 mm) are measured and analyzed. To reduce the temperature difference between the top and bottom of the PCBs, a heating profile is designed with the use of multiple thermocouples at various positions on the PCB. In addition, finite element analysis is carried out to determine the z-axis deformation of the PCBs. The finite-element simulation is setup to mimic the heating profile in the experiment. The results of simulation are compared to the experimental measurement. Keywords Shadow Moiré; PCB; simulation; thermal deformation; warpage I. INTRODUCTION The product design and manufacturing processes related to printed circuit board (PCB) is a continuous challenge in the electronic industry in order to stay in sync with the trend of device miniaturization. Personal devices such as laptops and smartphones are demanded to be smaller, lighter, and at the same time have greater functionality. These can be achieved by utilizing a multilayer PCB with high component density. However, the different laminate materials such as FR4 substrates, copper (Cu) traces and solder resist coatings will generate thermal induced warpage during high temperature reflow due to mismatch in coefficients of thermal expansion (CTE) [1], and produce cracks, delamination, misconnection and electrical connection failure [2]. Beside CTE mismatch, the heating temperature profile is another factor that can also induce thermal warpage. An inappropriate heating profile can result in PCB deformation especially when there is a large temperature difference across the PCB. Furthermore, the glass transition temperature (T g), where the PCB changes from hard and glassy material to soft and rubbery material, is also one of the factors affecting the PCB warpage. Previous studies have Chun Sean Lau, Yoong Tatt Chin Western Digital, Batu Kawan, Seberang Perai Selatan, Penang, Malaysia shown that the time above liquidus and peak temperature in temperature profiles have significant effect on the T g [3]. For the study of thermal induced warpage in PCB, the Geometric Moiré, confocal/optical coordinate measurement and digital image correlation (DIC) are recommended by IPC [4] as methods used for measuring PCB flatness. While the Geometric Moiré and DIC are non-contact, full-field optical metrologies for measuring surface displacements, while the confocal/optical coordinate measurement metrology actually measures the surface point by point rather than fullfield. Each of them has pros and cons depending on the required application. Ron W. et al. performed a series of measurements with different metrologies to evaluate their capability [5]. Among the metrologies that they have tested, Shadow Moiré with bigger oven size, large field of view along with consistent z-axis resolution is able to measure various sample sizes from small BGA component to a large area PCB. The real time imaging ability also enables the study of warpage behaviors of the sample throughout the heating process. In addition to experimental measurement, finite element analysis (FEA) has also been performed in order to study the thermomechanical behavior of PCB. The results of FEA simulation based on ABAQUS has been compared to Shadow Moiré measurement [6]. A PCB with four layers was modeled in FEA (Top and bottom solder resist, substrate and Cu trace). The simulation result shows good agreement with experiment results. In another work, the effects of Cu content in a more complex PCB were studied in simulation and compared with experimental results [7]. Models of PCB with a simplified structure and complete Cu traces have been used in the FEA. It was found that only the results from the model with complete Cu trace are able to match the experimental results to within ~9%. On the other hand, Wang et al. [8] employed ANSYS for investigating the warpage generated in PCB with different Cu traces. Instead of using the actual Cu traces, the results showed that Cu layer that was simplified: i.e., divided into array of zones with density distribution is able to be used to produce results close to the warpage measured by Shadow Moiré. In this work, Shadow Moiré was used to measure the warpage of PCB subjected to thermal heating. Thermocouples were placed on top and bottom of sample to monitor the temperature of samples. Two PCB samples are used: a simple single-sided small PCB and a large-area, multi-layer PCB. Based on the thermal profile, FEA were carried out to simulate

2 warpages in the two PCBs and compared to experimental results. II. SHADOW MOIRÉ EXPERIMENT In this study, the AkroMetrix TherMoiré with 100 line-perinch reference grating (resolution of 2.5 µm) is used. A camera perpendicular to the grating and a white line light source around 45 degrees to the grating is directed onto the grating glass, creating shadows on the sample. The system has an infra-red radiant heater, directly heat at the bottom of PCB thus resulting in excessive heat at the bottom than the top of PCB, which arises the issue of variation in temperature, Delta T (ΔT). In order to reduce the temperature gradient between the top and bottom of the PCB, a heating profile with two cycles of heating up and cooling down was adopted together with the use of multiple thermocouples at various positions on the PCB. Each heating cycle consists of ramp, soak, spike, and cooling where the temperature increases from the room temperature to peak at 245 C, then cooling down to room temperature. Experiments were conducted to measure the warpage in single-sided small PCB and a multi-layer, large PCB of different Cu densities. A. Single-sided small PCB A simple, single-sided small PCB with dimensions of 105 mm 100 mm 1.5 mm is a bare and single sided PCB, consists of only one layer of Cu and one layer of FR4 prepreg. For Shadow Moiré measurement, sample preparation of spraying white paint was not required as Cu acts as a reflective surface. Due to the limited space of the PCB, only two thermocouples were attached at the top and bottom of the board respectively to monitor the changes in temperature. In heating chamber, the PCB was placed on two customized, thinner rails as support, without pallet or jig. The board undergoes heating and cooling continuously for two cycles in the chamber for approximately 30 minutes. Heating profile used was similar to the heating profile of the large, multi-layer PCB. B. Multilayer large PCB The 300 mm 180 mm 1.6 mm PCB is a 31-layer board made up of intermediate layers of Cu traces and FR4 dielectric, with buried vias and drilled holes. There are 15 FR4 layers and 16 Cu layers. Each Cu layer has different percentage of Cu because of the trace pattern and their functions in the PCB. In average, the Cu percentage is 49% per Cu layer. It is a double sided PCB consists of trace printing at both sides of the board. In Shadow Moiré measurement, the PCB was first sprayed with high temperature white spray during sample preparation to enhance light reflectivity and to ensure instrument accuracy. Then, few thermocouples were attached on PCB using Kapton tape for temperature monitoring during heating and cooling process. PCB was placed in pallet or jig with spring clamps, supported by two rails in the heating chamber. The board undergoes heating and cooling continuously for two cycles in the chamber, following the actual reflow heating profile, for approximately 30 minutes. III. FINITE ELEMENT ANALYSIS FEA (Midas NFX) is used to study the thermomechanical behavior of the PCBs. The structure of the PCBs are modelled accordingly and meshed into finite number of smaller elements. The size of mesh is refined to ensure convergence so that the results of analysis are not affected by the changing of mesh size. PCB is composed of Cu layers sandwiched between woven glass fabric-reinforced epoxy resin (FR4). FR4 is a viscoelastic material that is temperature dependent. It is an orthotropic material with material properties that changes around the glass transition temperature (T g). The properties of FR4 and Cu used in simulations are shown in Tables 1 and 2, respectively. TABLE I. THERMAL AND MECHANICAL PROPERTIES OF FR4 Properties Value ρ (kg/mm 3 ) Tg ( C) 138 (small PCB), 170 (large PCB) C (J/kg/ C) Direction X Y Z CTE (/ C) < Tg E (N/mm 2 ) k (W/mm/ C) XY YZ XZ Ρ (N/mm 2 ) TABLE II. THERMAL AND MECHANICAL PROPERTIES OF CU Properties Value ρ (kg/mm 3 ) C (J/kg/ C) CTE (/ C) < Tg E (N/mm 2 ) k (W/mm/ C) T (N/mm 2 ) 70 In this study, the single-sided small PCB can be easily constructed and modeled. The multilayer large PCB is constructed in stacks following the actual PCB structure (PCB 49% Cu). In order to simplify the model, the percentage of Cu is used instead of the actual Cu trace of each Cu layer. The heating profile of Shadow Moiré measurement is used for FEA of both PCBs. Thermal load applied to the geometries through nodal temperature, and transient heat transfer analysis is used to observe the effects of temperature change in PCB as function of time. Based on the same structure, two other models with different Cu content (PCB 100% Cu, PCB 24.5% Cu) are also simulated. IV. RESULTS AND DISCUSSIONS A. Single sided small PCB Fig. 1 shows the temperature profile of the top and bottom side of the single sided small PCB during Shadow Moiré measurement. The temperature readings were obtained through thermocouples that placed at the center of both surfaces of the PCB. The heating profile has been optimized so that the

3 difference of the temperature at the top and at the bottom is < 15%. Fig. 1. The temperature profile of top and bottom surface of the single sided small PCB. Fig. 2 (a)- show the warpage contours of the single sided small PCB during the heating process in Shadow Moiré experiment and the values are plotted in Fig. 3.The sample has an initial warpage of 344 µm. The warpage reduces in the negative direction and increased in the positive direction as the temperature increased. There is a transition of warpage from downward direction towards upward direction. As shown in Fig. 3 the warpage increased abruptly above 100 C, the highest warpage was observed at 155 C to 939 µm. (a) Experiment (e) Simulation The PCB warpage obtained from FEA simulation based on the same heating profile is shown in Fig. 2 (e)-(h). The direction of the warpage is the same as those from the Shadow Moiré measurement although the absolute values of the warpage differ. The difference in the results may be caused by firstly, the negative initial warpage of the PCB that is not accounted for in the simulation. It is noted that the values obtained in simulation below 100 C is close to the experimental values if the initial warpage is taken into account (Fig 3). The initial warpage is important in study as have been reported by others [9]. It was included in simulation by applying displacement to the flat geometry but removing the stress components in the elements (element reactivate technique). As a result, the residual warpage obtained from their simulation was only 5 µm difference compared to the residual warpage of experiment results. Secondly, the simple/single-sided small PCB has a low T g at about 138 C which causes a large increase in warpage near to this temperature; as seen from Shadow Moiré results. Above T g, the properties of the material such as strength, CTE will change and the material change from a rigid structure to rubbery behavior where the PCB can also deform above this temperature. The simulation was unable to reflect the changes accordingly. Thus, taking into account of the initial warpage of the PCB, the simulation results are accurate to <24 % below 100 C Midas Small PCB Midas Small PCB (with initial warpage) Shadow Moire C (f) 23 C Warpage (µm) C (g) 55 C Temperature ( C) Fig. 3. Warpage of single-sided small PCB obtained from experiment & simulation. 95 C Fig. 2. Warpage contours of single sided small PCB from experiment (Shadow Moiré) and simulation (FEA). (h) 95 C 155 C 155 C B. Multilayer Large PCB The multilayer large PCB board has higher warpage as compared to the simple small PCB. Fig. 4 (a)- depict the 3D contour plots of multilayer large PCB during heating process in Shadow Moiré experiment and values are plotted in Fig. 6. The sample has an initial warpage of 463 µm. The bottom left corner and upper right corner of the board showed slight warpage as the heating began. As temperature increased, the sample starts to warp in negative direction, resulting in a final warpage of 2571 µm at 160 C. Below T g (~170 C), the experiment results exhibit linear response where the warpage increases with the temperature.

4 (a) Experiment 30 C 100 C 60 C 160 C Fig. 5. Warpage contours of large PCB from simulation (FEA). 100 C 160 C Fig. 5 (a)- present the warpage contour plots of the large PCB (PCB 49% Cu) in simulation. Throughout the simulation, the sample warps in concave direction, towards negative direction. Fig. 6 shows the warpage results of the 31 layers large PCB during the heating process from Shadow Moiré experiment and FEA simulation. In Midas simulation, the 31 layers large PCB is constructed based on the Cu content of each layer. The Cu content of each layer is extracted from the Cu trace in each layer. Based on the simulation, the warpage is 2242 µm at 160 C. It is observed that the simulation results of PCB (PCB 49% Cu) are in parallel to the experimental values. If initial warpage is taken into account, the difference between the experiment and simulation results is <15 %. Fig. 4. Warpage contours of large PCB from experiment (Shadow Moiré), where the z-axis translation is common. (a) Simulation (PCB 49% Cu) Warpage (µm) Shadow Moire PCB 49% Cu PCB 100% Cu PCB 24.5% Cu PCB 49% Cu (with initial warpage) C Temperature ( C) 60 C Fig. 6. The large PCB warpage results extracted from Shadow Moiré and different Cu percentage of large PCB warpage results from FEA simulation. Based on the same simulation model, when the percentage of Cu content of each Cu layer is increased to 100% (PCB 100% Cu), the warpage is 2809 µm at 160 C, which is about 25% higher than the PCB sample with 49% Cu content. On the other hand, when the percentage of Cu of each Cu layer is

5 decreased by half (PCB 24.5% Cu) the warpage is 1851 µm at 160 C. The value is about 21% lower than the PCB with 49% Cu content. The results suggest that the warpage of a complex PCB structure is affected by the amount of Cu content in each Cu layer, especially as the temperature increased. V. CONCLUSION In this work, Shadow Moiré measurement and FEA were used to study the warpage of a single-sided small PCB and a multilayer large PCB. Simulation results from both PCBs are lower than experimental results, mostly due to exclusion of initial warpage. The difference is reduced to <24% for the single sided small PCB and <15% for the multilayer large PBC respectively at temperatures below T g of the sample. At above T g, the PCB behavior were unable to be reflected in the simulation. For the multilayer large PCB, the results show that the simplified model utilizing the Cu content of each Cu layer can be used for estimation of the warpage of the sample. Based on the same approach, we estimated that the warpage of the PCB to be increased by 25% when the Cu content of each Cu layer in the sample is increased to 100%. Conversely, the warpage is decreased by 21%, when the Cu content of each Cu layer is reduced by half. ACKNOWLEDGMENT The authors, S.J. Oon, K.S. Tan, T.Y. Tou and S.S. Yap acknowledge the financial support (grant no. MMUE/160068) from SanDisk/Western Digital, and also technical assistance from Akrometrix in this work. REFERENCES [1] C. Kim, T. Lee, M. S. Kim, and T. Kim, Warpage Analysis of Electroplated Cu Films on Fiber-Reinforced Polymer Packaging Substrates, Polymers (Basel)., pp , [2] P. Tegehall and G. Wetter, Microelectronics Reliability Impact of laminate cracks under solder pads on the fatigue lives of ball grid array solder joints, Microelectron. Reliab., vol. 55, no. 11, pp , [3] P. Lall, V. Narayan, J. Suhling, J. Blanche, and M. Strickland, Effect of Reflow Process on Glass Transition Temperature of Printed Circuit Board Laminates, Therm. Thermomechanical Phenimena Electron. Syst., vol. 13th IEEE, no. 1, pp , [4] IPC, IPC-9641 High Temperature Printed Board Flatness Guideline, [5] R. W. Kulterman, W. K. Loh, and H. Fu, Comparison of Advanced Package Warpage Measurement Metrologies, Electron. Manuf. Tech. 18th Electron. Mater. Packag. Conf., vol. 2, pp. 1 8, [6] S. Joo, B. Park, D. Kim, and D. Kwak, Investigation of multilayer printed circuit board ( PCB ) film warpage using viscoelastic properties measured by a vibration test, J. Micromechanics Microengineering, vol , p [7] M. Ying, Y. C. Chia, A. Mohtar, T. F. Yin, and S. P. Chuah, Thermal Induced Warpage Characterization for Printed Circuit Boards with Shadow Moiré System, Electron. Packag. Technol. Conf., vol. EPTC 06, pp , [8] M. Wang and B. Wells, Substrate Trace Modeling for Package Warpage Simulation, Proc. - Electron. Components Technol. Conf., vol Augus, pp , [9] D. Kim, S. Joo, D. Kwak, and H. Kim, Warpage Simulation of a Multilayer Printed Circuit Board and Microelectronic Package Using the Anisotropic Viscoelastic Shell Modeling Technique That Considers the Initial Warpage, IEEE Trans. Components Packag. Manuf. Technol., vol. 06, no. 11, pp , 2016.

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