Digital Circuit Engineering
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- Camilla Copeland
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1 Digitl Circuit Engineering DIGITAL st Distriutive XA + XB = X(A + B) 2nd Distriutive (X + A)(X + B) = X + AB (X + A)(X + B)(X + C) = X + ABC VLSI DESIGN Simplifiction Asorption YX + X = X Y + XY = X + Y XY + XY = X The Most Common Stupid Errors X.Y = XY X + = X Dulity If F(,,... z,+,.,,) G(,,... z,+,.,,) Then F(,,... z,.,+,,) G(,,... z,.,+,,) Crleton University 26 Dig Cir I p. Revised; Jnury 7, 26 Slide i Properties of Digitl Signls Compre Anlog nd Digitl Boolen Alger Gtes Bsic Lws Proofs Dulity Simplifiction, Asorption, Consensus, Swp Rules Uses of Dulity XNORs XORs 3-Input gtes Deriving Circuits from Truth Tles Full Adders Common Mistkes Crleton University Digitl Circuits I p., diglogicb.fm Revised; Jnury 7, 26 Comment on Slide i
2 Generl Digitl Relevnce Digitl Circuits vs. Anlog Circuits Anlog Digitl nlog sensor it Dig Cir I p. 2 Revised; Jnury 7, 26 Slide 2 Generl Digitl Relevnce Digitl Properties of single digitl element.. It hs two vlues clled, on-off, or high-low, or true-flse, or The vlue of such n element is often clled it. Properties of comintions of digitl elements. The its cn e comined to form symols. These symols men whtever people wnt them to men. Exmples of the menings people give symols. Binry numers ASCII chrcters 3-it two s- complement numers mens mens 6, mens A mens -4 mens mens 7, mens B mens -3 mens 2 mens 8, mens C mens -2 mens 3 mens 9, mens D mens - mens 4 mens, mens E mens mens 5..., mens F mens... mens 2 mens 3 2. Digitl vlues chnge in steps. Anlog vlues chnge continuously. On n nlog thermometer the column goes through ll vlues etween temperture chnges. The digitl thermometer chnges in steps. The one shown cnnot show chnges of less thn one degree. 3. By using more its one cn mke the digitl numers express ny ccurcy one one cn get out of the sensor which will e nlog. However it is fr too esy to mke digitl thermometor which displys more digits thn cn ccurtely extrcted from the nlog sensor.. People use vlue element ll the time. The vlues re the digits,,2,3,4,5,6,7,8,9. Crleton University Digitl Circuits I p. 3, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 2
3 nd re Voltges (usully) Digitl Signls Digitl its ( nd ) re represented y high nd low voltge SMOKE Smll FREE Jolt Smll NO NAME Jolt BATTYBOY Smll Jolt 5 V Smll Slt Free Jolt JOLT Smll FREE Jolt 3.3 V JOLT Smll FREE Jolt. V =5 V = V For mny yers logic ws 5 V. A logic ws V. Trnsistor Logic Circuits =3.3 V = V = V = V Newer circuits use 3.3,.8,.5 or lower voltge s. Two single-throw switches +V DD connected y stiff wire replce doule-throw switch. A +V DD Switches re silicon trnsistors typiclly.5 microns long (.5 mm) Control (input) is logic signl (voltge) A JOLT Smll FREE Jolt JOLT Smll FREE Jolt F + A F Output is logic signl (voltge), F Dig Cir I p. 4 Revised; Jnury 7, 26 Slide 3 nd re Voltges (usully) Digitl Signls Digitl Signls Voltges Represent Signls From most digitl signls represented low, flse or vlue s. V, high, true or signl s 5. V. After 99 lower voltges like 3.3, 2.5,.8 nd.5 V hve ecome incresingly common. Lower voltge circuits hve longer ttery life nd run cooler. Switches A doule throw switch hs two positions. Some switches hve oth off s the middle position ut the trnsistors used s switches do not hve tht position. Trnsistor Digitl Circuits PMOS In silicon chips, the switches re replced y trnsistors. There re two types consider in this course: A PMOS trnsistors which ct like closed switches when input A is nd open switches when A is NMOS trnsistors which ct like closed switches when input A is nd open switches when A is NMOS The two trnsistors work like two switches with their hndles linked together. When one is on the other is off. A When the two types of trnsistors re connected to the sme digitl signl, one trnsistor will ct like closed switch nd the other will ct s n open switch.. PROMBLEM Complete the tle on the right to show how F reltes to A. Microns micron = -6 meters A PMOS NMOS closed F Crleton University Digitl Circuits I p. 5, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 3
4 Properties of Digitl Signls Digitl Signls re Very Tolerent nd Not Very Sensitive to Noise, Temperture, nd Supply Voltge. SMOKE Smll FREE Jolt Smll NO NAME Jolt BATTYBOY Smll Jolt Leky Cell 5 V 3.5 V is 3.5V to 5.5 V SMOKE Smll FREE Jolt Smll NO NAME Jolt BATTYBOY Smll Jolt 5 V Not Quite Shut Burnt Cron Current Pth is V to.5 V Digitl cn give the right nswer ( or ) with 3% voltge error. Anlog would hve 3% error. Volts Undefined Vlid Vlid or uncler Don t sty in here long. Vlid Shows how noisy working digitl signl might e. Dig Cir I p. 6 Revised; Jnury 7, 26 Slide 4 Properties of Digitl Signls Digitl Signls Properties of Digitl Signls Digitl Less Sensitive to The Electronic Environment For common (CMOS) digitl circuits, the signl my devite y up to 3% of the supply voltge from the idel (supply voltge), nd ( V) without cusing it to e red erroneously. With nlog signls, 3% error in the signl is 3% error! In the undefined region, nother circuit might red the signl s either or. A typicl digitl signl For circuits in the l, which run from 5 V supply, will e stedy signl within few percent of 5. V, nd will e lmost exctly. V. There n AND gte with two 3.6V inputs would see two logicl inputs nd would give out 5 V output. However for lrge circuits such s microprocessors, logic signls my e quite noisy. They still work ecuse of the 3% tolernce on the wveforms. 2. PROBLEM Supply voltge 5.V 3.3V.5V Complete the tle on the right. Assume CMOS circuits Logicl Over 3. PROBLEM 3.5 V V Vin Vin.5. t Vout Red hed nd find wht the inverter gte Then plot Vout on the grph with Vin. Connections to supply nd ground not shown does. Undefined, could e tken s, s or neither. Logicl 3.5 to.5v Crleton University Digitl Circuits I p. 7, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 4
5 Anlog vs Digitl Accurcy ??.% is very good ccurcy For digitl, dd more circuitry to get more for nlog ccurcy. Suject to ccurcy of nlog sensor input. Long Term Storge Anlog circuits store dt s voltge on cpcitor. Mx storge time is perhps 3 minutes V V -t e RC Digitl circuits store dt in memory Mx storge time is yers. RAM FLASH Memory t Dig Cir I p. 8 Revised; Jnury 7, 26 Slide 5 Anlog vs Digitl Digitl Signls Accurcy Anlog circuits re mde of prts with reltively low tolernce. 5% is common. It is very hrd to mke components ccurte to more thn.%. Anlog voltges cn e no more ccurte thn the components they re uilt from. The ccurcy of numers in digitl circuits depend on the numer of its. One cn increse this indefinitely y dding more its. In the digitl thermometer shown, the ultimte ccurcy is the resolving power of the temperture sensor. Long-Term Storge The esiest wy to rememer voltge is to store it on cpcitor. Cpcitors lek chrge which mkes the voltge slowly decrese. It is very hrd to store voltge for more thn few minutes. This is not to sy it cnnot e done. There re devices clled electrets tht re permnently chrged cpcitors. They re mde y melting the cpcitor dielectric nd letting it solidify while chrged. Also electrons cn e injected into silicon structures for long-term storge. However these re fr less convenient thn conventionl leky cpcitor storge. Digitl memory is very convenient. RAM (rndom ccess memory) will rememer s long s the power is on. Flsh memory which is n electriclly ersle memory which cn rememer with the power off. Crleton University Digitl Circuits I p. 9, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 5
6 Anlog vs Digitl Other Properties, Digitl vs Anlog Speed Fstest circuits re nlog. The highest frequency circuits in your cell-phone nd TV re nlog. Design Cost/Time Anlog designers hve to worry out: noise, power-supply vrition, cross-tlk etween-wires, inccurte vlues, temperture vrition of component vlues, ground ounce, clock feed-through,... To digitl designers, these re 2nd order effects. Digitl chips work on first silicon over 9% of the time. For nlog chips this is more like 6% Anlog designers need severl yers experience. Digitl designers re productive soon fter grdution. There re mny more people doing digitl design thn nlog. Anlog circuits re rpidly eing redesigned in digitl. Anlog Digitl Softwre Digitl (Underneth) Is Anlog Anlog prolems ecome especilly importnt in digitl for: - very fst circuits. - very low supply voltges (. V) - very lrge circuits (5 million gtes per chip). Dig Cir I p. Revised; Jnury 7, 26 Slide 6 Anlog vs Digitl Digitl Signls Other Properties, Digitl vs Anlog Speed The fstest circuits re nlog. However every yer more nd more of these circuits re eing redesigned in digitl s the speed t which digitl circuits cn run increses. Design Cost/Time Crosstlk is signl on one wire getting mixed with the signl on nother wire y trvelling through the smll cpcitnce etween the wires. Ground ounce is when the low voltge return of the power supply ounces ove zero volts. It is usully due to inductnce in the power supply leds. Digitl circuits suffer from these prolems, ut they cuse no troule if the interference is less thn 3% of the level. It is only when is mistken for tht digitl circuits hve prolems. Becuse one cn often ignore such prolems digitl design is usully esier to do thn nlog. The designs cn e done fster. They re more likely to e error free. Digitl (Underneth) Is Anlog At very high speeds very smll stry cpcitnce nd inductnce, which were negligle t lower speeds, ecome importnt. Then nlog prolems hve to e considered, nd high-speed digitl design ecomes hrd. When circuits hve mny million gtes per chip lot of nondigitl prolems ecome importnt. These chips re completely designed in softwre, ecuse people could never keep trck of ll the detil. Wht mkes good digitl designer on lrge circuits is knowing where the softwre my give nontrustworthy results. Crleton University Digitl Circuits I p., diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 6
7 Boolen Alger The lger of nd Two Vlued Alger Vlues re clled nd or True nd Flse or High nd Low Vriles. A vrile X cn hve only two vlues, or. Opertions Complement, Not, or Inverse X is the opposite of X AND X is if AND re oth. OR X is if OR or oth re. X-OR, XOR, Exclusive OR X is if exctly one of or is. Symol X + X X = 2 X = - X = 3+j6 X = X = Schemtic X X X X Creted y George Boole 847 Clude Shnnon 939 Truth Tle X X X X X Compct Truth Tle Dig Cir I p. 2 Revised; Jnury 7, 26 Slide 7 Boolen Alger Digitl Signls Vriles A Boolen vrile cn hve the vlue or. Lter we will give them don t cre vlue of - or d. Where d mens the vrile could hve either or nd it will not chnge the result of interest. Gtes The opertors shown cn e uilt with simple trnsistor circuits clled gtes. The circuit for NOT gte is shown under See Digitl Signls on pge 4. These gtes re connected together to construct digitl circuits. Other Nottions NOT x, x,!x, ~x (Mtl, Verilog) AND,,, & (Mtl, Verilog) OR +,, d, (Mtl, Verilog) X-OR, +, ^ (Verilog) Compct Truth Tles NOT AND OR XOR The conventionl tle shown in ) cn e replced with the mp ). In the mp, the inputs re round the outside, nd the vlue of the output is put in the interior squres. This mp form of tle cn e mde for other gtes. + + Other symols + & = ) Conventionl tle Output is if the sum of the inputs Output is if the sum of the inputs = ) Mp Crleton University Digitl Circuits I p. 3, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 7
8 Boolen Alger; Gtes Opertions (continued) NAND NOT-AND NOR NOT-OR X-NOR Exclusive-NOR, NOT-XOR. (Equivlence) Multiple Input Opertions AND - mens either or, (oth give the sme X) OR X-OR Exclusive-OR, XOR. Symol + c c + + c c Schemtic Truth Tle X X X X X X c X - - X c c X X c Numer - - of inputs X X c 2 3 see elow Compct c c Dig Cir I p. 4 Revised; Jnury 7, 26 Slide 8 Boolen Alger; Gtes Boolen Opertions Boolen Opertions Common Mistke is not the sme s 4. PROBLEM Is + the sme s +? If not, give counter exmple. X-NOR (Equivlence) This gte gives output if the two inputs re equl. Thus it is sometimes clled n equivlence or coincidence gte. Power Supply Connections While theoreticl digrms omit them, ll gtes must hve connection to power supply nd return led to ground. When they re importnt, they re often shown s on the right. The slnted r mens connect to the power supply. The other connection is ground. Multiple Input Opertions. N-input Gtes In theory gte cn hve ny numer of inputs. For trnsistor circuits, the gtes ecome very slow with more thn four inputs. However theoreticl circuits will often hve more thn four inputs. The figure shows how lines my e dded to the gte symol to give the inputs it more spcing on digrm The compct tle for the 3-input AND c X X 5. PROBLEM Is + the sme s +? If not, give counter exmple. Crleton University Digitl Circuits I p. 5, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 8
9 Boolen Alger; Gtes All Possile 2-Input Gtes + Symol Reltion > < Symol V DD Reltion = Gtes esily mde from trnsistors re NAND, NOR nd NOT. Dig Cir I p. 6 Revised; Jnury 7, 26 Slide 9 Boolen Alger; Gtes Possile Gtes Possile Gtes Common gtes AND, OR, NAND, NOR, XOR nd XNOR six of the 6 possile gtes. Z( the output) =,,,,, or re nother six. The finl four re,, +, nd + A uffer gte Logiclly the uffer gte is like piece of wire. Wht goes in comes out. However the uffer hs gin. If wek, sy 4 V on system with 5 V supply, is sent into the uffer it will give oost the to 5 V. 6. PROBLEM How mny different types of 3-input gtes re there? 7. PROBLEM The truth tles for four 3-input gtes re shown. c W X Y Z Sketch the symol for ech of the gtes y extrpolting the 2-input symols. The solution for W is shown. W Crleton University Digitl Circuits I p. 7, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 9
10 Boolen Alger; Lws Bsic Lws Bsic Lws with Zeros nd Ones 2 nd Form (Dul) X + = X (B) or just (B) X = X (B2) X + = (B3 X = (B4 Indempotent A vrile is unchnged y operting with itself. X + X = X (I) X X = X (I2) or (I) for either Doule Negtive ( X ) = X (N 2 ) No 2nd form Negtion Lws X + X = (N) X X = (N2) or (N) for either Commuttive Lws X + Y = Y + X (C) X Y = Y X (C2) or (C) for either Associtive Lws X + (Y + Z) = (X + Y) + Z (A) X (Y Z) = (X Y) Z (A2) or (A) for either Distriutive Lws Use B for ny of these four (X + Y) Z = XZ + YZ (D) X Y + Z = (X + Z)(Y + Z) (D2) or (Dstrnge) Rememer This Dig Cir I p. 8 Revised; Jnury 7, 26 Slide Boolen Alger; Lws Possile Gtes Bsic Lws These lws re firly ovious from the description of the gtes (opertors). The only strnge on is the second distriutive lw (D2). This one hs to e memorized ecuse it is very useful s well s strnge. We will tret ll these lws s xioms except (D2). This will e proven given (D). For Mthemticins All of the ove lws cn e proven y using only few sic xioms. For exmple one set of sic xioms suggested y Wkerly, is: X is either or. If X =, X = ; If X =, X =. =, = =, = + =, + = = +, + = We will use these xioms to prove X + X = X (I) X must e either or. If X=, then X+X = + = ; thus X+X = X for X=. If X=, then X+X = + =, gin X+X = X for X=. - qed 2 - Keep Your Proofs Resonly Rigorous For the proofs on the next pges we write one side, sy the left-hnd side (LHS) t the top. Then we work on it until we grdully chnge it to the other, the RHS. Do not pretend they re equl nd operte on oth sides t once.. Wkerly, John F., Digitl Design Principles nd Prctices, 3rd. Ed., Prentice Hll, Englewood Cliffs NJ., quod ert demonstrndum Crleton University Digitl Circuits I p. 9, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide
11 Boolen Alger Using Boolen Alger Prove: AB + B = B Simplifiction lw (S) Proof: LHS= AB +B = AB + B = ( A + )B = ()B = B = RHS Prove: AB + C = (A + C)(B + C) Second distriutive lw (D2) Proof: Simplify: AB + AB + AB from (B2) X = X from (D) (X + Y)Z = XZ + YZ from (B3 X + = from (B2) X = X RHS = A +C)(B + C) = Q(B + C) let Q = (A + C) = QB + QC = (A + C)B + (A + C)C = AB + CB + AC + CC = AB + CB + AC + C = AB + CB + C + AC + C from (D)(X + Y)Z = XZ + YZ since Q = (A + C) from (D) from ( I )X X = X from ( I )X + X = X = AB + C + C use (S) twice XY + X = X = AB + C = LHS from ( I ) AB +AB + AB = AB + AB + AB +AB from ( I ) X + X = X = A( B + B)+(A + A)B from (D) (X + Y)Z = XZ + YZ = A() + ()B from (N) X + X = = A + B from (B2) X = X Dig Cir I p. 2 Revised; Jnury 7, 26 Slide Boolen Alger Exmples nd Prolems Exmples nd Prolems 8. Simplifiction Rule x + xy = x is one of the most useful rules, nd firly esy to rememer. EXAMPLE Simplify: F= A B C + ABC + ABC + A BC + ABC Reduce to five letters (literls). A B C + ABC + ABC + A BC + ABC= ABC + ABC + A B C + A BC + ABC (A) (Rerrnge terms) = AB(C + C) + A B(C + C) + ABC (D) (x +y=(x + y)) = AB + A B + ABC (N), (B2) x= = AB + A(B + BC) (D) = AB + A(B + BC + BC) (S) ( +c=) = AB + A(B +C(B + B) (D), (B4) = AB + A(B + C) (N) ( + = ) Drw gte level circuit which implements the result. (Done on the right) 9. PROBLEM Simplify AB + BCD + BC + AC Reduce to four letters (literls). Drw gte level circuit.. PROBLEM Simplify (A + BC)(B + C)(B + C). PROBLEM Prove (A + C)(B + C)(B + A) = AB + BC + CA A B C F = AB + A(B + C) F. Reducing to 5 letters is esy. Reducing to 4 letters is esy if you look hed in theses notes nd use Krnugh mp. Crleton University Digitl Circuits I p. 2, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide
12 Boolen Alger Boolen Alger: Exhustive Proofs Good for smll numer of inputs (up to 4 or 5) Mke tle ) List ll possile inputs ) Clculte ll vlues of the left hnd side c) Clculte ll vlues of the right hnd side d) See if they gree This only works ecuse A, B, nd C hve only 2 vlues. Its no good if they represent integers or rel numers. Alternte Proof Second distriutive lw: (A + C)(B + C) = AB + C Proof: Use truth tle nd prove for ll cses LHS RHS ABC (A + C) (B + C)(A+C)(B+C) AB AB + C The two sides re equl for ll comintions of ABC. Dig Cir I p. 22 Revised; Jnury 7, 26 Slide 2 Boolen Alger Exmples nd Prolems Trying All Comintions The method is good for proofs, with not very mny vriles. It is not good for simplifiction. Exhustive Prolems 2. PROBLEM WITH XORS Prove tht A B = A B = Α Β 3. PROBLEM Prove tht C + BC = C + B Prove it () lgericlly nd () with truth tle. 4. PROVE A + c + ca = A + ca Consensus theorem This is hrd to prove lgericlly.. Hint c = ca + ca. Crleton University Digitl Circuits I p. 23, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 2
13 Boolen Alger Exhustive Proof Using Compct Tles (A + C)(B + C) = AB + C Proof: Using the compct tles LHS ABC (A + C) (B + C)(A+C)(B+C) AB C RHS AB + C The two sides re equl for ll comintions of ABC. (A + C) (B + C) (A+C)(B+C) BC A BC A AB BC A C AB + C BC A BC A BC A With 3 inputs, tle hs 8 entries With 4 inputs, tle hs 6 entries With 5 inputs, tle hs 32 entries With 6 inputs, tle hs 64 entries With 7 inputs, lgeric proof looks lot esier. Dig Cir I p. 24 Revised; Jnury 7, 26 Slide 3 Boolen Alger Exmples nd Prolems Circuit Prolems 5. PROBLEM: FOR CIRCUIT SHOWN Simplify:- A A AA=A F= 6. PROBLEM Simplify to 4 literls (letters)- AD +AE + AF B 7. PROBLEM Implement:- ABCD + ABCE + ABCF with one multi-input OR nd one multi-input AND. 8. PROBLEM Simplify - (A + B)(A + C)(A + D) 9. vproblem Implement:- (A+B+C+D)(A+B+C+E)(A+B+C+F) with one multi-input OR nd one multi-input AND. Hint; try Prolem 2. first. Crleton University Digitl Circuits I p. 25, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 3
14 Dulity Dulity Principle Tke ny vlid Boolen identity Sustitute + nd The result is nother vlid Boolen identity. Prcticl detil Put rckets round ll AND terms efore doing the sustitution. Exmple x(y + z) = xy + xz Vlid identity; (D) x(y + z) = (xy) + (xz) Put rckets round the ANDed terms x+(yz) = (x + y)(x + z) Sustitute + Result is (D2), 2nd distriutive lw, nother vlid identity. Exmple x + = Vlid identity; (B3) x = Sustitute + nd Result is (B4), vlid identity. WARNING Never Never Never! sy n expression is equl to its dul. Dig Cir I p. 26 Revised; Jnury 7, 26 Slide 4 Dulity Dulity Principle Dulity Principle This is principle not n equlity It is WRONG WRONG WRONG to sy n expression equls its dul. Exmple: c is the dul of ++c But clerly c ++c Do not do this: F = (c + e) + def = (((c) + e) + (def) put rckets round ANDs This is still equl to F = (+((+c)e)(d + e + f) tke dul You cnnot just write in nother equl sign F dul = (+((+c)e)(d + e + f) tke dul It is correct to cll this F dul 2. PROBLEM Two expressions for XNOR re: Find the dul identity. + = (+)(+) Crleton University Digitl Circuits I p. 27, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 4
15 Dulity Hlf the Bsic Lws re Duls of the Other Hlf Lws with Zeros nd Ones Dul Form (B) X + = X + nd X = X (B2) (B3) X + = + nd X = (B4) Indempotent (I) X + X = X + X X = X ( I ) or just (B) for ny of these four Doule Negtive ( X ) = X Self dul Negtion Lws (N) X + X = + X X = (N2) Commuttive Lws X + Y = Y + X + X Y = X Y (C) Associtive Lws X + (Y + Z) = (X + Y) + Z + X (Y Z) = (X Y) Z (A) Distriutive Lws (D) (X + Y) Z = XZ + YZ + X Y + Z = (X + Z)(Y + Z) (D2) Dig Cir I p. 28 Revised; Jnury 7, 26 Slide 5 Dulity Duls Duls Self Duls A few formuls re their own duls. Exmples ( X ) = x The three input mjority (crry) circuit oeys: + c +c = ( + )( + c)(c + ) Tking the dul merely interchnges the right nd left sides. 2. PROBLEM Prove + c + c = ( + )( + c)(c + ) 22. PROBLEM Show tht the xa + xb = (x + A)(x + B), lter clled the swp rule, is self dul, if one sustitues x for x in the dul rule. Generl property of self-dul functions Self dul functions hve f(,,c) = f(,,c) There re 2 n- self-dul function with n inputs, mong them the crry nd dd circuits.. CMOS gtes of self-dul functions cn hve symmetric NMOS nd PMOS prts. Crleton University Digitl Circuits I p. 29, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 5
16 Dulity Other Rules nd Their Duls Simplifiction Rules (S, S2) X + (X Y) = X + X (X+Y) = X Proof: Proof: LHS = X + X Y LHS = X (X+Y) = X + X Y (B2) X = X = (X+) (X+Y) (B) X + = X = X( + Y) (D) (X + Y)Z = XZ + YZ = (X+ Y) (D2) (X + Z)(X + Y) = X + ZY = X = RHS (B2,B3) X=X, X + =, = X = RHS (B,B4) X + = X, Y = If You Prove Hlf of Boolen Alger Dulity Will Give You The Other Hlf: (S) nd (S2) re duls; Ech line in their respective proofs re duls. If one proof references rule (like D), the dul proof will reference the dul rule (D2). Memorize X + X nything = X Dig Cir I p. 3 Revised; Jnury 7, 26 Slide 6 Dulity Simplifiction Rule Simplifiction Rule Simplifiction x + xy = x (S) + x(x + y) =x (S2) People who complin they cn t finish their exm usully don t know the time they cn sve using this rule. Look for terms like: + x c + cxy + cdefgh xy + c(t+m)(+x)xy Exmples: cd + cde = cd e + c + e + c = e + c 23. PROBLEM Simplify: x + xy + x(z+uv) + xy 24. PROBLEM: Simplify xy + xzy 25. PROBLEM: Simplify x + xzy + x + xyz + xyz + yz (S) Simplifiction (S) Simplifiction, pplied twice Designed to misled Crleton University Digitl Circuits I p. 3, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 6
17 Uses of Dulity Other Rules nd Their Duls Simplifiction Rules (S, S2) (For comprison) X + (X Y) = X + X (X+Y) = X Asorption Rules (A, A2) X + (X Y) = X + Y + X (X+Y) = (X Y) Proof: Proof: LHS = X + (X Y) LHS = X (X+Y) = (X +X) (X + Y) (D2) (X + Y)(U + Y) = XU + Y = XX + XY) (D) (X + Y)Z = XZ + YZ = (X + Y) (N) X + X = = + XY (N2) XX = = X + Y = RHS (B2) X = X = X Y = RHS (B) + Y = Y Note: (A) nd (A2) re duls. Ech line in their respective proofs re duls. When the proof for (A) uses (D), the proof for (A2) will use dul rule (D2). Dig Cir I p. 32 Revised; Jnury 7, 26 Slide 7 Uses of Dulity Simplifiction nd Asorption Simplifiction nd Asorption These two simple useful rules cn sve you lot of work when doing prolems. Look for them! Simplifiction x + xy = x (S) A second rule, which is lso lmost s esy to use, is the sorption rule. Asorption x + (xy) = x + y (A) Exmples: cd + cde = cd( + e) = cd +cde (A) + (y) = + y e + cde = (e + cde) = (e + cd) (A) Asorption e + c + e + c = + c + e + c = +e +c (A) Asorption nd (S) Simplifiction 26. PROBLEM: Simplify 27. PROBLEM: Simplify xy + xzy xy + xzy + zy. Apply (A) to the second nd third terms, get x+zy. Applying (A) to the first nd second terms doesn t do s much. Crleton University Digitl Circuits I p. 33, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 7
18 Properties of XOR nd XNOR Other Dul Rules Consensus Theorems (Con, Con2) A + c + ca A + c + ca = A + ca + (A + )( + c)(c + A) = (A + )(c + A) LHS = A + c + ca (A + )( + c)(c + A) = A + c + ca (B) x = x = = A + c(a + A) + ca (N) x +x = = A + ca + ca + ca (D) = A +Ac + ca + ca (C) xz=zx = A + ca = RHS (S) x+xy=x A +ca Swp (Swp) Rule (A + )(c + A) (x + A )(x + B) = xa + xb + xa + xb = (x + A)(x +B) LHS = (x + A )(x + B) = xx +xb + Ax + AB (D) = xb + AB + Ax (N) x x = = xb + Ax = RHS (Consensus) Dig Cir I p. 34 Revised; Jnury 7, 26 Slide 8 Properties of XOR nd XNOR Swp nd Consensus Swp nd Consensus The consensus rule is often hrd to see. Fortuntely, Krnugh mps, which we do lter, will llow one to forget concensus for simple (up to 4 vrile) prolems. 28. PROBLEM Simplify ABCE + CED + ABD 29. PROBLEM ) Simplify (C+E)X + (A+B)(C+E) + (A+B)X ) Simplify (C+E)X + (A+B)(C+E) + (A+B)X 3. PROBLEM Complete the proof of (Con2). 3. PROBLEM Why is the dul of the swp rule not nother rule? Crleton University Digitl Circuits I p. 35, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 8
19 Deriving Formuls From Truth Tles; XOR,XNOR Uses of Dulity. Lern hlf the rules, rememer them ll! 2. Do hrd lger (usully things with rckets) in more fmilir wy Exmple Simplify F = ( + d)( + )( + d) How would you do this? Strt F = ( + d)( + )( + d) It looks strnge! Tke the dul F dul = d + + d = d( + ) + (D) = d() + (N) x+x = = d + (B) x = x x Put in rckets redy to tke reverse dul F dul = d + () put in rckets By tking the dul, use the fmilir distriutive lw. Otherwise use the strnge D2 Tke dul ck F = d( + ) Vlid reduced identity. Thus ( + d)( + )( + d) = d( + ) Dig Cir I p. 36 Revised; Jnury 7, 26 Slide 9 Deriving Formuls From Truth Tles; Uses of Dulity Uses of Dulity Fctoring in lger is difficult. Using dulity mkes it esier ecuse the dul is lredy fctored. On the dul, one multiplies out, which is much esier for most people. At the end of multiplying out, the dul is in fctored form. Tking the dul of the dul tkes us ck to the originl expression, only now it is in fctored form. This works ecuse- - if one hs vlid identity its dul is vlid identity. Another exmple which hs simpler dul. Simplify X + (X Y) Most people do not see how to strt the ove. It my help to tke the dul. Tke the dul X (X + Y) This multiplies out to XX + Y = Y A Third Use for Dulity Finding new formuls, s in PROBLEM 36. where nother new formul for XOR is found y tking the dul of new formul for XNOR. 32. PROBLEM F= + (c + d) (tke dul) = +( +cd) Is there nything wrong with the ove lger, nd if so, wht is it? Crleton University Digitl Circuits I p. 37, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 9
20 Applictions of XOR, XNOR XOR, X-OR, Exclusive OR F is if exctly one of or is. Commuttive X Y = Y X Associtive X Y Z F X (Y Z) = (X Y) Z Thus one cn write X Y Z X Y Z X Y Z F No rckets needed Useful Properties lnverting ny led chnges XOR XNOR A B A B A B Mking one input mkes XOR n inverter x c= x x x if c= c= if c= A B A B B A B c x c x =x =x =x =x Dig Cir I p. 38 Revised; Jnury 7, 26 Slide 2 Applictions of XOR, XNOR XOR nd XNOR XOR nd XNOR Distriutive Lw: only (D) Holds (X Y)Z = (XZ) (YZ) (D2) does not (X Y) Z = (X Z)(Y Z) 33. PROVE THAT: (X Y)Z = XZ YZ 34. PROVE THAT: A B = A B = A B 35. PROBLEM The formul for XNOR is given on the next pge s + Prove: + = (+)(+) 36. PROBLEM Use dulity on Prolem 2. to find similr lternte form for +, the XOR formul. 37. vproblem Use the swp rule on + to find n lternte wy to mke n XOR out of AND, OR nd NOT gtes. Sketch the circuit Crleton University Digitl Circuits I p. 39, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 2
21 Deriving Formuls From Truth Tles The Formuls for XOR nd XNOR ( ) ( ) Eqution for when ( ) is ( ) = + ( ) is for ll other comintions Eqution for when ( ) is. Write out the Truth Tle ( ) = + 2. Look for where the result is. 3. Write down the letters corresponding to the inputs XOR-XNOR FORMULA Thus in the column is written s. ( ) = + in the column is written s. 4. AND the letters to mke term like. ( ) = + 5. The eqution is the OR of ll the terms where the output is. Actul XOR Gtes These re complex comintions of AND, OR, NAND nd NOR. ( ) = + ( ) = ( ) = + Dig Cir I p. 4 Revised; Jnury 7, 26 Slide 2 Deriving Formuls From Truth Tles Otining Formuls from Truth Tles Otining Formuls from Truth Tles This method will give formuls in wht is clled OR of ANDs or (SUM of PRODUCTs) form. These formuls re letters or their inverses ANDed together nd the resulting terms ORed together, like c + cd + cf + ce +... We need only find ll the terms tht mke the finl nswer. If no term mke the formul, then it defults to. To Find the Formul Go through the truth tle nd writes down the terms tht mke the result. Then OR ll these terms together Tht is the desired formul. XOR nd XNOR gtes These re more complex to implement thn most other two-input gtes. There re some simpler trnsistor circuits tht might e discussed in fourth yer, ut they re still more complex thn NAND nd NOR.. SUM of PRODUCTS form hs no rcketed terms like (f + d) or the rckets implied y long inverting rs like = () Crleton University Digitl Circuits I p. 4, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 2
22 Applictions of XOR, XNOR Applictions of XOR/XNOR Controlled Inverter Equlity Check x x if c= c x if c= if = else Adder Adding ( ) one-it numers. The sum Σ is n XOR gte. The Crry Cy is n AND gte. A Σ B Cy = = = = in dec () () () (2) A B A B Cy (crry) Σ (sum) Σ (sum) Odd Prity c p Tell if there re n odd numer of inputs p = if even numer of inputs. p = if odd numer of inputs c p Dig Cir I p. 42 Revised; Jnury 7, 26 Slide 22 Applictions of XOR, XNOR Applictions of XOR/XNOR Applictions of XOR/XNOR 38. PROBLEM ON COMPARE Design circuit which compres two 2-it numers A A nd B B. It gives out Z= if the two numers re equl. The Adder A A B B z= z= If: A =B, nd A =B The four results from dding two its A B Cy Hlf Adder Σ This upper circuit is clled hlf dder ecuse it dds only two its. A full dder (lower ox) cn dd three its. The third it is the crry input from previous stge. For dding one-it numers, or the first its of multiit numer, hlf dded is ll right. Otherwise full dder is needed. CY(IN) A B Full Adder Cy (out) Σ (sum) 39. PROBLEM ON PARITY Design n even-prity circuit which gives output if n even numer of inputs re one.. We will use for ddition here, since + ws used for OR. In mny plces + is used for oth, nd you hve to figure out which is which. Crleton University Digitl Circuits I p. 43, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 22
23 Applictions of XOR nd XNOR (Cont) Error Detection Prity to find trnsmission errors c c p p Trnsmission Circuit p = if odd numer of inputs. z =, if even numer of inputs. Including p s n input to z mkes z lwys. Except- z = indictes it chnged during trnsmission. p c p 3-it numers with prity check c p z Bd Bd 3 Bd 6 z Error z c c Dig Cir I p. 44 Revised; Jnury 7, 26 Slide 23 Applictions of XOR nd XNOR (Cont) Using Prity to Check for Trnsmission Using Prity to Check for Trnsmission Errors At the input (left side) the prity is clculted for the three input its (, nd c) nd trnsmitted s fourth it. At the output the prity of ll four its (,, c, nd p) is clculted. There should lwys e n even numer of ones (zero is n even numer) ecuse the p it is used to mke n even numer. If there is n odd numer of ones t the output, one it must hve een corrupted during trnsmission. 4. PROBLEM Wht hppens if two its re flipped during trnsmission? Will the prity error detection circuit shown identify the errors? 4. PROBLEM, PARITY CHECK p Ck Should Ck e nmed Error, i.e Ck= mens d it, c c or should it e nmed OK, i.e. Ck= mens numer is OK? Crleton University Digitl Circuits I p. 45, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 23
24 Common Three-Input Gtes Very Common Three-Input Gtes Select Identify prticulr it comintion. Reject Reject prticulr it comintion. c c c X Y Z X = when,,c =,, Y = when,,c =,, Z = unless,,c =,, MUX (Multiplexer) When C=, A goes thru to F. When C=, B goes thru to F. This is clled 2-input MUX. The control, C, input isn t counted A B C MUX F A C B MUX F= AC + BC F = A (if C=), F = B (if C=) Mjority Gte (Crry) Z= if the mjority of the inputs re. c 2 M c M = + c + c Dig Cir I p. 46 Revised; Jnury 7, 26 Slide 24 Common Three-Input Gtes Some Useful 3-Input Gtes Some Useful 3-Input Gtes Gtes A gte is some logic opertor tht is smll enough to e esily comprehended, nd used often enough to e worth giving specil nme. Gtes my e mde from simpler gtes. The XOR is usully mde from NANDs, NORs nd NOT. The mjority gte is shown here s eing mde from other gtes ut ctully N-input mjority gte could e esily mde s single gte from trnsistors. Mjority Gte M = + c + c + c However: c + = (c + ) = () = Thus the c term is redundnt, nd:- M = + c + c Crry Gte Consider three-it dder tht dds:- Cy (out), Σ = Cy (in) Cy (out) from the tle, is if ny two (or three) of, nd c re. This is the sme s for the mjority gte. 42. PROBLEM Design 4-input circuit which gives n output when 3 or more inputs re. Result in Cy(in) Cy(out) Σ Deciml Its output would e inverted. Crleton University Digitl Circuits I p. 47, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 24
25 Deriving Circuits from Truth Tles; Full Adder Circuits From Truth Tles The Full Adder The full-dder dds 3 its A B Cy (out) Full Adder Σ (sum) Cy(in) Cy(in) Cy(out) Σ Result, Deciml Cy(in) Cy(out) Cy Cy Cy Cy Σ Cy Cy Cy Cy Eqution for when Cy(out) is Cy(out) = Cy + Cy + Cy + Cy Cy(out) is for ll other comintions Eqution for when Σ is Σ = Cy + Cy + Cy + Cy Dig Cir I p. 48 Revised; Jnury 7, 26 Slide 25 Deriving Circuits from Truth Tles; Full Deriving Circuits From Truth Tles Deriving Circuits From Truth Tles Recll we only need consider cses which evlute to. Boolen formuls defult to if they re not. If the output is when,,c,d =,,,, this gives the term cd. OR together ll the terms tht give n output of, to get the complete formul. The formuls derived will not e in reduced form. Full Adders The full dder only dds one-it numers. To dd multiit numers, one needs severl full dders. A 4-it dder which dds two 4-it numers is shown. 4-Bit Adder mde from four full dders C 4 A 3 B 3 Full dder C 3 C 3 A 2 B 2 Full dder C 2 C 2 A B Full dder C C A B Full dder C Σ 3 Σ 2 Σ Σ A 3 B 3 A 2 B 2 A B A B C C 4 A 3 +B 3 +C 3 C 2 C 3 A 2 +B 2 +C 2 A +B +C C A +B +C Σ 3 Σ 2 Σ Σ Crleton University Digitl Circuits I p. 49, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 25
26 The Full Adder (Continued) Simplify The Full Adder Equtions Cy(out) = Cy + Cy + Cy + Cy = Cy + Cy + Cy + Cy + Cy+ Cy (I) x + x = x = ( + ) Cy + ( + ) Cy + (Cy+ Cy) (D) y + y = ( + )y = () Cy + ( ) Cy + () (N) x + x = = Cy + Cy + (B) x = x = mjority gte 2 Cy(out) Cy Cy Σ = Cy + Cy + Cy + Cy Reduce y compring with the prity circuit on the right. Reducing lgericlly is too much work. (It is shown the next slide) Σ Truth Tle For Sum Cy(in) Σ Truth Tle For Prity c p Dig Cir I p. 5 Revised; Jnury 7, 26 Slide 26 Deriving Circuits from Truth Tles; Full Simplifying the Full Adder Simplifying the Full Adder Crry Term This is strightforwrd 43. PROBLEM Strting on the second line of the simplifiction of the crry, Cy(out) = Cy + Cy + Cy + Cy + Cy+ Cy use the simplifiction rule to reduce the mount of writing to get the finl nswer. 44. PROBLEM Drw the circuit for full dder using mjority gte nd n exclusive-or gte. Crleton University Digitl Circuits I p. 5, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 26
27 The Full Adder Sum Eqution y Alger Optionl Slide for Alger Lovers Simplify the sum eqution lgericlly Σ = Cy + Cy + Cy + Cy = Cy + Cy + Cy + Cy = ( + ) Cy + ( + )Cy (C) (D) x + y = y + x y + y = ( + )y Cy = ( + ) Cy + ( + )Cy (Formul for XNOR) + = + = ( ) Cy + ( ) Cy (Formul for XOR) + = ( ) = ( ) Cy (Formul for XOR) u Cy + u Cy = (u Cy) u = ( ) Σ Dig Cir I p. 52 Revised; Jnury 7, 26 Slide 27 The Full Adder Sum Eqution y Alger Simplifying the Full Adder Sum Term Thisslide requires eing wre of the vrious forms of XOR nd XNOR. A B = A B = Α Β = + = + ( ) c + ( )c = c Crleton University Digitl Circuits I p. 53, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 27
28 Common Mistkes Common Errors. Sying is the sme s 2. Sying n expression is equl to its dul. 3. Not using AB + A =A to simplify expressions efore using more more complex rules. Also not reducing using A + AE = A + E. Simplifying nd reducing first my sve mny lines of lger. 4. Sying X + = X Everyone knows etter thn this, ut they still do it. 5. Not plcing the rckets round ll the AND terms efore tking the dul or (coming up soon) efore using the generlized DeMorgn s theorem. F = A (B + C D) + C D Must Add Brckets F = [A (B +[C D])] + [C D] Dig Cir I p. 54 Revised; Jnury 7, 26 Slide 28 Common Mistkes Simplifying the Full Adder How not to tke the dul: F= ce + + ced = (++c+f)(+)(+c+e+d) tke dul There re two lunders: The simplifiction lw should lwys e used first if pplicle. A function should never never never e equted to its dul. A etter pproch F= ce + + ced = + ced (S) +x = F dul = (+)(+c+e+d) tke dul Crleton University Digitl Circuits I p. 55, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 28
29 Dig Cir I p. 56 Revised; Jnury 7, 26 Slide 29 Simplifying the Full Adder Crleton University Digitl Circuits I p. 57, diglogicb.fm Revised; Jnury 7, 26 Comment on Slide 29
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