Institut de RadioAstronomie Millimétrique Keywords:

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1 -COMP-0 Revision: JAN 00 Francis Morel Institut de RadioAstronomie Millimétrique SubRef VME Board Owner Francis Morel Keywords: Approved by: Date: Signature: A.Perrigouard December 00

2 Change Record REVISION DATE AUTHOR SECTION/PAGE AFFECTED July 00 Francis Morel REMARKS Contents SUBREF VME Board description.... Motors and associated logics:.... Motors init:.... Position control mode:.... Caveat user:.... VME interface:.... Switches, jumpers:.... SUBREF Board Front-Panel:.... Front-panel display:.... Front-panel connector:....0 Subref Board layout:.... Subref Board schematics:...0. Submot Board layout:.... Submot Board schematics:... Create Date:Nov 00 subref.doc Page of

3 SUBREF VME Board description This board is a slave device, under control of a remote microprocessor. This board was designed for Subreflector control. The subreflector hyperbolic mirror needs dynamic correction to compensate for the main mirror deformation under gravity, depending on the antenna elevation. Tilt, translations and focus adjustments are also necessary. The Subref board drives motors, moving the mirror as requested by the microprocessor. The Subref board is composed of a carrier board in charge of the VME Bus interface, and similar daughter Submot boards, each Submot driving one motor. The motors are powered and connected to the Submot boards through an electronic rack, which also provides an optical isolation. This is the rack SubIsol, which is not described in this documentation.. Motors and associated logics: The motors (mot to mot) are similar. Each of them is a DC motor equipped with an encoder delivering 00 periods of a Sine/Cosine TTL signal per motor revolution. The encoder does not supply any reference pulse. The impulsions of the encoder are subdivided by in the electronics, which allows counting the motor revolutions with a resolution of /00 (originally ) revolution. Each motor is equipped with a precision microswitch. A bit of the Status register (SWI[x]) reflects the state of this switch: SWI[x] = 0 when motor[x] is positioned in the normal displacement zone, and SWI[x] = when motor[x] has reached its stroke limit in negative direction. The switch is also used as a hardware limit switch and SWI[x] = will forbid motor[x] moves with negative velocity. The Subref board allows reading the actual position (-bit signed APOS signed registers) and setting the requested position (-bit RPOS signed registers) and requested velocity of each motor. Setting a velocity request bit (PVR[x] or NVR[x] of the CMR, x being the motor number [..]) forces the selected motor to move with requested constant velocity. A move towards the switch has negative velocity. A velocity request is always effective. For position control, the motor position has to be initialized first. This is done through the -bit Command register (CMR) and checked through the -bit Status register (STS) of the Subref board. Command Register (CMR): TST NVR PVR ENA NVR PVR ENA NVR PVR ENA NVR PVR ENA NVR PVR ENA TST: May be set/reset (for tests only). NVR[x]: forces motor[x] to move with constant negative velocity. PVR[x]: forces motor[x] to move with constant positive velocity. ENA[x]: If ID[x] = 0, ENA[x] preloads motor[x] position register to zero, upon transition (from 0 to ) of SWI[x]. Bit ID[x] of Status is then set. Resetting ENA[x] resets ID[x]. Status Register (STS): TST RUN ID SWI RUN ID SWI RUN ID SWI RUN ID SWI RUN ID SWI TST: recopy of bit TST of the CMR. RUN[x]: motor[x] is requested to move, in any way. ID[x]: Init Done[x] = when motor[x] has been initialized. SWI[x]: Switch of motor[x], set if motor[x] has reached its negative limit.. Motors init: Upon turn-on, the actual position of a motor is unknown, as it is not initialized. For initialization, following commands are used: -SWI[x] is checked first: If SWI[x] =, PVR[x] is set, forcing motor[x] to run at constant velocity in the positive direction, until SWI[x] = 0. The motor stops, PVR[x] is then reset. Create Date:Nov 00 subref.doc Page of

4 -If SWI = 0, NVR[x] and ENA[x] are set, forcing motor[x] to move with constant negative velocity until SWI[x] =. Upon SWI[x] transition (from 0 to ), the board preloads APOS[x] register to 0x0000 and sets ID[x]. The motor stops, it is now initialized. -Resetting NVR[x] will set motor[x] in position control mode. Create Date:Nov 00 subref.doc Page of

5 . Position control mode: Once in this mode, motor[x] will go to the requested position. This position value is writable in the Requested Position Register, RPOS[x]. The actual position is readable in the Actual Position Register (APOS[x]). As might be expected, a move with negative velocity (move down) will decrease the position value. Positive velocity (move up) move will increase it.. Caveat user: -Upon turn-on, all bits of the CMR are reset. Thus, ID[x] of the Status are reset. All bits of APOS[x] and RPOS[x] registers are also reset. -A VME Reset has NO effect on the board. -Bits PVR[x] and NVR[x] are mutually exclusive and if both are set, motor[x] always stops. -Setting PVR[x] = and NVR[x] = 0 causes motor[x] to move at constant positive velocity. -Setting PVR[x] = 0 and NVR[x] = causes motor[x] to move at constant negative velocity. -When NVR[x] = 0 AND PVR[x] = 0 AND ID[x] =, motor[x] will always go to RPOS[x] position. -If ENA[x] = 0, SWI[x] transition (from 0 to ) will NOT preload APOS[x] to zero, but will freeze the contents of APOS[x]. This sampling is used for checking the reproducibility of position zero.. VME interface: The board is a A/D standard VME board. It is mapped in the VME -bit short address space. All register addresses are relative to the Base Address selected with the encoding wheels RC(A-A) and RC(A-A). -The actual address on Plateau de Bure of the Subref Board is 0xFFFFFE00. Register name Register address Data STS 0x00 Status register (Read only) APOS 0x0 Actual Position of Motor (Read only) APOS 0x0 Actual Position of Motor (Read only) APOS 0x0C Actual Position of Motor (Read only) APOS 0x0 Actual Position of Motor (Read only) APOS 0x Actual Position of Motor (Read only) CMR 0x00 Command Register (Write only) RPOS 0x0 Requested Position of Motor (Write only) RPOS 0x0 Requested Position of Motor (Write only) RPOS 0x0C Requested Position of Motor (Write only) RPOS 0x0 Requested Position of Motor (Write only) RPOS 0x Requested Position of Motor (Write only). Switches, jumpers: -Subref Base Address (address bits [A A]) is selectable using rotary encoding wheels on the board. Encoding wheel VME address bits RC (0 to F) A..A RC (0 to F) A..A -Each Submot board samples the encoders signals; it detects, filters and counts the rotations. The sample frequency is selectable with jumper SK on a -pin DIP socket: Jumper SK Sampling frequency position - MHz - MHz - MHz Create Date:Nov 00 subref.doc Page of

6 - 00 khz - 0 khz (default) - khz -0. khz -. khz This adjustment depends on the complete (motor + encoder + logics) configuration, and should not be modified. Create Date:Nov 00 subref.doc Page of

7 . SUBREF Board Front-Panel: Create Date:Nov 00 subref.doc Page of

8 . Front-panel display: The main carrier board, as well as the Submot boards uses FPGA chips. This allows easy modification of the functions. This also guarantees the short response times necessary for real-time motors driving. The carrier board is in charge of the VME transactions. It drives LEDs, displaying VME access and power status. Each Submot drives LEDs: Visible on the front-panel as groups of LEDs, they allow knowing at a glance the status of each motor. LED name Led colour LED function Wrt Yellow VME Write access display Rd Yellow VME Read access display Pwr Green VME Power On display Run (Mx) Yellow RUN[x] display Enable(Mx) Green ENA[x] display Switch(Mx) Red SWI[x] display Inidone(Mx) Green ID[x] display. Front-panel connector: Connections between the Subref board and the SubIsol rack are made through a 0-pos flat cable. All are TTL signals. Each motor needs signals: Signal name Signal direction (as viewed from VME) INSIN[x] Input Motor[x] encoder SIN signal INCOS[x] Input Motor[x] encoder COS signal /INSWI[x] Input Motor[x] switch: 0 Volt when TRUE OUTUP[x] Output Motor[x] Move Up command OUTDN[x] Output Motor[x] Move Down command Pinout of the front-panel connector: Pin Signal Name Comments Pin Signal name Comments +V Out Fuse protected +V Out Fuse protected +V Out Fuse protected +V Out Fuse protected +V Out Fuse protected +V Out Fuse protected +V Out Fuse protected +V Out Fuse protected 0 GND INSIN TTL input INCOS TTL input /INSWI LOW when switch ON OUTUP TTL output OUTDN TTL output GND INSIN TTL input INCOS TTL input /INSWI LOW when switch ON 0 OUTUP TTL output OUTDN TTL output GND INSIN TTL input INCOS TTL input /INSWI LOW when switch ON OUTUP TTL output OUTDN TTL output GND INSIN TTL input 0 INCOS TTL input /INSWI LOW when switch ON OUTUP TTL output OUTDN TTL output GND INSIN TTL input INCOS TTL input /INSWI LOW when switch ON OUTUP TTL output OUTDN TTL output 0 GND Create Date:Nov 00 subref.doc Page of

9 .0 Subref Board layout: N.B: as seen with the Submot boards removed Create Date:Nov 00 subref.doc Page of

10 . Subref Board schematics: CLOCK AND RESET MOT MOT POWEROK /START /START M SHEET VME CONTROLLER /START M ID[0..] ID[0..] LEDWR LEDRD WRTRP /RDAP WRTRP /RDAP WRTRP /RDAP WRTRP /RDAP WRTRP /RDAP WRTRP /RDAP WRTRP /RDAP WRTRP /RDAP WRTRP /RDAP WRTRP /RDAP /RDSTS WRCMR SHEET COMMAND AND STATUS REGs WRCMR /RDSTS ID[0..] CMR[0..] STS[0..] CMR[0..] COMMAND REGISTER STS[0..] STATUS REGISTER SHEET MOT CMR CMR CMR WRTRP /RDAP DATA BUS CMR CMR0 CMR WRTRP /RDAP CMR CMR CMR WRTRP /RDAP CMR CMR CMR WRTRP /RDAP CMR CMR CMR0 WRTRP /RDAP MOTOR CONNECTORS MOT NVR PVR ENA WRTRP /RDAP SIN COS SWI /MOVUP /MOVDN RUN IDONE ID[0..] NVR PVR ENA WRTRP /RDAP SIN COS SWI /MOVUP /MOVDN RUN IDONE NVR PVR ENA WRTRP /RDAP SIN COS SWI /MOVUP /MOVDN RUN IDONE NVR PVR ENA WRTRP /RDAP SIN COS SWI /MOVUP /MOVDN RUN IDONE NVR PVR ENA WRTRP /RDAP SHEET SIN COS SWI /MOVUP /MOVDN RUN IDONE STS STS STS STS0 STS STS STS STS STS STS STS STS STS STS STS0 INTERFACE SIN COS SWI /MOVUP /MOVDN POWEROK LEDWR LEDRD SIN COS SWI /MOVUP /MOVDN SIN COS SWI /MOVUP /MOVDN SIN COS SWI /MOVUP /MOVDN SIN COS SWI /MOVUP /MOVDN SHEET Title SUBREFLECTOR CONTROL VME BOARD BLOCK DIAGRAM OF MOTHER BOARD Size Document Number REV B F. Morel Date: August, Sheet of Create Date:Nov 00 subref.doc Page 0 of

11 VD0 VD VD VD VD VD VD VD /VDS /VDS0 /VWRITE /VDTACK /VIACK VAM VA VA VA VA VA VA +V VAM0 VAM VAM +V VD[0..] P A A A A A A A A A A0 A A A A A A A A A A0 A A A A A A A A A A0 A A B B B B B B B B B B0 B B B B B B B B B B0 B B B B B B B B B B0 B B C C C C C C C C C C0 C C C C C C C C C C0 C C C C C C C C C C0 C C DIN / VD VD VD0 VD VD VD VD VD /VSYSRST /VLWORD VAM VA VA VA VA VA VA0 VA VA +V +V L /VDTACK /ADOK VA VA VA VA /VIACK /VWRITE /VDS0 /VSYSRST /VDS VA VA VA VA VA VA0 VA VA RC P0 RC P0 VAM VAM VAM VAM VAM0 /VLWORD VA VA AM=,D VK 00 UA LS F A CAV JUMPER UNUSED GATES CD 00 uf T M 0 /START UB LS UC LS 0 U I I O I I/O I I/O I I/O I I/O I I/O I I/O I I/O I0 I/O I I O GAL 00 0 DTACK LEDWR WRCMR ACKIN WRTRP WRTRP WRTRP WRTRP WRTRP M WRTRP WRTRP WRTRP WRTRP WRTRP LEDWR LEDRD WRCMR /RDSTS UD LS 0 U I I O I I/O I I/O I I/O I I/O I I/O I I/O I I/O I0 I/O I I O GAL 00 0 LEDRD /RDSTS BUSDIR /RDAP /RDAP /RDAP /RDAP /RDAP ACKOUT /BUSENA M /RDAP /RDAP /RDAP /RDAP /RDAP RR RR *0 *0 P0 P P P P P P P Q0 Q Q Q Q Q Q Q G P0 P P P P P P P Q0 Q Q Q Q Q Q Q G P=Q A DD R ES S D EC O DE U ALS0 U A B A B A B A B A B A B A B A B G R DIR ID[0..] ID[0..] LS- U VD A B ID VD A B ID VD A B ID VD P=Q A B ID VD A B ID VD A B ID VD A B ID A VD0 A B DD R G ES DIR S LS- U0 D EC ALS0 O DE R /ADOK VD VD VD VD VD VD0 VD VD ID ID ID ID ID ID ID Title SUBREFLECTOR CONTROL VME BOARD MOTHER BOARD : VME CONTROLLER Size Document Number REV B F. Morel Date: August, Sheet of Create Date:Nov 00 subref.doc Page of

12 N D R M UA UB UD UE 0 HC00 HC HC HC uf CR X NC MHZ CRYSTAL OSC. UC CRYSTAL OSCILLATOR HC C L P D R Q Q UA HC POWEROK UB C L P D Q R 0 Q HC UA HC00 UB UD HC HC00 0 U /LD /CBI D0 Q0 D Q D Q D Q D Q D Q D Q D Q /UP /CBO /OE LS 0 NORMAL POSITION : strap - SK MHZ MHZ MHZ 00HKZ 0KHZ KHZ,KHZ,KHZ A A A A A A A A B B B B B B B B SOCKET 0 0 UC HC00 NORMAL POSITION : khz C C C C C C C C C C0 C C C C C C C C C C0 C 0.uF 0.uF 0.uF 0.uF 0.uF 0.uF 0.uF 0.uF 0.uF 0.uF 0.uF 0.uF 0.uF 0.uF 0.uF 0.uF 0.uF 0.uF 0.uF 0.uF 0.uF POWEROK POWEROK /START /START M M MOT MOT SUBREFLECTOR CONTROL VME BOARD Title MOTHER BOARD : CLOCK AND RESET GENERATOR Size Document Number REV B F. MOREL Date: May, Sheet of Create Date:Nov 00 subref.doc Page of

13 U D Q D Q D Q D Q D Q D Q D Q D Q HC U0 D Q D Q D Q D Q D Q D Q D Q D Q HC U ID ID D ID Q D ID Q D ID Q D Q D ID Q Q Q D D D ID STS HC OC WRCMR WRCMR COMMAND REGISTER ID[0..] ID[0..] ID ID ID ID ID ID ID ID ID ID ID ID ID ID OC OC C Q U OC D C Q D Q D Q D Q D Q D Q D Q D HC CMR[0..] STS[0..] STATUS REGISTER /RDSTS /RDSTS ID ID ID ID ID ID ID T ES T CMR CMR CMR CMR CMR0 CMR CMR CMR CMR CMR CMR CMR CMR CMR CMR0 STS STS STS STS STS0 STS STS STS STS STS STS STS STS STS0 CMR[0..] STS[0..] SUBREFLECTOR CONTROL VME BOARD Title MOTHER BOARD : COMMAND AND STATUS REGISTERS Size Document Number REV A F. MOREL Date: May, Sheet of Create Date:Nov 00 subref.doc Page of

14 WRTRP IDONE /MOVUP /MOVDN RUN ID ID ID ID ID ID ID ID ID ID ID ID ID ID MOT JM 0 0 /RDAP WRTRP SIN IDONE COS /MOVUP SWI /MOVDN ENA RUN PVR NVR JM 0 0 /RDAP WRTRP SIN IDONE COS /MOVUP SWI /MOVDN ENA RUN PVR NVR JM 0 0 /RDAP WRTRP SIN IDONE COS /MOVUP SWI /MOVDN ENA RUN PVR NVR JM 0 0 /RDAP WRTRP SIN IDONE COS /MOVUP SWI /MOVDN ENA RUN PVR NVR JM 0 0 /RDAP SIN COS SWI ENA PVR NVR M 0-00 M 0-00 M 0-00 M 0-00 M 0-00 MOTOR MOTOR MOTOR MOTOR MOTOR ID[0..] ID[0..] JM JM JM JM JM ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID ID M -00 M -00 M -00 M -00 M -00 SUBREFLECTOR CONTROL VME BOARD Title MOTHER BOARD : CONNECTIONS TO MOTOR BOARDS Size Document Number REV B F. MOREL Date: August, Sheet of Create Date:Nov 00 subref.doc Page of

15 LEDRD LEDWR POWEROK + Volt, A fuse protected JF /ISIN 0 /ICOS /ISWI MOTUP MOTDN /ISIN /ICOS /ISWI 0 MOTUP MOTDN /ISIN /ICOS /ISWI MOTUP MOTDN /ISIN 0 /ICOS /ISWI MOTUP MOTDN /ISIN /ICOS /ISWI MOTUP MOTDN 0 M REF : -0 PIN BOTTOM RIGHT AS SEEN FROM FRONT-PANEL FRONT-PANEL CONNECTOR R 0 R R 0 0 YELLOW YELLOW GREEN "WRITE" LED "READ" LED "POWER OK" LED LED LED LED D N Q N D Q Q VNL VNL VNL FRONT-PANEL DISPLAY MOTOR INTERFACE MOTOR INTERFACE MOTOR INTERFACE MOTOR INTERFACE MOTOR INTERFACE JF JF JF /MOVUP /MOVDN JF JF JF /MOVUP /MOVDN JF JF JF /MOVUP /MOVDN JF JF 0 JF /MOVUP /MOVDN JF JF JF /MOVUP /MOVDN /ISIN /ICOS /ISWI /ISIN /ICOS /ISWI /ISIN /ICOS /ISWI /ISIN /ICOS /ISWI /ISIN /ICOS /ISWI U A Y A Y A Y A Y A Y A Y A Y A Y G G HC0 MOTUP MOTDN SIN COS SWI JF JF U A Y A Y A Y A Y A Y A Y A Y A Y G G HC0 MOTUP MOTDN SIN COS SWI JF 0 JF U A Y A Y A Y A Y A Y A Y A Y A Y G G HC0 MOTUP MOTDN SIN COS SWI JF JF U A Y A Y A Y A Y A Y A Y A Y A Y G G HC0 MOTUP MOTDN SIN COS SWI JF JF U A Y A Y A Y A Y A Y A Y A Y A Y G G HC0 MOTUP MOTDN SIN COS SWI JF JF SUBREFLECTOR CONTROL VME BOARD Title FRONT - PANEL : CONNECTOR AND DISPLAY Size Document Number REV B F. MOREL Date: August, Sheet of Create Date:Nov 00 subref.doc Page of

16 . Submot Board layout: Create Date:Nov 00 subref.doc Page of

17 . Submot Board schematics: CONNECTORS ID[0..] SIN FROM INTERFACE COS SWI ENA FROM COMMAND PVR NVR MOT WRTRP /RDAP /MOVDN TO INTERFACE /MOVUP RUN IDONE SHEET C C C C C C 0.uF 0.uF 0.uF 0.uF 0.uF 0.uF C 0.uF WRTRP ALTR AGTR SIN COS SWI ENA PVR NVR 0 U A QA 0 B QB C QC D QD RCO CTEN HC UP-DN LOAD MX/MIN U A QA 0 B QB C QC D QD RCO CTEN HC UP-DN LOAD MX/MIN U I I I I I I I I I I I0 I/O0 I/O I/O I/0 I/O I/O I/O I/O I/O I/O O 0 GAL 00 SUBMOT CLOCK /PLD /UP IDONE /MOVUP /MOVDN RUN MOT LATCH RP ID ID ID ID ID ID ID ID ID ID ID ID ID ID 0 U P0 P P P P P P P IP>Q IP<Q PLE L-/A Q0 Q Q Q Q Q Q Q OP>Q OP<Q 0 AS U A QA 0 B QB C QC D QD RCO CTEN HC UP-DN LOAD MX/MIN U A QA 0 B QB C QC D QD RCO CTEN HC UP-DN LOAD MX/MIN AP<RP AP>RP 0 P0 P P P P P P P IP>Q IP<Q Q0 Q Q Q Q Q Q Q OP>Q OP<Q 0 PLE U L-/A AS U A QA 0 B QB C QC D QD RCO CTEN HC UP-DN LOAD MX/MIN U A QA 0 B QB C QC D QD RCO CTEN HC UP-DN LOAD MX/MIN ID[0..] AP0 AP AP AP AP AP AP AP U D Q D Q D Q D Q D Q D Q D Q D Q C OC ID ID ID ID ID ID ID HC AP AP AP0 AP AP AP AP AP /RDAP U0 D Q D Q D Q D Q D Q D Q D Q D Q C OC HC ID ID ID ID ID ID ID SUBREFLECTOR CONTROL VME BOARD Title PIGGY BACK MOTOR BOARDS : COUNTING UNIT Size Document Number REV B F. MOREL B Date: August, Sheet of Create Date:Nov 00 subref.doc Page of

18 J R R WRTRP /RDAP IDONE SIN /MOVUP /MOVDN RUN M 0-00JL COS SWI ENA PVR NVR LED IDONE GREEN LED LED SWI RED LED Q IDONE VNL SWI Q VNL MALE CONNECTORS ON ETCH SIDE FIT FEMALE SOCKETS OF MOTHER BOARD DISPLAY MOT ID ID ID ID ID ID ID ID ID ID ID ID ID ID J ENA R 0 R 0 LED LED ENA GREEN LED RUN YELLOW LED Q VNL RUN Q VNL M -00JL SUBREFLECTOR CONTROL VME BOARD Title PIGGY BACK MOTOR BORDS : CONNECTORS Size Document Number REV A F. MOREL Date: August, Sheet of Create Date:Nov 00 subref.doc Page of

GR16. Technical Manual. 10 M SPS, 16-bit Analog Signal Digitizer up to 8MB FIFO

GR16. Technical Manual. 10 M SPS, 16-bit Analog Signal Digitizer up to 8MB FIFO GR M SPS, -bit Analog Signal Digitizer up to MB FIFO Technical Manual 90 th Street, Davis, CA 9, USA Tel: 0--00 Fax: 0--0 Email: sales@tern.com web site: www.tern.com COPYRIGHT GR, EL, Grabber, and A-Engine