5 Binary to Gray and Gray to Binary converters:

Size: px
Start display at page:

Download "5 Binary to Gray and Gray to Binary converters:"

Transcription

1 5 Binary to Gray and Gray to Binary converters: Aim: To realize a binary to Grey and Grey Code to binary Converter. Components Required: Digital IC trainer kit, IC 7486 Quad 2 input EXOR The reflected binary code, also known as Gray code after Frank Gray, is a binary numeral system where two successive values differ in only one bit (binary digit). The reflected binary code was originally designed to prevent spurious output from electromechanical switches. Bell Labs researcher Frank Gray introduced the term reflected binary code in his 1947 patent application, remarking that the code had as yet no recognized name. He derived the name from the fact that it may be built up from the conventional binary code by a sort of reflection process. The code was later named after Gray by others who used it. Constructing an n-bit Gray code: The binary-reflected Gray code list for n bits can be generated recursively from the list for n1 bits by reflecting the list (i.e. listing the entries in reverse order), concatenating the original list with the reversed list, prefixing the entries in the original list with a binary 0, and then prefixing the entries in the reflected list with a binary 1. The one-bit Gray code is G1 = (0, 1). One bit list: 0 1 Reflected list : 1 0 Prefix old entries with 0: Prefix new entries with 1: Concatenated: Logic Circuit Design Lab Page 1

2 Fig. 5.1: Example, generating the n = 3 list from the n = 2 list: Fig. 5.2: Gray Code Logic Circuit Design Lab Page 2

3 Motivation: Many devices indicate position by closing and opening switches. If that device uses natural binary codes, positions 3(011) and 4(100) are next to each other but all three bits of the binary representation differ: The problem with natural binary codes is that, with physical, mechanical switches, it is very unlikely that switches will change states exactly in synchrony. In the transition between the two states explained, all three switches change state. In the brief period while all are changing, the switches will read some spurious position. Even without key bounce, the transition might look like When the switches appear to be in position 001, the observer cannot tell if that is the real position 001, or a transitional state between two other positions. If the output feeds into a sequential system, possibly via combinational logic, then the sequential system may store a false value. The reflected binary code solves this problem by changing only one switch at a time, so there is never any ambiguity of position. Gray code bits with A, Decimal values with D and Binary bits with B. Binary Code Decimal Gray Code B3 B2 B1 B0 D G3 G2 G1 G Table 5.1: Gray/Binary Code table Logic Circuit Design Lab Page 3

4 (a) G 0 = B 1.B 0 + B 1.B 0 = B 1 B 0 (b) G 1 = B 2.B 1 + B 2.B 1 = B 2 B 1 (c) G 2 = B 3.B 2 + B 3.B 2 = B 3 B 2 (d) G 3 = B 3 Fig. 5.3: KMap for binray to gray code: Logic Circuit Design Lab Page 4

5 Binary to Gray Code Converter: This same technique can be applied to make binary to gray converter. There will be 4 input bits, which represent binary and 4 output bits which represent equivalent gray code. Since we are creating binary to gray code converter so, we need to find expressions for each gray code output in terms of input binary bits. So, there will be four output bits G 3,G 2,G 1 and G 0. For these output bits the input will be different combinations of B 3,B 2,B 1 and B 0 based on minimized expression. Binary Code Gray Code B 3 B 2 B 1 B 0 G 3 G 2 G 1 G Table 5.2: Binary to Gray Code table Logic Circuit Design Lab Page 5

6 Fig. 5.4: Logic Circuit Design Lab Page 6

7 The most significant bit (MSB) in Gray is taken directly from the MSB in binary. The rest of the Gray bits comes from a XOR operation between the precedent binary bit(b(i-1)) and the current binary bit (b(i)). In the case shown in the figure below: Fig. 5.5: Binary to Gray Code Converter: Logic Circuit Design Lab Page 7

8 (a) B 0 = G 3 G 2 G 1 G 0 (b) B 1 = G 3 G 2 G 1 (c) B 2 = G 3 G 2 (d) B 3 = G 3 Fig. 5.6: Kmap for Gray code to binary conversion Logic Circuit Design Lab Page 8

9 Gray to Binary Code Converter: This same technique can be applied to make gray to binary converter. There will be 4 input bits, which represent gray and 4 output bits which represent equivalent binary code. Since we are creating gray to binary code converter so, we need to find expressions for each binary code output in terms of input gray bits. So, there will be four output bits B3,B2,B1 and B0. For these output bits the input will be different combinations of G3,G2,G1 and G0 based on minimized expression. Binary Code Gray Code G3 G2 G1 G0 B3 B2 B1 B Table 5.3: Gray to Binary Code table KMap reduction B 0 = G 3 G 2 G 1 G 0 (How?) B 1 = G 3.G 2.G 1 + G 3.G 2.G 1 + G 3.G 2.G 1 + G 3 G 2.G 1 B 1 = G 3 (G 2.G 1 + G 2.G 1 ) + G 3 (G 2.G 1 + G 2.G 1 ) = G 3 (G 2 G 1 ) + G 3 (G 2 G 1 ) = G 3 G 2 G 1 B 2 = G 3.G 2 + G 3.G 2 = G 3 G 2 B 3 = G 3 Logic Circuit Design Lab Page 9

10 Fig. 5.7: Logic Circuit Design Lab Page 10

11 The most significant bit (MSB) in Binary is taken directly from the MSB in Gray. The rest of the Binary bits comes from a XOR operations. Fig. 5.8: Gray to Binary Code Converter: Additional Design Questions: 1. Design a Binary to BCD code Converter. 2. Design a Binary to Grey and Grey to Binary converter using MOD control. Result: Designed and setup a binary to gray code converter and gray code to binary code converter. Logic Circuit Design Lab Page 11

12 A Answers to Additional Questions: Logic Circuit Design Lab Page 12

13 A.1 Code Converters: Binary code to Gray code and Gray code to binary converter with mode control(x).when X=0 we need to implement binary to gray code and when X=1 we need Gray code to Binary code converter. X A 2 A 1 A 0 B 2 B 1 B Table A.1: Grey to Binary and Binary to Grey Code Converter with Mode Control(X): (a) B 2 = A 2 (b) B 1 = A 2 A 1 (c) B 0 = X.A 2 (A 1 A 0 ) Fig. A.1: KMap for Binray/Gray code converter: Kmap solution for B1 B 1 = A 2.A 1 + A 2.A 1 = A 2 A 1 Logic Circuit Design Lab Page 13

14 Kmap solution for B0 B 0 = X.A 1.A 0 + X.A 1.A 0 + A 2.A 1.A 0 + A 2.A 1.A 0 + X.A 2.A 1.A 0 + X.A 2.A 1.A 0 = (X + A 2 )(A 1.A 0 + A 1.A 0 ) + X.A 2 (A 1.A 0 + A 1.A 0 ) B 0 = X.A 2 (A 1 A 0 ) + X.A 2 (A 1 A 0 ) = XA 2 (A 1 A 0 ) Fig. A.2: Binary/Gray Code converter: Logic Circuit Design Lab Page 14

15 D C B A D4 D3 D2 D1 D Table A.2: Binary to BCD converter truth table: (a) D 0 = A (b) D 1 = B.C.D + D.B (c) D 2 = D.C + CB = C(D + B) (d) D 3 = D.CB (e) D 4 = DC + DB = D(C + B) Fig. A.3: KMap for Binray to BCD code converter: Logic Circuit Design Lab Page 15

16 Fig. A.4: Binary to BCD converter: Logic Circuit Design Lab Page 16

17 Fig. A.5: Binary to BCD converter: A Binary to BCD code converter illustrating how binary numbers (1110) and (1000) is converted to BCD. Note that the 7-segment displays are connected for illustration purpose. Fig. A.6: Binary to BCD converter: Logic Circuit Design Lab Page 17

18 B LTspice Simulations. B.1 Random sequence generator: Fig. B.1: Random sequence generator 1,2,5,7: Fig. B.2: Timing diagram Random sequence generator 1,2,5,7: LTspice Simulation File: Logic Circuit Design Lab Page 18

19 Fig. B.3: Self starting random sequence generator 1,2,5,7: Fig. B.4: Timing diagram Self starting random sequence generator 1,2,5,7:: LTspice Simulation File: Logic Circuit Design Lab Page 19

20 C C.1 Everycircuit Simulations. Binary to Gray and Gray to Binary converters: (a) Binary to gray code: (b) Gray code to binary: Fig. C.1: Binary to Gray and Gray to Binary converters: (a) Binary/Gray code converter: (b) Binary to BCD code converter: Fig. C.2: Binary/Gray converter and Binary to BCD converter: Logic Circuit Design Lab Page 20

DESIGN AND IMPLEMENTATION OF ENCODERS AND DECODERS. To design and implement encoders and decoders using logic gates.

DESIGN AND IMPLEMENTATION OF ENCODERS AND DECODERS. To design and implement encoders and decoders using logic gates. DESIGN AND IMPLEMENTATION OF ENCODERS AND DECODERS AIM To design and implement encoders and decoders using logic gates. COMPONENTS REQUIRED S.No Components Specification Quantity 1. Digital IC Trainer

More information

Experiment 7: Magnitude comparators

Experiment 7: Magnitude comparators Module: Logic Design Lab Name:... University no:.. Group no: Lab Partner Name: Experiment 7: Magnitude comparators Mr. Mohamed El-Saied Objective: Realization of -bit comparator using logic gates. Realization

More information

Unit 3 Session - 9 Data-Processing Circuits

Unit 3 Session - 9 Data-Processing Circuits Objectives Unit 3 Session - 9 Data-Processing Design of multiplexer circuits Discuss multiplexer applications Realization of higher order multiplexers using lower orders (multiplexer trees) Introduction

More information

UNIT II COMBINATIONAL CIRCUITS:

UNIT II COMBINATIONAL CIRCUITS: UNIT II COMBINATIONAL CIRCUITS: INTRODUCTION: The digital system consists of two types of circuits, namely (i) (ii) Combinational circuits Sequential circuits Combinational circuit consists of logic gates

More information

Looking at a two binary digit sum shows what we need to extend addition to multiple binary digits.

Looking at a two binary digit sum shows what we need to extend addition to multiple binary digits. A Full Adder The half-adder is extremely useful until you want to add more that one binary digit quantities. The slow way to develop a two binary digit adders would be to make a truth table and reduce

More information

Boolean Algebra & Digital Logic

Boolean Algebra & Digital Logic Boolean Algebra & Digital Logic Boolean algebra was developed by the Englishman George Boole, who published the basic principles in the 1854 treatise An Investigation of the Laws of Thought on Which to

More information

LOGIC GATES. Basic Experiment and Design of Electronics. Ho Kyung Kim, Ph.D.

LOGIC GATES. Basic Experiment and Design of Electronics. Ho Kyung Kim, Ph.D. Basic Eperiment and Design of Electronics LOGIC GATES Ho Kyung Kim, Ph.D. hokyung@pusan.ac.kr School of Mechanical Engineering Pusan National University Outline Boolean algebra Logic gates Karnaugh maps

More information

Combinational Digital Design. Laboratory Manual. Experiment #6. Simplification using Karnaugh Map

Combinational Digital Design. Laboratory Manual. Experiment #6. Simplification using Karnaugh Map The Islamic University of Gaza Engineering Faculty Department of Computer Engineering Fall 2017 ECOM 2013 Khaleel I. Shaheen Combinational Digital Design Laboratory Manual Experiment #6 Simplification

More information

Digital Circuits, Binary Numbering, and Logic Gates Cornerstone Electronics Technology and Robotics II

Digital Circuits, Binary Numbering, and Logic Gates Cornerstone Electronics Technology and Robotics II Digital Circuits, Binary Numbering, and Logic Gates Cornerstone Electronics Technology and Robotics II Administration: o Prayer Electricity and Electronics, Section 20.1, Digital Fundamentals: o Fundamentals:

More information

3. Complete the following table of equivalent values. Use binary numbers with a sign bit and 7 bits for the value

3. Complete the following table of equivalent values. Use binary numbers with a sign bit and 7 bits for the value EGC22 Digital Logic Fundamental Additional Practice Problems. Complete the following table of equivalent values. Binary. Octal 35.77 33.23.875 29.99 27 9 64 Hexadecimal B.3 D.FD B.4C 2. Calculate the following

More information

XI STANDARD [ COMPUTER SCIENCE ] 5 MARKS STUDY MATERIAL.

XI STANDARD [ COMPUTER SCIENCE ] 5 MARKS STUDY MATERIAL. 2017-18 XI STANDARD [ COMPUTER SCIENCE ] 5 MARKS STUDY MATERIAL HALF ADDER 1. The circuit that performs addition within the Arithmetic and Logic Unit of the CPU are called adders. 2. A unit that adds two

More information

BINARY CODES. Binary Codes. Computer Mathematics I. Jiraporn Pooksook Department of Electrical and Computer Engineering Naresuan University

BINARY CODES. Binary Codes. Computer Mathematics I. Jiraporn Pooksook Department of Electrical and Computer Engineering Naresuan University Binary Codes Computer Mathematics I Jiraporn Pooksook Department of Electrical and Computer Engineering Naresuan University BINARY CODES: BCD Binary Coded Decimal system is represented by a group of 4

More information

Digital Electronics Circuits 2017

Digital Electronics Circuits 2017 JSS SCIENCE AND TECHNOLOGY UNIVERSITY Digital Electronics Circuits (EC37L) Lab in-charge: Dr. Shankraiah Course outcomes: After the completion of laboratory the student will be able to, 1. Simplify, design

More information

PG - TRB UNIT-X- DIGITAL ELECTRONICS. POLYTECHNIC-TRB MATERIALS

PG - TRB UNIT-X- DIGITAL ELECTRONICS.   POLYTECHNIC-TRB MATERIALS SRIMAAN COACHING CENTRE-PG-TRB-PHYSICS- DIGITAL ELECTRONICS-STUDY MATERIAL-CONTACT: 8072230063 SRIMAAN PG - TRB PHYSICS UNIT-X- DIGITAL ELECTRONICS POLYTECHNIC-TRB MATERIALS MATHS/COMPUTER SCIENCE/IT/ECE/EEE

More information

Schedule. ECEN 301 Discussion #25 Final Review 1. Date Day Class No. 1 Dec Mon 25 Final Review. Title Chapters HW Due date. Lab Due date.

Schedule. ECEN 301 Discussion #25 Final Review 1. Date Day Class No. 1 Dec Mon 25 Final Review. Title Chapters HW Due date. Lab Due date. Schedule Date Day Class No. Dec Mon 25 Final Review 2 Dec Tue 3 Dec Wed 26 Final Review Title Chapters HW Due date Lab Due date LAB 8 Exam 4 Dec Thu 5 Dec Fri Recitation HW 6 Dec Sat 7 Dec Sun 8 Dec Mon

More information

Function of Combinational Logic ENT263

Function of Combinational Logic ENT263 Function of Combinational Logic ENT263 Chapter Objectives Distinguish between half-adder and full-adder Use BCD-to-7-segment decoders in display systems Apply multiplexer in data selection Use decoders

More information

Introduction to Karnaugh Maps

Introduction to Karnaugh Maps Introduction to Karnaugh Maps Review So far, you (the students) have been introduced to truth tables, and how to derive a Boolean circuit from them. We will do an example. Consider the truth table for

More information

Z = F(X) Combinational circuit. A combinational circuit can be specified either by a truth table. Truth Table

Z = F(X) Combinational circuit. A combinational circuit can be specified either by a truth table. Truth Table Lesson Objectives In this lesson, you will learn about What are combinational circuits Design procedure of combinational circuits Examples of combinational circuit design Combinational Circuits Logic circuit

More information

ENGG 1203 Tutorial - 2 Recall Lab 2 - e.g. 4 input XOR. Parity checking (for interest) Recall : Simplification methods. Recall : Time Delay

ENGG 1203 Tutorial - 2 Recall Lab 2 - e.g. 4 input XOR. Parity checking (for interest) Recall : Simplification methods. Recall : Time Delay ENGG 23 Tutorial - 2 Recall Lab 2 - e.g. 4 input XOR Parity checking (for interest) Parity bit Parity checking Error detection, eg. Data can be Corrupted Even parity total number of s is even Odd parity

More information

Total Time = 90 Minutes, Total Marks = 100. Total /10 /25 /20 /10 /15 /20

Total Time = 90 Minutes, Total Marks = 100. Total /10 /25 /20 /10 /15 /20 University of Waterloo Department of Electrical & Computer Engineering E&CE 223 Digital Circuits and Systems Midterm Examination Instructor: M. Sachdev October 30th, 2006 Total Time = 90 Minutes, Total

More information

Laboratory II. Exploring Digital Logic

Laboratory II. Exploring Digital Logic Laboratory II Exploring Digital Logic Abstract Few devices in the world are as ubiquitous as the seven-segment display. This device, which was invented in the 1960 s, can be found everywhere from digital

More information

Digital Logic (2) Boolean Algebra

Digital Logic (2) Boolean Algebra Digital Logic (2) Boolean Algebra Boolean algebra is the mathematics of digital systems. It was developed in 1850 s by George Boole. We will use Boolean algebra to minimize logic expressions. Karnaugh

More information

Implementation of Boolean Logic by Digital Circuits

Implementation of Boolean Logic by Digital Circuits Implementation of Boolean Logic by Digital Circuits We now consider the use of electronic circuits to implement Boolean functions and arithmetic functions that can be derived from these Boolean functions.

More information

Sample Test Paper - I

Sample Test Paper - I Scheme G Sample Test Paper - I Course Name : Computer Engineering Group Marks : 25 Hours: 1 Hrs. Q.1) Attempt any THREE: 09 Marks a) Define i) Propagation delay ii) Fan-in iii) Fan-out b) Convert the following:

More information

CSE 140L Spring 2010 Lab 1 Assignment Due beginning of the class on 14 th April

CSE 140L Spring 2010 Lab 1 Assignment Due beginning of the class on 14 th April CSE 140L Spring 2010 Lab 1 Assignment Due beginning of the class on 14 th April Objective - Get familiar with the Xilinx ISE webpack tool - Learn how to design basic combinational digital components -

More information

10/14/2009. Reading: Hambley Chapters

10/14/2009. Reading: Hambley Chapters EE40 Lec 14 Digital Signal and Boolean Algebra Prof. Nathan Cheung 10/14/2009 Reading: Hambley Chapters 7.1-7.4 7.4 Slide 1 Analog Signals Analog: signal amplitude is continuous with time. Amplitude Modulated

More information

Total Time = 90 Minutes, Total Marks = 50. Total /50 /10 /18

Total Time = 90 Minutes, Total Marks = 50. Total /50 /10 /18 University of Waterloo Department of Electrical & Computer Engineering E&CE 223 Digital Circuits and Systems Midterm Examination Instructor: M. Sachdev October 23rd, 2007 Total Time = 90 Minutes, Total

More information

KUMARAGURU COLLEGE OF TECHNOLOGY COIMBATORE

KUMARAGURU COLLEGE OF TECHNOLOGY COIMBATORE Estd-1984 KUMARAGURU COLLEGE OF TECHNOLOGY COIMBATORE 641 006 QUESTION BANK UNIT I PART A ISO 9001:2000 Certified 1. Convert (100001110.010) 2 to a decimal number. 2. Find the canonical SOP for the function

More information

CSE 20 DISCRETE MATH. Fall

CSE 20 DISCRETE MATH. Fall CSE 20 DISCRETE MATH Fall 2017 http://cseweb.ucsd.edu/classes/fa17/cse20-ab/ Today's learning goals Describe and use algorithms for integer operations based on their expansions Relate algorithms for integer

More information

SIR C.R.REDDY COLLEGE OF ENGINEERING ELURU DIGITAL INTEGRATED CIRCUITS (DIC) LABORATORY MANUAL III / IV B.E. (ECE) : I - SEMESTER

SIR C.R.REDDY COLLEGE OF ENGINEERING ELURU DIGITAL INTEGRATED CIRCUITS (DIC) LABORATORY MANUAL III / IV B.E. (ECE) : I - SEMESTER SIR C.R.REDDY COLLEGE OF ENGINEERING ELURU 534 007 DIGITAL INTEGRATED CIRCUITS (DIC) LABORATORY MANUAL III / IV B.E. (ECE) : I - SEMESTER DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING DIGITAL

More information

DELAY CALCULATIONS FOR VARIOUS CODE CONVERTERS

DELAY CALCULATIONS FOR VARIOUS CODE CONVERTERS DELAY CALCULATIONS FOR VARIOUS CODE CONVERTERS Rita Mahajan 1, Gourav Saini 2, Deepak Bagai 3 1 Assistant Professor, 2 ME student, 3 Professor, Department of Electronics and Communication Engineering,

More information

Philadelphia University Student Name: Student Number:

Philadelphia University Student Name: Student Number: Philadelphia University Student Name: Student Number: Faculty of Engineering Serial Number: Final Exam, Second Semester: 2015/2016 Dept. of Computer Engineering Course Title: Logic Circuits Date: 08/06/2016

More information

Using the NOT realization from the NAND, we can NOT the output of the NAND gate making it a NOT NOT AND or simply an AND gate.

Using the NOT realization from the NAND, we can NOT the output of the NAND gate making it a NOT NOT AND or simply an AND gate. CSC 216 NAND/NOR Equivalents and Flip/Flops Dr. Anthony S. Pyzdrowski 10/28/2016 The NAND gate is a NOT AND gate. It is false when all inputs are true and true otherwise. The NOR gate is a NOT OR gate.

More information

CpE358/CS381. Switching Theory and Logical Design. Summer

CpE358/CS381. Switching Theory and Logical Design. Summer Switching Theory and Logical Design - Class Schedule Monday Tuesday Wednesday Thursday Friday May 7 8 9 - Class 2 - Class 2 2 24 - Class 3 25 26 - Class 4 27 28 Quiz Commencement 3 June 2 - Class 5 3 -

More information

Combinational Logic Design/Circuits

Combinational Logic Design/Circuits 3 ` Combinational Logic Design/Circuits Chapter-3(Hours : 12 Marks:24 ) Combinational Logic design / Circuits 3.1 Simplification of Boolean expression using Boolean algebra. 3.2 Construction of logical

More information

(Boolean Algebra, combinational circuits) (Binary Codes and -arithmetics)

(Boolean Algebra, combinational circuits) (Binary Codes and -arithmetics) Task 1. Exercises: Logical Design of Digital Systems Seite: 1 Self Study (Boolean Algebra, combinational circuits) 1.1 Minimize the function f 1 a ab ab by the help of Boolean algebra and give an implementation

More information

Digital Electronics Part 1: Binary Logic

Digital Electronics Part 1: Binary Logic Digital Electronics Part 1: Binary Logic Electronic devices in your everyday life What makes these products examples of electronic devices? What are some things they have in common? 2 How do electronics

More information

Carry Look Ahead Adders

Carry Look Ahead Adders Carry Look Ahead Adders Lesson Objectives: The objectives of this lesson are to learn about: 1. Carry Look Ahead Adder circuit. 2. Binary Parallel Adder/Subtractor circuit. 3. BCD adder circuit. 4. Binary

More information

Unit II Chapter 4:- Digital Logic Contents 4.1 Introduction... 4

Unit II Chapter 4:- Digital Logic Contents 4.1 Introduction... 4 Unit II Chapter 4:- Digital Logic Contents 4.1 Introduction... 4 4.1.1 Signal... 4 4.1.2 Comparison of Analog and Digital Signal... 7 4.2 Number Systems... 7 4.2.1 Decimal Number System... 7 4.2.2 Binary

More information

Ch 2. Combinational Logic. II - Combinational Logic Contemporary Logic Design 1

Ch 2. Combinational Logic. II - Combinational Logic Contemporary Logic Design 1 Ch 2. Combinational Logic II - Combinational Logic Contemporary Logic Design 1 Combinational logic Define The kind of digital system whose output behavior depends only on the current inputs memoryless:

More information

Chapter 3 Ctd: Combinational Functions and Circuits

Chapter 3 Ctd: Combinational Functions and Circuits Chapter 3 Ctd: Combinational Functions and Circuits 1 Value Fixing, Transferring, and Inverting Four different functions are possible as a function of single Boolean variable Transferring Inverting Value

More information

The Design Procedure. Output Equation Determination - Derive output equations from the state table

The Design Procedure. Output Equation Determination - Derive output equations from the state table The Design Procedure Specification Formulation - Obtain a state diagram or state table State Assignment - Assign binary codes to the states Flip-Flop Input Equation Determination - Select flipflop types

More information

COSC 243. Introduction to Logic And Combinatorial Logic. Lecture 4 - Introduction to Logic and Combinatorial Logic. COSC 243 (Computer Architecture)

COSC 243. Introduction to Logic And Combinatorial Logic. Lecture 4 - Introduction to Logic and Combinatorial Logic. COSC 243 (Computer Architecture) COSC 243 Introduction to Logic And Combinatorial Logic 1 Overview This Lecture Introduction to Digital Logic Gates Boolean algebra Combinatorial Logic Source: Chapter 11 (10 th edition) Source: J.R. Gregg,

More information

1 Boolean Algebra Simplification

1 Boolean Algebra Simplification cs281: Computer Organization Lab3 Prelab Our objective in this prelab is to lay the groundwork for simplifying boolean expressions in order to minimize the complexity of the resultant digital logic circuit.

More information

Exam for Physics 4051, October 31, 2008

Exam for Physics 4051, October 31, 2008 Exam for Physics 45, October, 8 5 points - closed book - calculators allowed - show your work Problem : (6 Points) The 4 bit shift register circuit shown in Figure has been initialized to contain the following

More information

Combinational Logic Design Principles

Combinational Logic Design Principles Combinational Logic Design Principles Switching algebra Doru Todinca Department of Computers Politehnica University of Timisoara Outline Introduction Switching algebra Axioms of switching algebra Theorems

More information

Midterm Examination # 1 Wednesday, February 25, Duration of examination: 75 minutes

Midterm Examination # 1 Wednesday, February 25, Duration of examination: 75 minutes Page 1 of 10 School of Computer Science 60-265-01 Computer Architecture and Digital Design Winter 2009 Semester Midterm Examination # 1 Wednesday, February 25, 2009 Student Name: First Name Family Name

More information

Logic Simplification. Boolean Simplification Example. Applying Boolean Identities F = A B C + A B C + A BC + ABC. Karnaugh Maps 2/10/2009 COMP370 1

Logic Simplification. Boolean Simplification Example. Applying Boolean Identities F = A B C + A B C + A BC + ABC. Karnaugh Maps 2/10/2009 COMP370 1 Digital Logic COMP370 Introduction to Computer Architecture Logic Simplification It is frequently possible to simplify a logical expression. This makes it easier to understand and requires fewer gates

More information

Boolean algebra. Examples of these individual laws of Boolean, rules and theorems for Boolean algebra are given in the following table.

Boolean algebra. Examples of these individual laws of Boolean, rules and theorems for Boolean algebra are given in the following table. The Laws of Boolean Boolean algebra As well as the logic symbols 0 and 1 being used to represent a digital input or output, we can also use them as constants for a permanently Open or Closed circuit or

More information

Cs302 Quiz for MID TERM Exam Solved

Cs302 Quiz for MID TERM Exam Solved Question # 1 of 10 ( Start time: 01:30:33 PM ) Total Marks: 1 Caveman used a number system that has distinct shapes: 4 5 6 7 Question # 2 of 10 ( Start time: 01:31:25 PM ) Total Marks: 1 TTL based devices

More information

MODULAR CIRCUITS CHAPTER 7

MODULAR CIRCUITS CHAPTER 7 CHAPTER 7 MODULAR CIRCUITS A modular circuit is a digital circuit that performs a specific function or has certain usage. The modular circuits to be introduced in this chapter are decoders, encoders, multiplexers,

More information

4 Switching Algebra 4.1 Axioms; Signals and Switching Algebra

4 Switching Algebra 4.1 Axioms; Signals and Switching Algebra 4 Switching Algebra 4.1 Axioms; Signals and Switching Algebra To design a digital circuit that will perform a required function, it is necessary to manipulate and combine the various input signals in certain

More information

Signals and Systems Digital Logic System

Signals and Systems Digital Logic System Signals and Systems Digital Logic System Prof. Wonhee Kim Chapter 2 Design Process for Combinational Systems Step 1: Represent each of the inputs and outputs in binary Step 1.5: If necessary, break the

More information

CS/COE0447: Computer Organization and Assembly Language

CS/COE0447: Computer Organization and Assembly Language CS/COE0447: Computer Organization and Assembly Language Logic Design Introduction (Brief?) Appendix B: The Basics of Logic Design Dept. of Computer Science Logic design? Digital hardware is implemented

More information

MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION (Autonomous) (ISO/IEC Certified) State any two Boolean laws. (Any 2 laws 1 mark each)

MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION (Autonomous) (ISO/IEC Certified) State any two Boolean laws. (Any 2 laws 1 mark each) Subject Code: 17333 Model Answer Page 1/ 27 Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model

More information

Systems I: Computer Organization and Architecture

Systems I: Computer Organization and Architecture Systems I: Computer Organization and Architecture Lecture 6 - Combinational Logic Introduction A combinational circuit consists of input variables, logic gates, and output variables. The logic gates accept

More information

COE 202: Digital Logic Design Combinational Circuits Part 2. Dr. Ahmad Almulhem ahmadsm AT kfupm Phone: Office:

COE 202: Digital Logic Design Combinational Circuits Part 2. Dr. Ahmad Almulhem   ahmadsm AT kfupm Phone: Office: COE 202: Digital Logic Design Combinational Circuits Part 2 Dr. Ahmad Almulhem Email: ahmadsm AT kfupm Phone: 860-7554 Office: 22-324 Objectives Arithmetic Circuits Adder Subtractor Carry Look Ahead Adder

More information

S C F F F T T F T T S C B F F F F F T F T F F T T T F F T F T T T F T T T

S C F F F T T F T T S C B F F F F F T F T F F T T T F F T F T T T F T T T EECS 270, Winter 2017, Lecture 1 Page 1 of 6 Use pencil! Say we live in the rather black and white world where things (variables) are either true (T) or false (F). So if S is Mark is going to the Store

More information

Theory of Logic Circuits. Laboratory manual. Exercise 1

Theory of Logic Circuits. Laboratory manual. Exercise 1 Zakład Mikroinformatyki i Teorii utomatów Cyfrowych Theory of Logic Circuits Laboratory manual Eercise Combinational switching circuits 008 Urszula Stańczyk, Piotr Czekalski (edt. E.. Combinational switching

More information

Combinational Logic. Mantıksal Tasarım BBM231. section instructor: Ufuk Çelikcan

Combinational Logic. Mantıksal Tasarım BBM231. section instructor: Ufuk Çelikcan Combinational Logic Mantıksal Tasarım BBM23 section instructor: Ufuk Çelikcan Classification. Combinational no memory outputs depends on only the present inputs expressed by Boolean functions 2. Sequential

More information

UNIT 4 MINTERM AND MAXTERM EXPANSIONS

UNIT 4 MINTERM AND MAXTERM EXPANSIONS UNIT 4 MINTERM AND MAXTERM EXPANSIONS Spring 2 Minterm and Maxterm Expansions 2 Contents Conversion of English sentences to Boolean equations Combinational logic design using a truth table Minterm and

More information

Week No. 06: Numbering Systems

Week No. 06: Numbering Systems Week No. 06: Numbering Systems Numbering System: A numbering system defined as A set of values used to represent quantity. OR A number system is a term used for a set of different symbols or digits, which

More information

Part 1: Digital Logic and Gates. Analog vs. Digital waveforms. The digital advantage. In real life...

Part 1: Digital Logic and Gates. Analog vs. Digital waveforms. The digital advantage. In real life... Part 1: Digital Logic and Gates Analog vs Digital waveforms An analog signal assumes a continuous range of values: v(t) ANALOG A digital signal assumes discrete (isolated, separate) values Usually there

More information

Chapter 4. Combinational: Circuits with logic gates whose outputs depend on the present combination of the inputs. elements. Dr.

Chapter 4. Combinational: Circuits with logic gates whose outputs depend on the present combination of the inputs. elements. Dr. Chapter 4 Dr. Panos Nasiopoulos Combinational: Circuits with logic gates whose outputs depend on the present combination of the inputs. Sequential: In addition, they include storage elements Combinational

More information

Review for B33DV2-Digital Design. Digital Design

Review for B33DV2-Digital Design. Digital Design Review for B33DV2 The Elements of Modern Behaviours Design Representations Blocks Waveforms Gates Truth Tables Boolean Algebra Switches Rapid Prototyping Technologies Circuit Technologies TTL MOS Simulation

More information

CSEE 3827: Fundamentals of Computer Systems. Combinational Circuits

CSEE 3827: Fundamentals of Computer Systems. Combinational Circuits CSEE 3827: Fundamentals of Computer Systems Combinational Circuits Outline (M&K 3., 3.3, 3.6-3.9, 4.-4.2, 4.5, 9.4) Combinational Circuit Design Standard combinational circuits enabler decoder encoder

More information

LOGIC CIRCUITS. Basic Experiment and Design of Electronics

LOGIC CIRCUITS. Basic Experiment and Design of Electronics Basic Experiment and Design of Electronics LOGIC CIRCUITS Ho Kyung Kim, Ph.D. hokyung@pusan.ac.kr School of Mechanical Engineering Pusan National University Outline Combinational logic circuits Output

More information

MC9211 Computer Organization

MC9211 Computer Organization MC92 Computer Organization Unit : Digital Fundamentals Lesson2 : Boolean Algebra and Simplification (KSB) (MCA) (29-2/ODD) (29 - / A&B) Coverage Lesson2 Introduces the basic postulates of Boolean Algebra

More information

Combinational Logic. Lan-Da Van ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C.

Combinational Logic. Lan-Da Van ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Combinational Logic ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Fall, 2017 ldvan@cs.nctu.edu.tw http://www.cs.nctu.edu.tw/~ldvan/ Combinational Circuits

More information

CHAPTER 7. Solutions for Exercises

CHAPTER 7. Solutions for Exercises CHAPTER 7 Solutions for Exercises E7.1 (a) For the whole part we have: Quotient Remainders 23/2 11 1 11/2 5 1 5/2 2 1 2/2 1 0 1/2 0 1 Reading the remainders in reverse order we obtain: 23 10 = 10111 2

More information

Digital Electronics H H

Digital Electronics H H Electronics In digital circuits only two values of Vin or Vout are considered, Low (L) or High (H). The two values correspond to the logical states True (T) or False (F). CMOS AND circuit (L)ow voltage

More information

1. Basics of Information

1. Basics of Information 1. Basics of Information 6.004x Computation Structures Part 1 Digital Circuits Copyright 2015 MIT EECS 6.004 Computation Structures L1: Basics of Information, Slide #1 What is Information? Information,

More information

COE 202: Digital Logic Design Combinational Circuits Part 4. Dr. Ahmad Almulhem ahmadsm AT kfupm Phone: Office:

COE 202: Digital Logic Design Combinational Circuits Part 4. Dr. Ahmad Almulhem   ahmadsm AT kfupm Phone: Office: COE 202: Digital Logic Design Combinational Circuits Part 4 Dr. Ahmad Almulhem Email: ahmadsm AT kfupm Phone: 860-7554 Office: 22-324 Objectives Magnitude comparator Design of 4-bit magnitude comparator

More information

IT T35 Digital system desigm y - ii /s - iii

IT T35 Digital system desigm y - ii /s - iii UNIT - II Combinational Logic Adders subtractors code converters binary parallel adder decimal adder magnitude comparator encoders decoders multiplexers demultiplexers-binarymultiplier Parity generator

More information

Unit 7 Sequential Circuits (Flip Flop, Registers)

Unit 7 Sequential Circuits (Flip Flop, Registers) College of Computer and Information Sciences Department of Computer Science CSC 220: Computer Organization Unit 7 Sequential Circuits (Flip Flop, Registers) 2 SR Flip-Flop The SR flip-flop, also known

More information

CSCI 220: Computer Architecture-I Instructor: Pranava K. Jha. BCD Codes

CSCI 220: Computer Architecture-I Instructor: Pranava K. Jha. BCD Codes CSCI 220: Computer Architecture-I Instructor: Pranava K. Jha BCD Codes Q. Give representation of the decimal number 853 in each of the following codes. (a) 8421 code (c) 84(-2)(-1) code (b) Excess-three

More information

Introduction to Computer Engineering ECE 203

Introduction to Computer Engineering ECE 203 Introduction to Computer Engineering ECE 203 Northwestern University Department of Electrical Engineering and Computer Science Teacher: Robert Dick Office: L477 Tech Email: dickrp@ece.northwestern.edu

More information

We are here. Assembly Language. Processors Arithmetic Logic Units. Finite State Machines. Circuits Gates. Transistors

We are here. Assembly Language. Processors Arithmetic Logic Units. Finite State Machines. Circuits Gates. Transistors CSC258 Week 3 1 Logistics If you cannot login to MarkUs, email me your UTORID and name. Check lab marks on MarkUs, if it s recorded wrong, contact Larry within a week after the lab. Quiz 1 average: 86%

More information

WORKBOOK. Try Yourself Questions. Electrical Engineering Digital Electronics. Detailed Explanations of

WORKBOOK. Try Yourself Questions. Electrical Engineering Digital Electronics. Detailed Explanations of 27 WORKBOOK Detailed Eplanations of Try Yourself Questions Electrical Engineering Digital Electronics Number Systems and Codes T : Solution Converting into decimal number system 2 + 3 + 5 + 8 2 + 4 8 +

More information

12/31/2010. Digital Operations and Computations Course Notes. 01-Number Systems Text: Unit 1. Overview. What is a Digital System?

12/31/2010. Digital Operations and Computations Course Notes. 01-Number Systems Text: Unit 1. Overview. What is a Digital System? Digital Operations and Computations Course Notes 0-Number Systems Text: Unit Winter 20 Professor H. Louie Department of Electrical & Computer Engineering Seattle University ECEGR/ISSC 20 Digital Operations

More information

Combinational Logic. By : Ali Mustafa

Combinational Logic. By : Ali Mustafa Combinational Logic By : Ali Mustafa Contents Adder Subtractor Multiplier Comparator Decoder Encoder Multiplexer How to Analyze any combinational circuit like this? Analysis Procedure To obtain the output

More information

Fundamentals of Digital Design

Fundamentals of Digital Design Fundamentals of Digital Design Digital Radiation Measurement and Spectroscopy NE/RHP 537 1 Binary Number System The binary numeral system, or base-2 number system, is a numeral system that represents numeric

More information

LOGIC CIRCUITS. Basic Experiment and Design of Electronics. Ho Kyung Kim, Ph.D.

LOGIC CIRCUITS. Basic Experiment and Design of Electronics. Ho Kyung Kim, Ph.D. Basic Experiment and Design of Electronics LOGIC CIRCUITS Ho Kyung Kim, Ph.D. hokyung@pusan.ac.kr School of Mechanical Engineering Pusan National University Digital IC packages TTL (transistor-transistor

More information

ENEL Digital Circuit Design. Final Examination

ENEL Digital Circuit Design. Final Examination ELECTRICAL AND COMPUTER ENGINEERING ENEL 353 - Digital Circuit Design Final Examination Friday, December 17, 1999 Red Gymnasium, 3:30PM - 6:30 PM Instructions: Time allowed is 3 hours. The examination

More information

Introduction to Digital Logic Missouri S&T University CPE 2210 Subtractors

Introduction to Digital Logic Missouri S&T University CPE 2210 Subtractors Introduction to Digital Logic Missouri S&T University CPE 2210 Egemen K. Çetinkaya Egemen K. Çetinkaya Department of Electrical & Computer Engineering Missouri University of Science and Technology cetinkayae@mst.edu

More information

Chapter 2. Digital Logic Basics

Chapter 2. Digital Logic Basics Chapter 2 Digital Logic Basics 1 2 Chapter 2 2 1 Implementation using NND gates: We can write the XOR logical expression B + B using double negation as B+ B = B+B = B B From this logical expression, we

More information

Number System. Decimal to binary Binary to Decimal Binary to octal Binary to hexadecimal Hexadecimal to binary Octal to binary

Number System. Decimal to binary Binary to Decimal Binary to octal Binary to hexadecimal Hexadecimal to binary Octal to binary Number System Decimal to binary Binary to Decimal Binary to octal Binary to hexadecimal Hexadecimal to binary Octal to binary BOOLEAN ALGEBRA BOOLEAN LOGIC OPERATIONS Logical AND Logical OR Logical COMPLEMENTATION

More information

Building a Computer Adder

Building a Computer Adder Logic Gates are used to translate Boolean logic into circuits. In the abstract it is clear that we can build AND gates that perform the AND function and OR gates that perform the OR function and so on.

More information

CPE100: Digital Logic Design I

CPE100: Digital Logic Design I Professor Brendan Morris, SEB 3216, brendan.morris@unlv.edu CPE100: Digital Logic Design I Final Review http://www.ee.unlv.edu/~b1morris/cpe100/ 2 Logistics Tuesday Dec 12 th 13:00-15:00 (1-3pm) 2 hour

More information

EE40 Lec 15. Logic Synthesis and Sequential Logic Circuits

EE40 Lec 15. Logic Synthesis and Sequential Logic Circuits EE40 Lec 15 Logic Synthesis and Sequential Logic Circuits Prof. Nathan Cheung 10/20/2009 Reading: Hambley Chapters 7.4-7.6 Karnaugh Maps: Read following before reading textbook http://www.facstaff.bucknell.edu/mastascu/elessonshtml/logic/logic3.html

More information

ECE 2300 Digital Logic & Computer Organization

ECE 2300 Digital Logic & Computer Organization ECE 23 Digital Logic & Computer Organization Spring 28 Combinational Building Blocks Lecture 5: Announcements Lab 2 prelab due tomorrow HW due Friday HW 2 to be posted on Thursday Lecture 4 to be replayed

More information

Lecture 2 Review on Digital Logic (Part 1)

Lecture 2 Review on Digital Logic (Part 1) Lecture 2 Review on Digital Logic (Part 1) Xuan Silvia Zhang Washington University in St. Louis http://classes.engineering.wustl.edu/ese461/ Grading Engagement 5% Review Quiz 10% Homework 10% Labs 40%

More information

Propositional Logic. Logical Expressions. Logic Minimization. CNF and DNF. Algebraic Laws for Logical Expressions CSC 173

Propositional Logic. Logical Expressions. Logic Minimization. CNF and DNF. Algebraic Laws for Logical Expressions CSC 173 Propositional Logic CSC 17 Propositional logic mathematical model (or algebra) for reasoning about the truth of logical expressions (propositions) Logical expressions propositional variables or logical

More information

Binary addition (1-bit) P Q Y = P + Q Comments Carry = Carry = Carry = Carry = 1 P Q

Binary addition (1-bit) P Q Y = P + Q Comments Carry = Carry = Carry = Carry = 1 P Q Digital Arithmetic In Chapter 2, we have discussed number systems such as binary, hexadecimal, decimal, and octal. We have also discussed sign representation techniques, for example, sign-bit representation

More information

Combinational Logic Fundamentals

Combinational Logic Fundamentals Topic 3: Combinational Logic Fundamentals In this note we will study combinational logic, which is the part of digital logic that uses Boolean algebra. All the concepts presented in combinational logic

More information

Reg. No. Question Paper Code : B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER Second Semester. Computer Science and Engineering

Reg. No. Question Paper Code : B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER Second Semester. Computer Science and Engineering Sp 6 Reg. No. Question Paper Code : 27156 B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2015. Second Semester Computer Science and Engineering CS 6201 DIGITAL PRINCIPLES AND SYSTEM DESIGN (Common

More information

UNSIGNED BINARY NUMBERS DIGITAL ELECTRONICS SYSTEM DESIGN WHAT ABOUT NEGATIVE NUMBERS? BINARY ADDITION 11/9/2018

UNSIGNED BINARY NUMBERS DIGITAL ELECTRONICS SYSTEM DESIGN WHAT ABOUT NEGATIVE NUMBERS? BINARY ADDITION 11/9/2018 DIGITAL ELECTRONICS SYSTEM DESIGN LL 2018 PROFS. IRIS BAHAR & ROD BERESFORD NOVEMBER 9, 2018 LECTURE 19: BINARY ADDITION, UNSIGNED BINARY NUMBERS For the binary number b n-1 b n-2 b 1 b 0. b -1 b -2 b

More information

Lecture 6: Gate Level Minimization Syed M. Mahmud, Ph.D ECE Department Wayne State University

Lecture 6: Gate Level Minimization Syed M. Mahmud, Ph.D ECE Department Wayne State University Lecture 6: Gate Level Minimization Syed M. Mahmud, Ph.D ECE Department Wayne State University Original Source: Aby K George, ECE Department, Wayne State University Contents The Map method Two variable

More information

Optimal design of 2-Bit Optical Magnitude Comparator using electro-optic effect inside Mach-Zehnder interferometers

Optimal design of 2-Bit Optical Magnitude Comparator using electro-optic effect inside Mach-Zehnder interferometers Proceedings of the Second International Conference on Research in DOI: 10.15439/2017R93 Intelligent and Computing in Engineering pp. 15 20 ACSIS, Vol. 10 ISSN 2300-5963 Optimal design of 2-Bit Optical

More information

Binary addition example worked out

Binary addition example worked out Binary addition example worked out Some terms are given here Exercise: what are these numbers equivalent to in decimal? The initial carry in is implicitly 0 1 1 1 0 (Carries) 1 0 1 1 (Augend) + 1 1 1 0

More information