Comparison of Device Performance and Measured Transport Parameters in Widely-Varying Cu(In,Ga) (Se,S) Solar Cells

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1 PROGRESS IN PHOTOVOLTAICS: RESEARCH AND APPLICATIONS Prog. Photovolt: Res. Appl. 2006; 14:25 43 Published online 5 October 2005 in Wiley InterScience ( DOI: /pip.654 Research Comparison of Device Performance and Measured Transport Parameters in Widely-Varying Cu(In,Ga) (Se,S) Solar Cells I. L. Repins 1 *,y, B. J. Stanbery 2, D. L. Young 3,S.S.Li 4, W. K. Metzger 3, C. L. Perkins 3, W. N. Shafarman 5, M. E. Beck 6, L. Chen 7, V. K. Kapur 8, D. Tarrant 9, M. D. Gonzalez 1, D. G. Jensen 1, T. J. Anderson 4, X. Wang 4,L.L.Kerr 4, B. Keyes 3, S. Asher 3, A. Delahoy 7 and B. Von Roedern 3 1 ITN Energy Systems, Inc., 8130 Shaffer Parkway, Littleton, CO , USA 2 HelioVolt Corp., 1101 S. Capital of Texas Hwy, Suite 100F, Austin, TX , USA 3 National Renewable Energy Laboratory, 1617 Cole Blvd., Golden, CO 80401, USA 4 University of Florida, Gainesville, FL 32611, USA 5 Institute for Energy Conversion, University of Delaware, 451 Wyoming Rd, Newark, DE 19716, USA 6 Global Solar Energy, Inc., 5575 S. Houghton Rd, Tucson, AZ 85747, USA 7 Energy Photovoltaics, Inc., 276 Bakers Basin Rd, Trenton, NJ 08648, USA 8 International Solar Electric Technology, 8635 Aviation Blvd., Inglewood, CA 90301, USA 9 Shell Solar Industries, 4650 Adohr Lane, P.O. Box 6032, Camarillo, CA 93012, USA We report the results of an extensive study employing numerous methods to characterize carrier transport within copper indium gallium sulfoselenide (CIGSS) photovoltaic devices, whose absorber layers were fabricated by diverse process methods in multiple laboratories. This collection of samples exhibits a wide variation of morphologies, compositions, and solar power conversion efficiencies. An extensive characterization of transport properties is reported here including those derived from capacitance voltage, admittance spectroscopy, deep level transient spectroscopy, time-resolved photoluminescence, Auger emission profiling, Hall effect, and drive level capacitance profiling. Data from each technique were examined for correlation with device performance, and those providing indicators of related properties were compared to determine which techniques and interpretations provide credible values for transport properties. Although these transport properties are not sufficient to predict all aspects of current-voltage characteristics, we have identified specific physical and transport characterization methods that can be combined using a model-based analysis algorithm to provide a quantitative prediction of voltage loss within the absorber. The approach has potential as a tool to optimize and understand device performance irrespective of the specific * Correspondence to: Dr Ingrid Repins, ITN Energy Systems, 8130 Shaffer Pkwy, Littleton, CO , USA. y supervacuo@aol.com Contract/grant sponsor: US Department of Energy. Received 22 November 2004 Copyright # 2005 John Wiley & Sons, Ltd. Revised 25 April 2005

2 26 I. L. REPINS ET AL. process used to fabricate the CIGSS absorber layer. Copyright # 2005 John Wiley &Sons,Ltd. key words: CIGSS; transport; characterization; correlation; thin-film photovoltaics INTRODUCTION Photovoltaics (PV) utilizing the semiconductor alloy copper indium gallium selenide (CIGS, or when including sulfur, CIGSS), are currently the most efficient converter of solar energy to electrical power of any type of thin-film device. 1 Thin-film PV has the potential to significantly reduce the cost of solar power by reducing the required amount of expensive semiconductor material, compared with the semiconductor wafer-based technologies that currently dominate the rapidly growing multi-billion dollar global PV industry. 2 Transferring this performance advantage from development laboratories into cost-effective manufacturing will improve the prospects for CIGSS to make a significant contribution to the world s future electrical power needs. The National Renewable Energy Laboratory s Thin Film Photovoltaic Partnership Program (TFPPP) has organized stakeholders from government laboratories, universities, and industry into a team to conduct collaborative research with the goal of furthering the commercial success of CIGSS PV technology. The team s participants employ a diverse array of semiconductor processing methods, resulting in a commensurate diversity of physical properties amongst the team members CIGSS optical absorber films. This represents both a challenge and an opportunity for the team to uncover common characteristics that influence the performance of CIGSS PV devices, irrespective of their method of production. The optimization of both device designs and processing methods for any electronic device requires systematic disentanglement of the interactions between the different steps in each process. Changes in raw materials or process parameters in one step can change the properties of the intermediate components. The effects then propagate and optimization of subsequent process steps changes. The key to sorting out these interactions during product development is the identification of appropriate characterization methods for the product and process at each step that exhibit a clear correlation between the measurement result and the device s resulting properties. These same characterization techniques often become the foundation of quality or process control measures upon the transition from development into manufacturing. The development of materials and device characterization methods applicable to CIGSS PV is an active field of research; however, a consistent link between device performance and materials characterization has remained elusive. Even the studies that have been the most successful at relating materials characterization to device performance have been limited to closely related samples from a single laboratory, using only one deposition method, and with process variations limited to a single variable. 3 7 Prior studies by this TFPPP CIS Team of physical materials properties (via secondary ion mass spectrometry, surface and cross-sectional scanning electron microscopy, Auger electron spectroscopy, and X-ray photoelectron spectroscopy) have shown no discernable correlation between these and performance that is applicable to CIGSS made by diverse methods. The tenuous link between CIGSS material properties and device performance results in a frustrating lack of robust tools and methods for process feedback and control when navigating uncharted process space in manufacturing. Thus, our challenge in this study was to identify measurable properties of CIGSS materials or devices that exhibit strong correlation with PV performance irrespective of the processing method used to make the absorber layer. The lack of any quantitative cross-correlation between measurements performed during the prior Team study led the Team to limit this follow-up study to properties with a fairly direct translation to electrical transport parameters. This choice was expected to increase the likelihood of obtaining data useful for quantitative predictions of device performance via transport models, irrespective of the absorber growth process. The characterization techniques selected for investigation in this study are detailed in the next section of this report, and can be broadly categorized as those applicable to bare absorbers or those that require a completed device.

3 DEVICE PERFORMANCE AND TRANSPORT PARAMETERS 27 The goal of this study was to identify measurement and data analysis techniques that provide predictors of device performance, on the scale of variations seen between devices in the study. The goal is not to generate precise fits to the data by employing a large number of fitting parameters. The authors believe that significant progress toward the study goal has been achieved through development of novel data analysis and modeling procedures that combine results from multiple measurement techniques. We present herein our evidence that these methods can describe some aspects of major performance differences between CIGS devices fabricated utilizing widely varying techniques. We also present characterization data that we were unable to relate to device performance, since, in the search for techniques that provide predictors of device performance, lack of correlation can be a useful guide for designing future studies. EXPERIMENTAL Sample set Samples used in this study were chosen from four industrial and two laboratory groups. The selected samples are not intended to represent a champion device from a given process or group. Rather, they are intended to represent the variety of absorbers that might be encountered in measurements, interpretation, diagnostics, and manufacturing. Each sample is described below. Three-stage batch co-evaporated CIGS on Mo-coated glass was provided by the National Renewable Energy Laboratory (NREL). 1 The procedures for fabricating CIGS absorbers by the three-stage process have been reported previously. 8 Compositional control was achieved by detecting the temperature change of the substrate during the Cu-poor to Cu-rich transition at the end of the second stage. The NREL absorber is referred to as sample A in this study. CIGS fabricated on Mo-coated glass by a hybrid co-evaporation/sputtering process 9 was provided by Energy Photovoltaics, Inc. (EPV). In this process, In and Ga are first evaporated in the presence of Se. The first layer is followed by sputtered Cu, and the film is selenized in Se vapor. In the final stage, In and Ga are once again evaporated in the presence of Se. The EPV absorber is referred to as sample B in this study. Co-evaporated CIGS on Mo-coated stainless steel was provided by Global Solar Energy, Inc. The Global Solar process is essentially three-stage, in that group III atoms are deposited first, then Cu, followed by enough group III atoms to bring the film to its desired stoichiometry. Deposition is performed onto continuously advancing 36 cm 300 m rolls of stainless steel foil at high deposition rates. 10 The Global Solar absorber is referred to in this study as sample C. CIGSS formed on Mo-coated glass by non-vacuum processes was provided by International Solar Electric Technologies (ISET). ISET s CIGS absorber is prepared by applying a mixed oxide precursor coating on a metallized glass substrate via a non-vacuum knife coating technique. The precursor coating is deposited using a water-based ink which contains nanoparticles of mixed oxides. After drying, the precursor ink is reduced under an atmosphere of H 2 and N 2 gas mixture to obtain a uniform and a smooth coating of Cu In Ga alloys. The resulting alloy coating is further selenized under an atmosphere of H 2 Se and H 2 S gases. This patented process 11 is described in detail 12 elsewhere and has been used to fabricate CIGS solar cells on both rigid and flexible substrates 13 The ISET absorber is referred to in this study as sample D. Selenized CIGSS was provided by Shell Solar Industries (SSI). Fabrication of these selenized devices involves sputtering a stacked precursor from alloyed Cu Ga and In targets, then selenization in H 2 Se at elevated temperature, followed by sulfurization in H 2 S at elevated temperature. 14 Depositions and reactions are performed on 3900 cm 2 panes of soda-lime glass coated with a SiO 2 diffusion barrier and Mo back contact. The SSI absorber is referred to in this study as sample E. Two-stage batch co-evaporated CIGS on Mo-coated glass was provided by the Institute for Energy Conversion (IEC). In this process, elemental Cu, In, Ga, and Se fluxes are independently controlled to provide a Cu-rich total flux, Cu/(In þ Ga) > 1, at the start of the run. Then In, Ga, and Se fluxes only are applied until the desired final composition, Cu/(In þ Ga) ¼ 08 09, is attained. 15 The films are deposited at a 550 C substrate temperature with 25 mm thickness, and exhibit uniform elemental composition through their thickness. 16 The IEC absorber is referred to in this study as sample F.

4 28 I. L. REPINS ET AL. The absorbers in this study include varying S and Ga contents. In the text hereafter, to simplify notation, the sample set will be referred to as CIGSS, even though only samples D and E contain S. To facilitate evaluation of the role of the absorber in device performance, all absorbers were sent to IEC for standard window and buffer layer application. Standard device finishing was achieved via the following process steps: 1. Absorber layer samples were rinsed in de-ionized water but received no other pre-treatment. Then CdS was deposited by chemical bath. Specifically, samples were immersed in an alkaline aqueous solution containing 0015 M CdSO 4,075 M SC(NH 2 ) 2, and 14 M NH 4 0H, with the temperature ramped up to 60 C and held for a total of 12 min. 2. ZnO and indium tin oxide (ITO) layers were deposited sequentially in a single deposition using RF sputtering. The undoped ZnO layer was sputtered in a pure Ar plasma and was 50 nm thick with resistivity 1 10 cm. The ITO layer was deposited in Ar with a small < 1% partial pressure of O 2. The total film is 150 nm thick with a sheet resistance of 25 /square. 3. Grids were deposited by electron-beam evaporation. Grids consist of a 50-nm-thick layer of Ni followed by a 2-mm-thick Al layer. 4. Cell areas were defined by mechanical scribing to delineate cells with 047 cm 2 total area and six cells on a cm substrate. Use of identical window layers for each sample insures that differences between samples in reflection, window and buffer layer absorption, and grid/transparent conducting oxide resistance are minimized, thus allowing the most straightforward possible comparison of absorber effects. A portion of each absorber was also set aside for measurements requiring bare absorber. It should be noted that no attempt was made to control the time between Cu(InGa)Se 2 deposition and device fabrication. All samples except F were shipped to IEC. Measurement techniques and results A variety of measurements to extract transport parameters were performed on devices and bare absorbers. For devices, the measurements performed were current voltage (IV), quantum efficiency (QE), deep level transient spectroscopy (DLTS), time-resolved photoluminescence (TRPL), capacitance voltage (CV), admittance spectroscopy (AS), and drive-level capacitance profiling (DLCP). For bare absorbers, the measurements performed were Auger emission spectroscopy profiling (AES), time-resolved photoluminescence (TRPL), and Hall effect. Results from each technique, and the merits and caveats associated with the technique, are described in the following sub-sections. Comparison of characterization data with device performance, and among different techniques that extract related quantities, is described in the Discussion section. Current voltage and quantum efficiency Current voltage measurements were performed on all samples under standard illumination conditions 17 (100 mw/cm 2, AM15 spectrum, at 25 C) and in the dark. Measurements included an up-sweep (increasing voltage) and a down-sweep (decreasing voltage) over 1 min to test for hysteresis, as an indication of transient effects in the solar cells. The results for the best cell from each sample are summarized in Table I, and the dark and light J V curves are shown in Figure 1. All parameters are based on total (rather than active) cell area. In Table I. Current voltage parameters for the best cells from samples A F. All measurements are based on total area Sample Efficiency V OC J SC Fill factor R OC G SC (%) (V) (ma/cm 2 ) (%) (-cm 2 ) (ms/cm 2 ) A B C D E F

5 DEVICE PERFORMANCE AND TRANSPORT PARAMETERS 29 Figure 1. J V curves under illumination and in the dark for the best devices from samples A F Figure 2. QE curves under white light bias at 0V for the best devices from samples A F this table R OC dv/dj at J ¼ 0 is equal to the series resistance plus a diode term and G SC dj/dv at V ¼ 0 gives an indication of the shunt conductance. 18 Efficiencies range from 8 to 16%. Some qualitative observations can be made from Figure 1. Samples D, E, and F all show hysteresis in the dark J V curves, but none of the samples shows hysteresis under illumination. Samples B and D have large shunt losses, as indicated by G SC ¼ 7 and 11 ms/cm 2 and the noticeable leakage in reverse bias for both the dark and light J V curves. Sample E, on the other hand, has G SC ¼ 5 ms/cm 2 in the light but the dark J V curve is flat, indicating that the slope at zero-bias is not a simple shunt. Quantum efficiency (QE) measurements were performed using a grating-monochromator-based system 17 with 100 mw/cm 2 white light bias. The QE curves at 0V are shown in Figure 2. Measurements were also done at both forward and reverse voltage biases. Most of the cells showed little difference with reverse bias. The primary exception was sample E in which the response at 1V was greater than at 0V and the difference increased with increasing wavelength. This dependence suggests a loss due to poor collection of minority carriers, especially those generated deep in the absorber layer. 18 Because SSI (E) absorbers finished at IEC were found to have significantly lower fill factors and currents than devices typically produced at SSI, SSI absorbers finished into devices at SSI (E2) and SSI absorbers finished into devices at NREL (E3) were compared with sample E. All three device finishing processes utilize bathdeposited CdS. However, the E2 device finishing process involves chemical vapor deposition (CVD) of boron-doped ZnO, whereas the E and E3 processes utilize RF sputtered resistive ZnO, then RF sputtered ITO or conductive ZnO, respectively. E2 and E3 devices were measured at NREL under standard illumination, and the comparison is shown in Figure 3. Device parameters are tabulated in the inset. The E2 process clearly provides some beneficial modifications to the CIGSS absorber or surface, despite the fact that record devices 1

6 30 I. L. REPINS ET AL. Figure 3. Light and dark I V data for absorber E with different window layers have utilized the E3 device finishing process. In order to limit the number of variables, only devices with identical window layers (A, B, C, D, E, F) are included in the study. However, the comparison of the E, E2, and E3 devices suggests that one difficulty in predicting device performance from CIGSS absorber measurements may be related to changes induced in the absorber by subsequent processing. Hall effect Standard Hall effect and Van der Pauw resistance 19 measurements were employed to determine the hole concentration and mobility in the CIGSS films. Ohmic contacts to the 2 2 cm samples were made using four small indium dots placed at the corners of the samples and annealed at 160 C in air. Contact quality was verified by observing linearity in the current voltage characteristics. The Hall voltage was measured using a constant magnetic field of 3000 G, at room temperature. Hall measurements were performed using a computer-controlled measurement system. To sustain a Hall voltage laterally across the CIGSS film, samples must not be supported by a conductive substrate. Thus, the portions of samples A, B, and D used for Hall effect measurements were deposited on bare soda-lime glass, rather than on Mo-coated soda-lime glass. Sample C was deposited on stainless steel as usual, then peeled from the steel after coating with epoxy. Hall effect was not measured on samples E and F, as these films were not available on insulating substrates. Table II shows a summary of the Hall measurement results, including the hole concentration, Hall mobility, and resistivity data. Order of magnitude variations over the sample group are evident in each quantity. Possible complications in interpretation of the Hall effect data include contribution from mixed carrier types, differences in films grown without Mo versus under standard conditions, changes to films during subsequent window layer processing, measurement direction being perpendicular to current flow in the device, and separation of grain boundary versus bulk properties. 20 Table II. Results of Hall effect measurements for CIGSS samples Sample Hole concentration Hall mobility Resistivity Film type (cm 3 ) (cm 2 /V s) ( cm) A p-type B p-type C p-type D p-type

7 DEVICE PERFORMANCE AND TRANSPORT PARAMETERS 31 Figure 4. Carrier density as a function of distance from junction, as derived from CV measurements CV Standard capacitance voltage (CV) measurement and analysis techniques 21,22 were utilized to extract carrier density from devices. A Hewlett-Packard 4192A LF impedance analyzer was utilized to measure capacitance as a function of voltage, at room temperature, over the biases from 1 to015 V. Modulation voltage was 01V, and measurement frequency was 100 khz. Carrier densities as a function of distance from the junction, as derived from CV data, are shown in Figure 4. Zero bias depletion width is marked with a diamond for each sample. The basic CVanalysis of Figure 4 does not distinguish between the expected response from shallow acceptors and unintended response from deep levels. The hump in carrier density plotted against distance as is prominent for samples C, D, E, and F is a signature of the measurement responding to deep states near the interface. AS Admittance spectroscopy (AS) was used to analyze defect density and level following the method of Walter et al. 23 A Hewlett-Packard 4192A LF impedance analyzer was utilized to measure capacitance as a function of frequency (CF). CF scans were measured in the dark from 500 to 250 khz, at temperatures ranging from 180 K to room temperature. Modulation voltage was 01 V, and measurements were performed at zero voltage bias. Cooling was performed by adjusting flow of liquid nitrogen through a thermocouple-monitored cold chuck. Defect densities derived from AS are shown in Figure 5. Data points of one shading are used for each sample, with different shapes used for the different temperature CF scans on that sample. For samples C and F, no clear peaks in the differentiated capacitance spectra 24 were apparent, and thus assignment of the escape frequency (x-axis placement) to these samples is questionable. For all samples, approximations regarding the location of band-bending and magnitude of built-in voltage change the scale of the y-axis by the same factor. 23 Thus, derived defect densities should not be considered absolute. The inset of Figure 5 shows total measured defect density for each sample. The straight lines on the graph outline the areas used for integration of total measured defect densities. These integrated defect densities are roughly proportional to net change in capacitance (i.e., the difference between the highest capacitance, measured at lowest frequency and highest temperature, and the lowest capacitance, measured at highest frequency and lowest temperature). One difficulty in interpreting AS data is that the measurement responds to both bulk and interface defects. The analysis leading to Figure 5 assumes bulk defects. If the detected defects are in fact located at the CdS/ CIGSS interface, the apparent defect energy may actually be an indicator of the position of the Fermi level at the interface. 25 Well-defined defect activation energies are apparent in four devices of Figure 5, ranging from 0105 to 0540 ev. These energies exhibit a linear relationship with escape frequencies, constituting Meyer Neldel behavior. 26

8 32 I. L. REPINS ET AL. Figure 5. Defect density as measured by admittance spectroscopy. Data are separated onto two axes of identical scale to allow clear presentation of otherwise overlapping data points. Inset shows integrated defect densities DLCP To extract and separate bulk defect densities, free carrier densities, and interface response, DLCP 27 measurements were performed and supplemented with CV data, applying the methods of Heath et al. 28,29 DLCP measurements were taken with DC bias values ranging from 02 toþ05 volts, with the drive-level amplitude varying between 006 and 012 V, at a frequency of 10 khz. Samples were mounted in a dark cryostat with blow-by liquid nitrogen cooling. Representative data for the drive-level density N DL, are shown in Figure 6. It is assumed that, due to the high n-type doping concentration in the CdS window layer, the depletion region is almost entirely in the CIGSS, and thus the N DL values determined by DLCP are representative of the CIGSS. The upper graph shows N DL as a function of voltage bias, whereas the lower graph gives N DL as a function of the estimated distance from the junction, W. W for each N DL value is calculated from the capacitance C ¼ "A/W at each DC bias, where the dielectric constant " ¼ 115" o, and A is the area of the cell. W is termed an estimated distance, as its value can be affected by charged layers near the interface or large shallow doping densities. However, these issues do not affect the measurement accuracy of N DL itself. 28 DLCP data at high temperatures yield an N DL value equal to the free-carrier density plus the deep-defect density. DLCP data at low temperature yield an N DL value equal to the free-carrier density only. Neither quantity is sensitive to interface states. Thus, a subtraction of the low-temperature N DL value from the high-temperature N DL value yields the absorber defect density. These important quantities are listed for each sample in Table III. In Table III, free-carrier and defect densities are reduced to a single value, rather than a profile with some spatial dependence. This reduction was performed as follows: For samples A, B, and F, N DL values were utilized at the largest depletion width probed by both a high-temperature and low-temperature scan. For samples C, D, and E, this methodology is impractical, as each temperature appears to probe a different range of distances from the junction. Thus, for these samples, zero-bias N DL data were utilized. The necessity of using a zero-bias reference point for some samples, in addition to the compositional gradients, complicate the interpretation of the DLCP(T) data to some degree. However, this uncertainty is likely smaller than the difference between the samples, since, within the sample set, the defect densities and the freecarrier densities vary by two orders of magnitude. In addition, using a technique implied by the work of Heath et al. 28 an estimate of the contribution of interface states to the CV data for each sample was extracted. This method involves a subtraction of DLCP-derived defect densities at high temperatures from CV-derived carrier densities. The resulting value is a relative measure of contribution from interface states to the capacitance signal, and is shown in the third column of Table III. There is a large variation in interface state response between the samples. The samples with higher interface response generally exhibit higher bulk defect densities and lower free-carrier concentrations.

9 DEVICE PERFORMANCE AND TRANSPORT PARAMETERS 33 Figure 6. DLCP-determined bulk defect densities as a function of bias (upper graph) and depletion width (lower graph), for samples A, D, F at selected temperatures Table III. Summary of quantities derived from DLCP measurements Sample Free carriers Defect density Interface state response (cm 3 ) (cm 3 ) (relative units) A B C D E F DLTS Deep-level transient spectroscopy (DLTS), originally developed by Lang, 30 was used to characterize electrically active defects in the depletion region. The DLTS technique provides information on defect density, energy level, and capture cross-section by observing the capacitance transient associated with the return to thermal equilibrium following an applied non-equilibrium condition. Two CIGSS samples in this study, A and B, were characterized by DLTS. Other samples in the set did not produce valid DLTS data because of high leakage currents. Measurements on sample A were carried out using a pulse height of 04 V, a reverse bias of 05 V, and a

10 34 I. L. REPINS ET AL. Table IV. Summary of the DLTS analysis for samples A and B Sample A Sample B Approximate peak temperature (K) DLTS peak sign ( þ ) (þ ) (þ ) ( ) Trap carrier type Minority (electron) Minority (electron) Minority (electron) Majority (hole) Trap activation energy E a (ev) E c 007 E v þ 094 Trap density N T (cm 3 ) Capture cross section (cm 2 ) Net hole density N a (cm 3 ) saturation pulse width of 10 ms. Measurements on sample B were obtained using a pulse height of 03V, a reverse bias of 01 V, and a saturation pulse width of 10 ms. Temperatures were varied for both samples from 75 to 300 K. DLTS analysis reveals three shallow-level electron traps in the sample A and one deep-hole trap in sample B, with densities about two orders of magnitude lower than the hole density in the absorbers. A summary of the DLTS results is given in Table IV. A more detailed description of the DLTS characterization of samples A and B has been reported elsewhere. 31,32 For sample A, an electron trap peak at T 100 K was observed, with an activation energy of E c -007 ev, where E c is the conduction band edge energy. The trap density was estimated to be N T ¼ cm 3. DLTS scans performed at higher temperatures showed another possible peak; however, the activation energy for that trap could not be resolved by heating the sample above 300 K due to the presence of a large leakage current in the cell at higher temperature. Thus, only shallow electron traps were observed in sample A. Sample B, in contrast, exhibited a deep hole trap at T 270 K, with an activation energy of E v þ 094 ev, where E v is the energy at the valence band edge. The average hole density obtained from CV measurement at 270 K was found to be N A ¼ cm 3. The hole trap density was found to be N T ¼ cm 3. It is difficult to assign the detected trap levels to specific defect origins reported in the literature without further evidence and confirmation by complementary diagnostic techniques. It should also be noted that trap densities may be underestimated due to electrostatic barriers causing difficulty in filling states. 33 PL and TRPL The samples were characterized at room temperature with energy-resolved photoluminescence (PL) and time-resolved photoluminescence (TRPL). The PL technique used a steady-state HeNe laser (6328nm) excitation source and an InGaAs diode array or silicon charge-coupled device (CCD) array detector. The laser power was 10 mw and the spot size was about 025 mm in diameter. This resulted in an excitation density of about 20 W/cm 2. TRPL was performed using time-correlated single-photon counting. 34 The excitation source was a cavitydumped dye laser pumped by a mode-locked Nd:YAG laser. The output of this system was a 1-MHz pulse train of 6-ps-wide pulses at a wavelength of either 631 or 650 nm. The average excitation power was 01 and 10 mw, corresponding to an initial excitation density of approximately and photons/cm 2 for each pulse, respectively. The time-dependent photoluminescence, at a wavelength equal to the peak of the measured PL spectrum, was detected with a photomultiplier tube having a minimum system response of about 100 ps. The PL decay time TRPL was determined by fitting the single exponential function I PL ðtþ ¼I PL ðt ¼ 0Þexpð t= TRPL Þ ð1þ to the initial section of the decay curve. It is important to note that the decay curves can be influenced by several factors, including diffusion processes, trapping effects, grain boundaries, free surface recombination, and bulk recombination. Of particular importance in a study with such a diverse sample set is the recognition that each individual growth process (i.e., sample) can have its own unique set of relative contributions from the various recombination mechanisms. Separation of these components can be difficult, even for a single growth process

11 DEVICE PERFORMANCE AND TRANSPORT PARAMETERS 35 Table V. Summary of room-temperature TRPL lifetimes under different measurement conditions Sample type: Absorber Absorber Device Device Illumination Power: 100 mw 10 mw 100 mw 10 mw Lifetime (ns) Lifetime (ns) Lifetime (ns) Lifetime (ns) Absorber A Absorber B Absorber C Absorber D Absorber E Absorber F Not available Not available A summary of TRPL lifetimes is shown in Table V. Decay times measured with pulses containing roughly photons/cm 2 varied from 03 to29 ns on the absorber layers, whereas the devices consistently had larger decay times which ranged from 09 to 49 ns. Computer modeling indicates that an increase in the PL decay time and the PL intensity cannot be attributed to the junction. 38 Instead, it appears that for all of the technologies represented in this sample set, the window layer and additional processing reduce recombination and alter the ordering of lifetimes from least to greatest. The PL decay times vary little. For comparison, highquality unintentionally doped epitaxial GaAs thin films typically have TRPL decay times that range from 50 ns to 20 ms in low injection, and can decrease by a factor of 100 upon increasing the injection level by two orders of magnitude. The injection dependence, poor radiative efficiency, and fast decay times of CIGSS indicate that recombination is dominated by nonradiative processes. Auger Profiling and Band Gap AES measurements were conducted using a Physical Electronics 670 field-emission scanning Auger spectrometer. Data were obtained with a 5 kv, 20 na primary electron beam which was rastered over 400 mm 2 of the sample. Analyses were made with the sample normal tilted 30 with respect to the coaxial electron beam and analyzer. An ion beam of 3 kevar þ at a current density of 20 ma/cm 2 was used for sputter profiling, yielding a sputter rate of 450 Å/min. Sensitivity factors for Cu, In, Ga, and Se were calculated using the steady-state AES peak-to-peak signals achieved by sputtering a companion piece to film F, for which the bulk compositions were determined from energy-dispersive x-ray spectroscopy (EDX) data. A film like F was used for this purpose because AES sputter profiles demonstrated that it was not graded in composition, as are most other CIGSS absorbers. Although Ar þ sputtering of CIGSS is known to reduce the surface and produce a thin over-layer of metallic indium and gallium, the method of determining sensitivity factors used was identical to sputter profiling experiments on unknown samples. This results in the effect of the metal-rich layer at the surface on the measured composition being incorporated into the sensitivity factors themselves. The measured AES compositions as a function of depth were used to calculate the Cu(In 1 x,ga x )(S y Se 1 y ) 2 band gap profiles according to the following: 39 E gap ¼ 095 þ 08x 017xð1 xþþ07y 005yð1 yþ ð2þ (It should be noted that in reference 39 there is a typographical error in the definitions of x and y, which here are shown in their corrected forms.) Figure 7 is a plot of the bandgap profiles calculated from the AES compositions for the six films studied. The endpoints of sputter profiles and of band gap profile determinations were taken as the point at which the Mo concentration in the film exceeded 25 atom %. The increased band gaps towards the back of films A and C reflect the increased concentration of gallium found near the back contact in these films. Films D and E, which were partially sulfurized, had larger bandgaps near the back contact because of increased concentrations of both sulfur and gallium. Sulfur levels in sample D approached 30% of the total chalcogen content, whereas in sample E they reached 46%. Films B and F are both seen to have bandgap profiles that vary little through the films.

12 36 I. L. REPINS ET AL. Figure 7. Bandgap profile as derived from composition Modeling In this study, modeling is used to quantify the predicted effects of changing transport parameters on current voltage characteristics. Modeling is not used to derive parameters by fits to current voltage data. ADEPT 40 software was used to provide numerical solutions the Poisson and continuity equations, including Shockley Read Hall recombination specified by cross-sections and densities of mid-gap defects. Models describing each sample in the set can be expected to require varying inputs for CIGSS bandgap profile, defect properties (density, and cross-section), carrier density, and mobility. Baseline parameter values were set according to the guidelines recommended by Gloeckler et al. 41 Where justified by measurement results, as noted in the following discussion, modeling input parameters were varied to estimate the impact of measured film property variations on performance. This method of estimating a change in performance from a change in modeling input parameters can be executed with a knowledge of input parameters that is, as necessary for polycrystalline CIGSS, only partially complete. DISCUSSION The data described in the previous section were analyzed with two objectives. First, data from each technique were examined for demonstrated effect on device performance. Second, for measurements that provide

13 DEVICE PERFORMANCE AND TRANSPORT PARAMETERS 37 indicators of related properties, consistency was examined to determine which measurements and interpretations provide a credible value for transport properties. Current voltage response and bandgap profile Correlations between bandgap profile, open-circuit voltage, and short-circuit current are among the most wellunderstood and well-documented transport relationships for CIGSS. Thus, a logical starting point for the data analysis is an examination of how fully measured bandgap profiles alone can account for differences in opencircuit voltage and short-circuit current observed in this sample set. To answer this question, the 115 ev bandgap in the baseline model of reference 41 was replaced by each of the measured bandgap profiles of Figure 7. The currents and voltages output by each resulting model were compared with measured values for the corresponding device. The modeled currents and voltages represent the values one would expect to obtain if bandgap profile were the only difference between the samples. Rough agreement between variations in measured and modeled J sc values is illustrated in Figure 8(a). The dashed line in Figure 8(a) has a slope of 1. The modeled values are sensitive to window layer absorption and the choice of parameters in composition-to-bandgap conversion. A small change in any of these parameters can increase (or decrease) all modeled values in the data set by the same amount. Thus, the offset between measured and modeled values that is observed in Figure 8(a) is almost certainly a function of the aforementioned parameter set choice. The average distance between the data points and the slope ¼ 1 line is about 2% of J sc and is therefore considered a relatively good fit. Device E is not included in the comparison because the very low maximum QE (Figure 2), combined with the severe dependence of current and fill factor (Figure 3) on window layer processing, suggest that in this device collection may be dominated by an effect only partially related to the absorber. Short-circuit current is a function mainly of the minimum bandgap, 42,43 with smaller dependencies on other aspects of the band profiling. 44,45 The strong dependence of short-circuit current on minimum, rather than average, bandgap provides a plausible explanation for some scatter between the measured and modeled values. The average y distance between the data points and the perfect agreement line is just under 07 ma/cm 2, which translates to about 002 ev in bandgap. Some consecutive AES points differ by more than 002 ev in this study. Thus, the bandgap gradients, in combination with AES spatial resolution, may introduce some scatter into the determination of minimum bandgap value and thus the model-predicted J sc. Comparisons of J sc with PL peak wavelength and quantum efficiency cut-off wavelength yield correlations with amounts of scatter similar to the comparison of modeled and measured J sc. Figure 8. Measured and expected: (a) short-circuit current; (b) open-circuit voltage

14 38 I. L. REPINS ET AL. Table VI. Comparison of measured and predicted V oc 1. Sample 2. Measured 3. Modeled V oc based on 4. Voltage shortfall V oc (V) bandgap profile only (V) (column 3-column 2) A B C D E F Open-circuit voltages of the sample set were also examined. As expected, a rough trend of increasing voltage with bandgap (i.e., modeled V oc ) is evident, as shown in Figure 8(b). The dashed line in Figure 8(b) is a leastsquares linear fit with slope constrained to equal one. As described regarding Figure 8(a), an offset between the measured and modeled values is likely an indication of the sensitivity of the modeling to the choice of parameters in composition-to-bandgap conversion. The average distance between the data points and the line is 53 mv, which, at nearly 10% of V oc, is a more significant deviation than that seen in the comparison of modeled and measured currents. Furthermore, unlike short-circuit current, which depends most strongly on minimum bandgap, V oc should depend most strongly on the average bandgap in the depletion region 44,45 and therefore should not be subject to significant error from the spatial resolution of the AES-measured bandgap profile. Thus, an important feature of Figure 8(b) is that there are significant deviations of the data from the fit or slope ¼ 1 lines. These deviations imply that there are significant differences in properties other than bandgap profile between the CIGSS films. The deviation between the expected and measured value for V oc is termed voltage shortfall. Computation of the voltage shortfall for each sample in this study is shown in Table VI. For each sample, the measured V oc (column 2) is subtracted from the modeled V oc (column 3) to deduce the voltage shortfall (column 4). The modeled V oc values were obtained from the AES-deduced bandgap profile, with all other modeling parameters set to the baseline given by Gloeckler et al. 41 Thus, they represent expected voltages if all materials properties other than bandgap profile were constant over the sample set. The difference between measured and modeled voltages, the voltage shortfall, is therefore a relative measure of how well each device converts its bandgap profile to voltage. A large positive value indicates significant voltage loss that cannot be attributed to bandgap profile. It should be noted that varying the choice of parameters in composition-tobandgap conversion or modeling can cause all the voltage shortfalls in column 4 to increase (or decrease) by the same amount. Thus, importance should be attached to minimizing voltage shortfall relative to that of the best devices, rather than to achieving an absolute shortfall value of zero. Defect characterization and voltage shortfall Examination of the activity of defects is desirable, because there are significant deviations of V oc from the values expected purely from bandgap profile (Figure 8b) and defect density is expected to be a major determinant of cell voltage. 39 The integrated defect density measured by AS correlates strongly with the voltage shortfall of each device, as illustrated in by the solid points in Figure 9 (left axis). As voltage shortfall increases, so does defect density detected by AS. Surprisingly, the correlation of Figure 9 is apparent despite the wide range of compositions, bandgap profiles, and processing techniques among the team samples, and the expected response of AS to majority carrier defects. 46 However, other studies in the literature have stated that AS measurements on CIGSS have been observed to correlate with voltage, 47 and that multiple charge states may be associated with the same defect. 48 It is also possible that the measured defects may control compensation and therefore free carrier density, which has not been separated from other effects in calculation of the voltage shortfall. Further definition of defect response can be obtained by comparison of voltages and AS with DLCP data. Measurement of defect density by DLCP is qualitatively consistent with that from AS, as illustrated by the

15 DEVICE PERFORMANCE AND TRANSPORT PARAMETERS 39 Figure 9. Comparison of voltage shortfall (x-axis), AS integrated defect density (left y-axis, full circles), and DLCP defect density (right y-axis, open circles) hollow points in Figure 9 (right axis). This correlation suggests that the bulk defects measured by DLCP are an important component of the AS-detected defect density and voltage shortfall. The previous paragraphs discuss observed correlations between voltage shortfall and defect densities measured by AS or DLCP. One might therefore expect to find an inverse relationship between PL decay time and defect densities or voltage shortfall, since each quantity is affected by the electrical activity of defects. However, TRPL lifetime in this study does not correlate with defect density or voltage shortfall for any of the measurement conditions. As several studies have indicated a strong correlation between PL decay and open-circuit voltage in polycrystalline CIGSS and CdTe films, 3,4,36,37,49 a better understanding is needed regarding how the measurement and interpretation is best performed and interpreted on widely varying samples. Further study is merited, particularly since TRPL can be performed on bare absorber and is non-contact, making it an attractive method of evaluating defect activity for process diagnostics. Measured mobilities, predicted by modeling to have a more modest effect on device performance than defect or carrier densities, 39 were also not correlated with device parameters, defect densities, or voltage shortfall. Carrier density Comparison between different measurements related to free carrier density is desirable, since order-of-magnitude variations are expected to have a significant effect on device performance. 39,50 There is significant disagreement between carrier densities measured by CV, Hall effect, and low-temperature DLCP. Figure 10 shows carrier densities measured by Hall effect or CV as a function of zero-bias carrier density extracted from low-temperature DLCP data. Carrier density measured by DLCP is shown on the x-axis, as it is expected to be the most accurate value of the three methods. The DLCP carrier density should not be subject to error from interface states (as is to be expected from CV), defect states (CV), mixed conduction at the absorber surface (Hall effect), or changes in the absorber during window layer processing (Hall effect). As seen in Figure 10, carrier densities measured by CV and Hall effect actually appear to be somewhat anti-correlated with that extracted from low-temperature DLCP: that is, the samples with the highest apparent CV or Hall effect carrier densities seem to have the lowest actual shallow acceptor densities. This anti-correlation may be related to the effect of defects on the measurements. In Figure 10, the right y- axis shows the AS defect density for each sample. Those with elevated defect densities exhibit elevated CV carrier densities. Only for samples with the lowest defect densities does the CV carrier density approach that measured by DLCP. Thus, carrier density from room temperature CV may yield an acceptable input for modeling only for samples where defect density is very low. Actual variations in free carrier density may be quite different from those indicated by CV due to the response from defects.

16 40 I. L. REPINS ET AL. Figure 10. Comparison of carrier density as extracted from zero-bias, low-temperature DLCP (x-axis), Hall effect (left y-axis, black diamonds), or CV (left y-axis, black squares). AS defect density is shown on the right y-axis by gray squares Fill factor Relatively simple comparisons of measured fill factor with expected results based on changes in one or two parameters analogous to the comparisons performed for voltage and current were not fruitful in this study. A lack of such correlations may be attributed to several characteristics of the fill factor. First, for the range of parameters measured in this study, modeling predicts fill factor to exhibit roughly equal sensitivity to carrier density, defect density, bandgap profile, and mobility. Furthermore, fill factor can also be a function of device properties largely unrelated to bulk CIGSS, such as shunting by localized defects or conduction band spikes formed by charge trapped at interfaces. Extensive efforts to relate fill factor to transport properties were therefore not pursued in this preliminary study on widely varying CIGSS. CONCLUSIONS A test sample set of widely varying CIGSS was assembled, finished into devices utilizing identical processing, and characterized with multiple techniques. The test sample set exemplifies the present status of laboratory and industrial CIGSS. Describing differences among these test samples can be expected to require knowledge of transport parameters for each device: values for CIGSS bandgap profiles, defect properties (density, cross- section, and level), carrier density, and mobility. Values for each of these inputs were measured in this study. In some cases, quantities were evaluated by more than one technique. There are significant deviations between measured voltages and those predicted from bandgap profile alone. For the devices in this study, voltage shortfall correlates strongly with defect density measured by AS or DLCP. Laboratory (as opposed to industrial) devices exhibited the smallest defect densities and voltage shortfalls. The correlation of voltage shortfall with both AS and DLCP suggests that the reduction of bulk defects is a promising route toward improved performance in current industrial devices. There is significant disagreement between carrier densities extracted by standard analyses from roomtemperature CV, Hall effect, and low temperature DLCP data. Carrier densities derived from CV and Hall effect actually appear to be somewhat anti-correlated with that extracted from low-temperature DLCP. This anticorrelation may be related to the effect of defects on the measurements. Samples with elevated AS defect densities exhibit elevated CV carrier densities. Only for samples with the lowest defect densities does the CV carrier density approach that measured by DLCP. Thus carrier density from the standard analysis of room