Analog and Mixed-Signal Center at Texas A&M University. I abc V 1. i o. + g m V 2. Edgar Sánchez-Sinencio

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1 Anal and Mixed-Sinal enter at Texa A&M Univerity I abc V V + - i Edar Sánchez-Sinenci ELEN 607 (ESS) SPRING 5

2 Vltae Multitae Trancnductance Apliier Tplie r LV Pwer Supply. Gd vltae ain can be btained uin cacde tae. But thee tae are nt aenable r LV pwer upply. Under LV cnditin, hih vltae can be btained uin cacade apliier. That i rwin hrizntally, rather than vertically. Direct acade iple (invertin) tae ive the required vltae ain withut cntrl ple and zere. Dynaic behavir r ptial perrance require eedback (and eedrward) circuit. Anal & Mixed-Sinal enter (AMS)

3 Firt Apprach: Direct acade V in P V 0 L I b Vi 0 V x M P M I b V V i I b M V x P M I b Syblic Repreentatin (a) (b) Tw Pible Ipleentatin H() V0 () Vin () / pl L p pl The ple are lcated at p 0, p p H() 00 0 L i.e., MHz and 0 MHz Anal & Mixed-Sinal enter (AMS)

4 Hw d yu brin ne ple cle t the riin? -Ue eedback, i.e. Miller eect V in V 0 Nelect p (i.e., p << ) p L H() V0 () Vin () ( ) / L 0L / Lp / L 0 / L 00 / L The ple lcatin are apprxiately at: p ( 0) / L The d new i that: p << p H() / : 00 and p The bad new i that a zer i at the RHP. Gd r 0 0 tability Lare D vltaeain 0 AV 0 z Anal & Mixed-Sinal enter (AMS)

5 Nw we will ue a eedrward circuit t cancel the zer at the RHP. Thi will ipact the cplexity and perrance the dein. Recall that bere applyin the eedrward we had: H() V0 () Vin () ( ) / L 0L / Lp / L 0 / L 00 / L V in V 0 Nw the crrepndin H() bece: L N zer Fr H( ) V V in ( ) ( ) L L Anal & Mixed-Sinal enter (AMS)

6 Aue a dinant ple, then L p p ; V 0 V in Let u cnider a hiher-rder yte, i.e. rd rder. ; ) ( p v v A GB A H L L p p ; ' V in V 0 I B

7 Neted G - penatin Apliier. V i V 0 L Three-tae apliier tply with NG V0 ( ) H( ) V ( ) i S L By akin and, V0 () H() V i() 000 L Oberve the reularity and iplicity the reduced exprein Anal & Mixed-Sinal enter (AMS)

8 0 V i rd A P lcated at Nte that thedinant plei ;, and - A H() dinant ple can be written a rder H() auin a Thi V i i L A A GB A A Anal & Mixed-Sinal enter (AMS)

9 Multipath Neted Miller penatin Technly Ptential Feedrward Schee: An Apliier Tplie Re-Viit. V i 4 V 0 (a) Multipath neted iller cpenatin tply. FF : NM V i 4 V 0 (b) An abtract del r the apliier prped by atell, et.al. Vi V0 (c ) The apliier with ultipath iller zer cancellatin. Anal & Mixed-Sinal enter (AMS)

10 Let U Nw pare Several Fur-Order Tplie Vi 0 4 V L A H() 0 a a a P GB P A0 a, a, a 4, i i i Fur tae apliier tply with NG (Fan Yu et al) 4 < < / 4, GB Pwer uptin : P (V P I n V DD and n V I n n i n dd i i V ) n I, i i i L, are current and requency nralizatin actr, repectively. i i i L

11 parin Several Tplie. V0 () V i() A0 b b b ( / P )( a a a ), ki i i, i, and i i i Where A0 kk kk4, P A0 GB A0 parin Plynial eicient r Fur Stae NM and NG Apliier. P h () NM NG a a a L 4 L 4 Dein plex Siple Z() NM NG b b b Anal & Mixed-Sinal enter (AMS)

12 Neted G - penatin (NG) N th -Order n Vi 0 V n n n Level n Level Level nceptual ultitae apliier tply with NG. Vi V0 A() Abtract del. Anal & Mixed-Sinal enter (AMS)

13 Hw t Ipleent a Pitive G? V dd V Vi 0 M M G G M G G G G (a) Repreentatin M M4, M M, M M M V i V b M M M4 V (b) Tranitr Level V ut M V b I I G G G < G,, Mcurrent M current, then add M t prvide additinal current. Reve Mand add a PM OStranitr in parallel t M. Anal & Mixed-Sinal enter (AMS)

14 Dein Exaple a Fur-Stae Apliier V dd 4 V V Vut V b M 5 M4 M V b V b V Fur tae peratinal apliier with NG tply The dinant ple i deterined by GB Phae arin ( ) i ainly deterined by the hih requency ple Anal & Mixed-Sinal enter (AMS)

15 The lcatin hiher-rder ple nt nly inluence n the, but al in ettlin tie and pwer cnuptin. Fr peciicatin requirin A > 80 db, a ur-tae (n = 4) i uually required Stability cnideratin r n = 4 ipe 4,, ) ( ) ( ) ( ; / < < i GB A A V V H GB i i i in

16 Dein Apprach Step. Deterine baed n GB = GB Step. Deterine baed n Phae Marin 90 tan Exaple: GB GB GB = GB, >, 4 > / / 4 90 tan 60 GB Hwever, thi de nt uarantee all ettlin tie

17 Dein Apprach Step. Deterine, 4 baed n ettlin tie and pwer a. Sweep and 4 T? (ettlin tie) Nuerical Analyi (e.. MATLAB) b. Select a et (, 4 ) with deired pwer and ettlin tie 4 ) ( A A H 4 4

18 What i the eect 4 /GB? Hw ar huld ne puh 4? T*GB Phae Marin phae T /GB The phae arin and nralized ettlin tie (TGB) an NG apliier v. 4 /GB. Trade- between phae arin veru ettin tie. Anal & Mixed-Sinal enter (AMS)

19 Nralized Pwer Hw d the Tw Tplie pare r Pwer nuptin? * * NM NG * + * + * + * + * * * * * T*GB The nralized pwer cnuptin the NG and the NM apliier a a unctin the nralized ettlin tie. Anal & Mixed-Sinal enter (AMS)

20 Mre Experiental Reult. Anal & Mixed-Sinal enter (AMS)

21 Meaured Perrance the 4-Stae NG Op Ap. Pwer nupti n 0.68W.40W D Gain 00dB 00dB Gain Bandwidth 60kHz.0MHz Phae Marin Input Oet 5.V 5.V Slew Rate.5V/ S 5.0V Pwer Supply.0V.0V Lad nditin 0k // 0 pf 0k//0pF Area Anal & Mixed-Sinal enter (AMS)

22 OPTIMAL DESIGN OF LOW POWER NESTED GM- OMPENSATION AMPLIFIERS USING A URRENT-BASED MOS TRANSISTOR MODEL X. Xie, M.. Schneider, S. H. K. Ebabi, E. Sánchez-Sinenci Departent Electrical Enineerin Texa A&M Univerity llee Statin, Texa , USA

23 Lw Pwer Operatinal Apliier Applicatin: bile cunicatin & prtable device Majr cncern: pwer, tability, area and peed. Dein apprach: Lw vltae ultitae cacadin. Technique r lvin tability prble: Neted Miller penatin (NM) Neted G- penatin (NG) Lw peratin current weak r derate inverin. Optial dein in derate inverin ntinuu MOSFET del

24 Tply Three-tae NG Apliier eedrward path and t cancel RHP zer. Traner unctin: Makin = and = ive: Rewritten a: Phae arin: ) ( ) ( ) ( k k k k k k V V H i Vi L () V ) ( ) ( ) ( ) ( ) ( L i V V i i i k i i i ) ( tan 90 GB GB PM ) ( ) ( L i V V We deine: unity ain requency dc ain k k A k

25 Tply Fur-tae NG Apliier Vi pared t three-tae NG: eaier t btain hih dc ain, re cplicated dein, ptentially re pwer cnuptin. - - V L (4) Traner unctin: V V i Phae arin: PM A0 tan tan A Traner unctin an n-tae NG apliier: V V i A 0 GB 0 GB GB GB A 0 n... n i i 4 4 4

26 Mdiicatin n Lw Pwer Three-tae NG Siniicant paraitic eect: very lare tranitr r weak inverin dein, ln channel tranitr ued r hih dc ain Vi L V Mdiied traner unctin: where 0 0 ) ( A a a A H ) ( k k a k k k a i paraitic capacitance at each utput nde, phae delay due t the current irrr at ecnd tae.

27 ) )( ( L L L L Mdiicatin n Lw Pwer Three-tae NG (cnt.) Mderate inverin: d tability, ptiizatin pwer, peed & area. with and Ex: = GB, = GB, = 4GB, = = 8 pf, L = 0 pf, then = 50 S, =00 S, =500 S, Fr =00 S (R L ), = pf, = pf, = 6 pf Aue = 0, Then and

28 urrent-baed Tranitr Mdel Feature AM del: phyic-baed del, univeral and cntinuu exprein r any inverin, independent technly, teperature, eetry and ate vltae, ae del r analyi, characterizatin and dein. Main dein equatin: (dein paraeter: I,, i ) I t T W L W L i n t i L x V DSAT i t t i 4 x I t t n I drain current in tranitr trancnductance in aturatin n lpe actr t theral vltae inverin level the tranitr deined a i i, where I I i the nralizatin current. i << weak inverin, i >> trn inverin. I n x t W L

29 Speciicatin and Dein Prcedure Speciicatin: lad 0 k/0 pf ain bandwidth GB= MHz dc ain A 0 > 00 db phae arin PM > 60 0.% ettlin tie < S pwer cnuptin: iniu Other Spec can be included ( i deterined by, I, and i ): nie, lew rate, cn de rejectin. Spec. (ain, pwer, PM, GB, ettlin tie, etc.) Deterine i Given i, Deterine he either i r I, calculate the ther and W/L, elect a lenth L. Hpice iulatin, all pec atiied? (YES/NO) YES Layut, extractin, iulatin and check pec? (YES/NO) YES Fabricatin NO NO

30 Ipleentatin Three-Stae NG Apliier Vdd=V MP MP MP MP0 MP4 MP5 M0 Reark: V- V+ MIN MIN Vb M M M M4 I B =5A M5 Ideally, = GB, = GB, = 4GB, he =GB, =5GB t cpenate lare paraitic eect. Ln channel t btain adequate ain caue lare paraitic eect. M6 M7 Vb MP6 M8 M9 R L V L Tranitr NO. W() L() i M M M 0, M M 6, M 7, M M M IN, M IN M P0 M P M P4, M P M P

31 Ipleentatin Fur-Stae NG Apliier Vdd=V MP MP MP MP0 MP4 MP5 MP6 MP7 MP8 V- V+ MIN MIN Ib=6A Vut M0 Vb Reark: M M M M4 M5 M6 =GB, =GB, =5GB, 4 =6GB hrter lenth all paraitic eect lwer inverin level than -tae ne. M7 Sae ipleentatin and ae i r reerence pap (lw-vltae trn inverin 4-tae) Vb M8 Vb M9 M0 M 4 L M R L Tranitr NO. W() L() i M M M 0, M M 6, M 7, M M 8, M 9, M M M IN, M IN M P0 M P M P4, M P M P6, M P M P

32 Siulatin Reult NG Apliier (V DD = V, Z LOAD = 0 k/0 pf) Speciicatin Three-Stae Fur-Stae Fur-Stae(re.) Pwer nuptin Miniu 0.8 W 0.0 W 0.9 W D Gain 00 db ~ 00 db ~ 05 db ~ 0 db Gain Bandwidth.0 MHz.08 MHz.0 MHz.09 MHz Phae Marin > % Settlin Tie (00 V) < S 0.77 S 0.55 S 0.5 S THD (khz V P-P ) db - 88 db db % THD Input (khz).6v.8v.6v Active Area (relative area) 0.0 (.75) (0.9) () in i, ax i 4, 80 6, 0 00, 0 *. AMI n-well MOS technly * BSIM (HSPIE level ) iulatin

33 Experiental Reult Speciicatin Three-Stae Fur-Stae Fur-Stae(re.) Pwer nuptin Miniu 0.6 W 0.8 W 0.6 W D Gain 00 db ~ 96 db ~ 05 db ~ 00 db Gain Bandwidth.0 MHz.0 MHz.05 MHz 900 khz Phae Marin > THD (khz V P-P ) db db db % THD Input (khz). V. V 0.94 V Active Area (Relative Area) 0.0 (.49) (0.78) () * The utput tae the reerence p ap i realized with a PMOS tranitr r reductin pwer.

34 Frequency Repne -tae NG apliier 4-tae NG aplier

35 Repne t 00 khz Vp-p ine wave S/DIV S/DIV -tae NG apliier 4-tae NG apliier

36 Step Repne with 00 khz 00 V Input S/DIV -tae NG apliier S/DIV 4-tae NG apliier

37 Step Repne with Lare Sinal ( khz V) 00 S/DIV -tae NG apliier 00 S/DIV 4-tae NG apliier

38 ncluin Uin a new MOSFET del, NG apliier can be deined in derate inverin yieldin ptial trade- dein. With ae r better perrance, lw pwer apliier cnue 65% le pwer than lw vltae (trn inverin) dein. Fur-tae p ap ha better verall perrance with uch le area and withut diipatin evidently re pwer. Three-tae ne beneit r the reductin dein cplexity.

39 ELEN 607 (ESS) SPRING 06

40 Review: acade with Miller eect / Vi R V R V V i -A V p L V -A V /p -AVi -AVi /L (a) V Vi D( ) A( A R) ( pr LR ( RA R R)) ( pl ( p L)) RR. wp wpw p pr LR ( AR R R) RA w p A A pl ( p L) p L wp L A w z R

41 -AV vi v p L (b) -AV R -AVi R /p / R /L V Vi -AVi R V LR RpR) LRR prr ((LRR LRpRR ( R) (AR - A(A Vi V pr) LR R R AR (R A R R R R A LR pr w p ) ( L p L p pl A w p ) ( ) (/ ) / ( R R A R w z Ple plittin via R eedback branch

42 Review: Feedrward cpenatin v i -A V -A V v Vi R V / R V p -AVi R -AV /L A V AVi (c) Traner Functin Vi V - (-RA - ARA- (prra RRA- RAR)) (LRRpR LRRR RRpR (RpR RR) (LRR RR RpR RR RAR) R V Vi ( ) L R w p RR AR w z ( ) w p L

43 reatin and internal zer cancellatin DFF vi -AV -AV v L -AV AV Vi R -AVi V / R -AV V R R -AV AVi V /L (d) w - R( ) p 0 w - (R R) R R p R R R w z R (RR RR R R) Dapin actr requency cntrlled cpenatin (DFF)

44 Apliier parin 4 tae NG Apliier. tae DFF Apliier

45 Paraeter NG DFF Av (db) GBW (MHz) Phae Marin(`) % Settlin Tie(n) 7 98 Slew Rate(+) (V/u). 8. Slew Rate(-) (V/u) MR (V) MRR (db) PSRR+ (db) PSRR- (db) Input Reerred Oet (v) 90n -4.u Active Area (u ) Pwer nuptin (W). 0.4

46 4 tae NG Apliier. Vdd M M8 M9 M M M6 M7 Vi- M M Vi+ M9 Vut Vb Vb M8 M0 Vb M4 M5 M V M4 M5 M6 M7 M0 M M # M M M M4 M5 M6 M7 M8 Dein Suary Size 49/.4 46/.4 6/.4 0/.4 0/.4 8/.4 6.5/.4 8/.4 # M9 M0 M M M M4 M5 M6 Size 8/.4 6.5/.4 /.4 /.4 /.4 0/.4 0/.4 0/.4 # M7 M8 M9 M0 M M Size 0/.4 0/.4 70/.4 0/.4 /.4 44/.4

47 tae DFF Apliier Vdd M M4 M5 M5 M6 M0 Vi- M M M6 Vi+ M7 Va M M8 Vut V M8 M9 Vb M0 Vc M M4 M M7 M9. # M M M M4 M5 M6 M7 M8 M9 M0 Size 8/.4 8/.4 48/.4./.4./.4./.4./.4./.4./.4 8/.4 # M M M M4 M5 M6 M7 M8 M9 M0 Size 8/.4 0/.4 /.4 45/.4 45/.4 9/.4 /.4 /.4 95/.4 5/.4

48 Reerence S. Pernici, A MOS Lw-Ditrtin Fully Dierential Pwer Apliier with Duble Neted Miller penatin, IEEE J. Slid-State ircuit, Vl. 8, N. 7, pp , July 99. F. Yu, S.H.K. Ebabi and E. Sánchez-Sinenci, Multitae Apliier Tplie with Neted G - penatin, IEEE J. Slid-State ircuit, Vl., N., pp , Deceber 997. X. Xie, M.. Schneider, E. Sánchez-Sinenci and S.H.K. Ebabi, Sund Dein lw pwer neted trancncnductance-capacitance cpenatin apliier Electrnic Letter, Vl. 5, N., pp , June 999 K.N. Leun, P.K. T. Mk, W.-H. Ki, and J. K. O. Sin, Three-Stae Lare apacitive Lad Apliier with Dapin Factr-ntrl Frequency penatin, IEEE J. Slid-State ircuit, Vl. 5, N., pp. -0, February 000 B.K. Thandri,, and J. Silva-Martinez, A Feedrward penatin Schee r Multi-Stae Apliier with N-Miller apacitr, IEEE J. Slid State ircuit, Vl. 8, pp. 7-4, Feb. 00. Anal & Mixed-Sinal enter (AMS)

49 Reerence Readin Material Authr(): herry Edward M. Univeral bai r rankin all-inal apect cpenatin technique r peratinal apliier INTERNATIONAL JOURNAL OF IRUIT THEORY AND APPLIATIONS Vlue: 9 Iue: Pae: DOI: 0.00/cta.689 Publihed: NOV 0 Authr(): Pen Xiahn; Sanen Willy; Hu Lian; et al. Ipedance Adaptin penatin r Lw-Pwer Multitae Apliier Surce: IEEE JOURNAL OF SOLID-STATE IRUITS Vlue: 46 Iue: Pae: DOI: 0.09/JSS Publihed: FEB 0 Authr(): It Rui; Itakura Tetur Title: Phae penatin Technique r Lw-Pwer Operatinal Apliier Surce: IEIE TRANSATIONS ON ELETRONIS Vlue: E9 Iue: 6 Pae: DOI: 0.587/tranele.E9..70 Publihed: JUN 00 Anal & Mixed-Sinal enter (AMS)