Evaluation of plasma strip induced substrate damage Keping Han 1, S. Luo 1, O. Escorcia 1, Carlo Waldfried 1 and Ivan Berry 1, a

Transcription

1 Solid State Phenomena Vols (29) pp Online available since 29/Jan/6 at (29) Trans Tech Publications, Switzerland doi:.428/ Evaluation of plasma strip induced substrate damage Keping Han 1, S. Luo 1, O. Escorcia 1, Carlo Waldfried 1 and Ivan Berry 1, a 1 Axcelis Technologies Inc., 8 Cherry Hill Drive, Beverly, MA 191, USA a ivan.berrry@axcelis.com Keywords: Post-implant resist strip, ultra shallow junction, surface oxidation, silicon loss, dopant loss Introduction High dose, ultra shallow junction implant resist strip requires minimal substrate loss and dopant loss. Silicon recess (silicon loss) under the source/drain (S/D) extensions increases the S/D extension resistance and decreases drive currents by changing the junction profile. ITRS surface preparation technology roadmap [1] targets silicon loss to be.4å per cleaning step for 4nm and.3å for 32nm generation. Fluorine-containing chemistries which are often used to enhance implanted resist strip and residue removal result in unacceptable substrate loss. A non-fluorine plasma strip was developed in earlier work and is qualified for 4nm logic production [2]. The objective of this work is to study the substrate damage that is induced by the resist strip plasma process. Silicon surface oxidation and silicon loss of different plasma strip chemistries were evaluated with various metrologies such as optical ellipsometry, electrical oxide measurement,, TEM and mass measurement. The impact of different strip chemistries on dopant retention and distribution is also discussed. Experimental Silicon surface oxidation was studied on an Axcelis RapidStrip 32 (RpS32) plasma strip system for different O2/N2/H2-based plasma chemistries. Optical Ellipsometry (OE) was used for measuring the thickness of thin oxide (<2Å) films on non-implanted silicon substrates, while Electrical Oxide Thickness () was employed for implanted silicon wafers. X-ray Photoelectron Spectroscopy () and Transmission Electron Spectroscopy (TEM) were used to validate oxide thickness measurements. Silicon loss of implanted and non-implanted silicon substrates was also evaluated with a mass loss technique, where the mass was measured on blanket Si wafers, before and after plasma strip, followed by a diluted HF dip. Plasma-induced effects on dopants were evaluated with sheet resistance (Rs) measurements and secondary ion mass spectroscopy (SIMS) on BF 2 - and As-implanted Si wafers after plasma strip and anneal. The data presented in this paper is limited to plasma strip conditions with wafer temperatures of 24 C and plasma exposure times of mins. The extended plasma exposure time was chosen to enable improved thin film oxide measurement capabilities. Post ash oxide thickness (Å) 2 1 Ellipsometry No ash y = 1.21x R 2 = Ellipsometry Figure 1: ( Thin oxide thickness measurement by Ellipsometry and for both oxidizing and reducing plasma strip chemistries. (.Good correlation is shown between Ellipsometry and measurements. All rights reserved. No part of contents of this paper may be reproduced or transmitted in any form or by any means without the written permission of TTP, (ID: , Pennsylvania State University, University Park, United States of America-14/6/14,17:16:)

2 2 Ultra Clean Processing of Semiconductor Surfaces IX Results and Discussion OE and measurement results of the chemical oxide thickness on bare Si wafers that were exposed to oxidizing or reducing plasma strip chemistries are shown in Fig. 1(, illustrating the reduced Si surface oxidation with the reducing plasma. The oxide thickness of a control wafer without plasma exposure was also measured. As indicated in Fig. 1 (, there is good correlation between these two measurements. Si oxide growth from exposure to different O2/N2/H2 strip plasmas was studied by measuring surface oxide thickness before and after strip. Fig. 2 shows the oxidation rates as a function of oxygen content for both hydrogen-free and hydrogen-containing plasma strip chemistries. The oxidation rates were normalized to the oxygen- and hydrogen-free plasma, i.e pure N 2 plasma. Higher oxidation rates were observed for hydrogen-containing plasma, presumably due to hydrogen-enhanced plasma oxidation. It is also noted that even very small amounts of O 2 (~.2%) resulted in significant oxidation. The oxide growth leveled off for hydrogen-free plasmas as the oxygen content is above %. Oxidation peaked at approximately % O 2 for hydrogen-containing plasma which may be due to OH* reactivity. Normalized oxidation rate With Hydrogen Without Hydrogen O2% content Figure 2: Normalized oxidation rates as a function of oxygen content for both hydrogen-free and hydrogen-containing plasma strip chemistries. Si surface oxidation on implanted silicon wafers is generally more challenging for optical metrology methods. Therefore the oxide thickness on implanted silicon wafers was measured by means of, as well as and TEM. Fig. 3a compares and measurements for oxidizing and Post ash oxide thickness (Ǻ) y = 1.464x R 2 = 1 No ash 2 3 Figure 3: ( Electrical Oxide Thickness () measurement and for both oxidizing and reducing plasma strip chemistries on implanted (As, 2keV, 1E1) silicon wafers. ( Good agreement is shown between and measurements.

3 Solid State Phenomena Vols reducing plasma strip chemistries. The oxide thickness of an unprocessed Si substrate, labeled no ash is provided as reference. As revealed in Fig. 3b there is good agreement between these two metrology techniques. Fig. 4a compares normalized oxidation rates, measured by, of implanted and non-implanted silicon substrates as a function of O 2 content. As expected, implanted silicon showed higher oxidation rates as a result of increased reactivity of the amorphized, ion-impact damaged surface. Normalized oxidation rate Non-implanted Implanted Si loss (Å) Non-implanted Si Implanted Si O2% content Fluorine-containing Plasma strip Figure 4: ( Oxidation rate as a function of O 2 content for both implanted (As, 2keV, 1E1) and non-implanted silicon wafers. ( Silicon loss (derived from mass loss) of both implanted (As, 2keV, 1E1) and non-implanted wafers for different plasma strip chemistries. Mass measurements were conducted to determine silicon loss of implanted and non-implanted silicon substrates for different plasma strip chemistries (Fig. 4. It shows that exposure to the same plasma condition shows more Si loss for the implanted Si as compared to un-implanted Si substrates, consistent with and results. As expected, the fluorine-containing strip resulted in the highest Si loss. The Si loss of the mass measurement can also be represented in terms of an equivalent change in surface oxide thickness, assuming that the Si loss is derived solely from surface oxidation and the subsequent removal in dhf. This is a reasonable assumption for fluorine-free strip chemistries where plasma-induced Si etching is not expected*. Fig. summarizes the Si surface oxidation measurement results from the different metrology methods. Although the absolute oxide thickness values may differ for different metrology techniques, Fig. indicates that relative comparisons (in this case comparing surface oxidation from oxidizing and reducing plasmas) are in good agreement. Oxide Thickness - vs Plasma (%) % 8% 6% 4% 2% % implanted Si Mass Optical non-implanted Si Figure : Comparison of different metrologies in determining relative change in surface oxidation between oxidizing and reducing strip plasma exposure. When evaluating plasma-induced substrate damage it is important to not only consider physical surface changes, i.e. Si loss, oxide growth, etc., but to also evaluate the effects on implant dopants.

4 22 Ultra Clean Processing of Semiconductor Surfaces IX Changes in sheet resistance (Rs) and SIMS profiles have been studied for different ash chemistries, which are shown in Fig. 7 as Rs x j plots. The x j is determined from SIMS profiles and indicates the depth from the surface where the dopant concentration reaches the Si substrate dopant level Rs (Ohms/square) No Plasma Xj (Å) Boron Rs (Ohms/Square) Arsenic No Plasma Xj (Å) Figure 6: Rs x j plots for BF 2 (left) and As (right) implanted Si after different plasma strip conditions (min oxidizing or reducing plasma exposure) and a s anneal at C under N 2 + 4ppm O 2 atmosphere. The Rs x j value for a no-plasma condition is provided for reference. Thus, Rs x j plots provide insight on changes to the dopant distribution as a result of strip plasma exposures [3]. With the solid line indicating constant dopant activation, data points falling above the line indicate suppressed activation and data points below the line signify enhanced activation. Boron implants show enhanced activation with oxidizing while reduced activation is observed with reducing chemistries. This is believed to be the result of the oxidizing strip chemistries forming a chemical oxide layer which serves as a surface capping layer and effectively preventing the out-diffusion of boron during subsequent anneal process. For arsenic implants this effect is not observed. Little change is noted for the reducing plasma, while the oxidizing plasma exhibits some dopant diffusion. Further studies indicate that the Rs for As implant seems to follow the silicon surface oxidation trend, thus indicating that dopant loss for As is mainly due to oxide formation which consumes dopant. More oxide is grown, more dopant is consumed. Summary This paper reviewed plasma strip induced substrate damage (silicon surface oxidation, silicon loss and dopant loss). Good correlation was found between ellipsometry, electrical oxide,, TEM and mass loss measurements of very thin oxide thickness (<2Å).The oxide growth during the plasma strip process is self-limiting and enhanced silicon surface oxidation was observed for hydrogen-containing plasma due to H* and OH* reactivity. Implanted silicon shows higher surface oxidation than un-implanted silicon. For the evaluation of strip induced substrate damage it is important to also assess dopant effects. Different effects have been observed for reducing and oxidizing chemistries as well as arsenic and boron implants. Optimized plasma resist strip processes need balancing between resist removal, surface cleanliness, Si oxidation (Si loss) and dopant retention. References [1] International Technology Roadmap for Semiconductors, 26 updates [2] K. Han, S. Luo, P. Geissbühler, Q. Han, I. Berry, R. Sonnemans, V. Grimm and C. Krueger, Non-fluorine plasma strip of HDI resist for 4nm node, PESM 27. [3] I. L. Berry, C. Waldfried, K. Han, S. Luo, R. Sonnemans, and M. Ameen, 8th International Workshop on Junction Technology, Shanghai, China (May 28) * H2 plasma without oxygen and nitrogen is known to etch silicon

5 Ultra Clean Processing of Semiconductor Surfaces IX.428/ Evaluation of Plasma Strip Induced Substrate Damage.428/