Three-dimensional AlZnO/Al 2 O 3 /AlZnO nanocapacitor arrays on Si substrate for energy storage

Transcription

1 Li et al. Nanoscale Research Letters 2012, 7:544 NANO EXPRESS Three-dimensional AlZnO/Al 2 O 3 /AlZnO nanocapacitor arrays on Si substrate for energy storage Lian-Jie Li 1, Bao Zhu 1, Shi-Jin Ding 1*, Hong-Liang Lu 1, Qing-Qing Sun 1, Anquan Jiang 1, David Wei Zhang 1 and Chunxiang Zhu 2 Open Access Abstract High density three-dimensional AZO/Al 2 O 3 /AZO nanocapacitor arrays have been fabricated for energy storage applications. Using atomic layer deposition technique, the stack of AZO/Al 2 O 3 /AZO has been grown in the porous anodic alumina template which is directly formed on the Si substrate. The fabricated capacitor shows a high capacitance density of 15.3 ff/μm 2 at 100 khz, which is nearly 2.5 times over the planar capacitor under identical conditions in theory. Further, the charge-discharge characteristics of the capacitor are characterized, indicating that the resistance-capacitance time constants are equal to 300 ns for the charging and discharging processes, and have no dependence on the voltage supply. This reflects good power characteristics of the electrostatic capacitor. Keywords: Nanocapacitor arrays, AAO, Capacitance density, RC time constant, Energy storage Background In recent years, the novel characteristics of nanostructures have attracted great attention from researchers; in particular, the nanostructure-based devices have been explored in many fields such as electronics, optoelectronics, and magnetism [1-3]. As one of the most important applications, the nanocapacitor arrays have been intensively studied for the next generation energy storage system due to increasing demands of high capacity, lightweight, and compact energy storage devices [4-7]. In terms of the electrostatic capacitor theory, the capacitor capacity is mainly determined by the electrode area. Therefore, to increase the effective area of electrodes, the three-dimensional nanocapacitor arrays are introduced to achieve a high capacitance density. As one of the most promising methods of fabricating nanocapacitor arrays, the porous nanostructure templates are used widely, including nanowire, nanopillar, anodic alumina (AAO), and so on [4-7]. For example, although InAs nanowire-based nanocapacitors (Au/Cr/HfO 2 /InAs) can achieve a larger electrode surface area, the poor * Correspondence: sjding@fudan.edu.cn 1 State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai , People's Republic of China Full list of author information is available at the end of the article mechanical strength of nanowires makes it unsuitable for energy storage [4]. Moreover, a significant improvement in capacitance has been achieved for the template of silicon nanopillars, which was fabricated by Au metalassisted etching in conjunction with interference lithography; however, the Au residue could cause oxide degradation and inferior device performance [5]. On the other hand, porous AAO templates made from aluminum foils exhibit a high degree of regularity and uniformity in addition to a quite simple process. Therefore, the performance of the fabricated nanocapacitors has been improved significantly [6,7]. However, it is hard to transfer the AAO template onto other substrates (e.g., Si substrate) due to its fragileness [8]. Although Banerjee et al. reported that the aluminum foils were first bonded anodically to the glass substrate and then AAO template was formed by two steps of anodization [7], it faces a complex processing. Therefore, it is expected that the AAO template can be formed directly on the Si substrate without template transfer or complex bonding. On the other hand, the electrode material of the capacitor also plays an important role in the performance of nanocapacitor arrays. As a transparent conductive oxide material in optoelectronics, Al-doped ZnO (AZO) has many attractive characteristics including excellent thermal 2012 Li et al.; licensee Springer. This is an Open Access article distributed under the terms of the Creative Commons Attribution License ( which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

2 Li et al. Nanoscale Research Letters 2012, 7:544 Page 2 of 5 stability, low resistivity, low manufacture cost, and so on [9]. Therefore, the introduction of AZO as the electrode of nanocapacitor arrays could boost the energy storage device integrated with the optoelectronic device. In this study, we demonstrate the successful fabrication of AZO/Al 2 O 3 /AZO nanocapacitor arrays in the porous AAO template, which is directly formed on Si substrate by two-step anodization. The resulting nanocapacitor arrays show a high capacitance density of 15.3 ff/μm 2, which is nearly 2.5 times that of the planar capacitor. Furthermore, the charge-discharge characteristics of the nanocapacitor arrays are also discussed. Methods The fabrication steps of the AZO/Al 2 O 3 /AZO nanocapacitor arrays are illustrated schematically in Figure 1. Firstly, an aluminum film with a thickness of 1 μm was deposited on the cleaned Si substrate by thermal evaporation, which was followed by annealing in N 2 at 500 C for 2 min in order to enhance the adhesion between the Al film and the Si substrate. The porous AAO was then formed by two steps of anodization, i.e., the anodization of the aluminum film was carried out in a 0.3-M oxalic acid solution at 25 C under 40 V, then the pore widening was performed in a 5-wt.% phosphoric acid solution. As a result, the resulting AAO template has uniform nanopores with a diameter of approximately 80 nm and a density of approximately cm 2. Subsequently, the stack of AZO/Al 2 O 3 /AZO (12/10/12 nm) was deposited in the AAO template by atomic layer deposition (ALD). Herein, the AZO films were used as both bottom and top electrode plates and were composed of alternate 20 cycles of ZnO and 1 cycle of Al 2 O 3. ZnO and Al 2 O 3 were grown from the precursors of diethyl zinc/h 2 O, and trimethyl aluminum/h 2 O at 200 C, respectively. Whereafter, the top Ta electrode with a thickness of 180 nm was deposited on the stack through a hard mask by magnetron sputtering. Subsequently, the top AZO film outside the Ta electrodes was etched by 0.02 wt.% HCl aqueous solution; thus, the top electrodes of AZO/Ta were formed. It is worthwhile to point out that only the central round part of the Al film on the Si substrate was anodized, so the fringe part of the Al film is preserved to serve as the bottom electrode. After deposition of the bottom AZO layer, a small region within the fringe part of Al film was protected from subsequent ALD deposition and chemical etching process, which is used as the probe position during electrical measurements. Accordingly, the capacitors consisting of nanocapacitor arrays were formed for electrical characterization. The C-V characteristic of the nanocapacitor arrays was measured using an Agilent 4294A precision LCR meter, and the charge-discharge characteristics were measured using Agilent 33250A (Agilent Technologies, Inc., Germany). Figure 1 Schematic diagrams of fabrication processes for three-dimensional AZO/Al 2 O 3 /AZO nanocapacitor arrays. (a) The formation of AAO templates on the Si substrate, (b) atomic layer deposition of the AZO/Al 2 O 3 /AZO stack (defined as MIM structure), and (c) the formation of capacitors for electrical measurements, including three-dimensional nanocapacitor arrays and a top contact layer of Ta film. Results and discussion Figure 2 shows the cross-sectional transmission electron microscopy (TEM) images of the fabricated nanocapacitor arrays. It is found that the fabricated threedimensional nanocapacitor arrays are embedded into the AAO template. Under the AAO template, a layer of Al is observed clearly, which is used to maintain good contact between the AAO and the Si substrate. This can be realized by partial anodization of the aluminum film. In our experiment, the depth of the formed pores is close to 400 nm, which can be adjusted through the thickness

3 Li et al. Nanoscale Research Letters 2012, 7:544 Page 3 of 5 the surface area of the bottom electrode does not increase further. Figure 2b shows the high-resolution TEM image of the nanocapacitor. It is found that the insulator of Al 2 O 3 is sandwiched well by the AZO films, and no void can be seen in the nanopores. Figure 3 shows the typical C-V curve of the fabricated capacitor with the AZO/Al 2 O 3 /AZO nanocapacitor arrays at 100 khz. The extracted capacitance density reaches 15.3 ff/μm 2, which is nearly 2.5 times that of the planar capacitor under identical conditions. By comparison with the planar Al 2 O 3 dielectric MIM capacitors [11-15], the fabricated capacitor in this study exhibits a significant increase in capacitance density, as shown in Figure 3. Although another study [11] also demonstrates a comparable capacitance density, this is due to a very thin Al 2 O 3 film of 5 nm. Further, the total capacitance of the nanocapacitor structure can be calculated according to Equations 1, 2, 3, and 4 [7]: C total ¼ ac planar þ C poreþ C bottom ð1þ " rffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi# kε 0 3 C planar ¼ 2 2r 2 pore þ D πr 2 pore ð2þ t insulator C bottom ¼ ε 0 π r 2 pore ðt BE þ t insulator Þ t insulator ð3þ C pore ¼ 2πkε 0 L ð4þ ðr pore t BE Þ ln r pore ðt BE þt insulator Þ Here, α represents the density of pores, which is close to cm 2 in the present experiment according to the scanning electron microscope image of the AAO Figure 2 Cross-sectional TEM images of (a) nanocapacitor arrays embedded into AAO template and (b) three-dimensional AZO/Al 2 O 3 /AZO stack. of the initial Al film and the time of anodization. Furthermore, it is interesting to find that each pore includes the top wide part and the bottom narrow part; the former exhibits a diameter of approximately 80 nm and a depth of approximately 150 nm, and the latter exhibits a diameter of approximately 20 nm and a depth of approximately 250 nm. As the pore diameter is proportional to the anodic voltage, the above-mentioned phenomenon could be attributed to the voltage fluctuation during the anodization process [10]. It is worth mentioning that the bottom holes can be filled fully by AZO after the deposition of a 12-nm AZO film due to their small diameters; therefore, the bottom part does not contribute a lot to the capacitance density because Figure 3 The C-V characteristic of the fabricated capacitor with three-dimensional nanocapacitor arrays. It is compared to other reported planar MIM capacitors with Al 2 O 3 dielectrics.

4 Li et al. Nanoscale Research Letters 2012, 7:544 Page 4 of 5 template (not shown here); k is the dielectric constant of Al 2 O 3 (k = 7.6), and t BE and t TE correspond to the thicknesses of the bottom AZO layer and the top AZO layer, respectively, i.e., 12 nm. The depth (L) and radius (r pore ) of nanopores are approximately 150 and 40 nm, respectively. D represents the interpore distance, which is 10 nm. Therefore, the calculated C planar, C bottom, and C pore are equal to , , and ff, respectively; thus, the total capacitance density (C total ) amounts to 15.7 ff/μm 2, which is close to the measurement result. In addition, this also indicates that C total is dominated by C pore. Further, the capacitance density can be enhanced by increasing the height of nanopores. Moreover, the parameters of t BE, r pore, and t insulator have positive or negative effects on the capacitance density. Therefore, to achieve a maximum capacitance density for practical applications, we have to consider the effects of various parameters, especially the influence of the insulator thickness on the leakage current, in order to make a balance between high capacitance and low leakage current. On the other hand, although a high capacitance density has been achieved, the leakage current characteristic is not satisfactory (not shown here). This is due to the inner surface roughness and chemical contamination of the template, thus resulting in local high electric fields and degrading the leakage current characteristics. The aforementioned phenomena are also reported by other groups [7,16]. Further, it is reported that the leakage current can be reduced remarkably by the introduction of barrier anodic alumina and/or ALD passivation layers in the AAO template. As an example, the leakage current density can decrease from A/cm 2 to A/cm 2 at 3 MV/cm [16]. According to the charge-discharge process of the resistor-capacitor circuit, the resistance-capacitance (RC) time constant determines the charge-discharge rate of capacitor, i.e., the power characteristics of capacitors [17]. The RC time constant is defined as τ, which means the length of time when the circuit current attains e 1 (i.e., 36.8%) of the initial value. Figure 4a shows the whole charge-discharge process of the nanocapacitor arrays with an electrode radius of 400 μm, and the inset is an equivalent resistor-capacitor circuit. The time constant is characterized by τ c in charging process as well as τ d in discharging process. Under voltage supply of 1 V, both τ c and τ d are equal to 300 ns, and such short time constants are in good agreement with the power characteristics of electrostatic capacitors. Figure 4b shows dependence of the charging current on time. Under different voltage supplies, i.e., V S1 =1 V, V S2 = 0.6 V, and V S3 = 0.2 V, the resulting time constants of τ 1, τ 2, and τ 3 are equal to 300 ns for the capacitor with an electrode radius of 400 μm, respectively. This reveals that the time Figure 4 Charge-discharge curves and charging process of the capacitor. (a) The charge-discharge curves of the fabricated capacitor with an electrode radius of 400 μm, and the inset shows the equivalent resistor-capacitor circuit. (b) The charging process of the capacitor under different voltage supplies such as 1, 0.6, and 0.2 V. constant has no dependence on the voltage supply, which is in accordance with the RC charge-discharge theory. As a result, the nanocapacitor arrays can meet a high capacitance density without sacrificing the power characteristics of the electrostatic capacitor. Conclusions In summary, high capacitance density nanocapacitor arrays have been fabricated via porous AAO template directly on silicon substrate and ALD processing. The nanocapacitor arrays based on the stack of AZO/Al 2 O 3 / AZO (12/10/12 nm) exhibit a high capacitance density of 15.3 ff/μm 2, and the RC time constant is 300 ns,

5 Li et al. Nanoscale Research Letters 2012, 7:544 Page 5 of 5 indicating good power characteristics of the electrostatic capacitor. As a result, in combination with flexible electronics and energy transformation components such as solar cells, nanocapacitor arrays could be a promising candidate as energy storage devices. Competing interests The authors declare that they have no competing interests. Authors contributions LJL carried out the main part of fabrication and analytical works. BZ and SJD participated in the sequence alignment and drafted the manuscript. HLL, QQS, AQJ, DWZ, and CZ conceived the study and participated in its design. All authors read and approved the final manuscript. 15. Hu H, Zhu CX, Yu X, Li MF, Cho BJ, Kwong DL, Foo PD, Yu MB, Liu X, Winkler J: MIM capacitors using atomic-layer-deposited high-κ (HfO 2 ) 1 x (Al 2 O 3 ) x dielectrics. IEEE Electron Device Lett. 2003, 24: Haspert LC, Lee SB, Rubloff GW: Nanoengineering strategies for metal-insulator-metal electrostatic nanocapacitors. ACS Nano 2012, 6: Conway BE: Electrochemical Supercapacitors: Scientific Fundamentals and Technological Applications. New York: Springer; doi: / x Cite this article as: Li et al.: Three-dimensional AlZnO/Al 2 O 3 /AlZnO nanocapacitor arrays on Si substrate for energy storage. Nanoscale Research Letters :544. Acknowledgments The authors thank the financial support of the National Natural Science Foundation of China (no ) and the Program for New Century Excellent Talents in University (NCET ). Author details 1 State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai , People's Republic of China. 2 Silicon Nano Device Laboratory, Department of Electrical and Computer Engineering, National University of Singapore, Singapore , Singapore. Received: 15 August 2012 Accepted: 24 September 2012 Published: 2 October 2012 References 1. Tian BZ, Zheng XL, Kempa TJ, Fang Y, Yu N, Yu G, Huang J, Lieber CM: Coaxial silicon nanowires as solar cells and nanoelectronic power sources. Nature 2007, 449: Wang X, Summers CJ, Wang ZL: Large-scale hexagonal-patterned growth of aligned ZnO nanorods for nano-optoelectronics and nanosensor arrays. Nano Lett 2004, 4: Albert FJ, Emley NC, Myers EB, Ralph DC, Buhrman RA: Quantitative study of magnetization reversal by spin-polarized current in magnetic multilayer nanopillars. Phys Rev Lett 2002, 89(1 4): Roddaro S, Nilsson K, Astromskas G, Samuelson L, Wernersson LE, Karlström O, Wacker A: InAs nanowire metal-oxide-semiconductor capacitors. Appl Phys Lett 2008, 92(1 3): Chang SW, Oh JH, Boles ST, Thompson CV: Fabrication of silicon nanopillar-based nanocapacitor arrays. Appl Phys Lett 2010, 96(1 3): Shelimov KB, Davydov DN, Moskovits M: Template-grown high-density nanocapacitor arrays. Appl Phys Lett 2000, 77: Banerjee P, Perez I, Henn-Lecordier L, Lee SB, Rubloff GW: Nanotubular metal insulator metal capacitor arrays for energy storage. Nat Nanotechnol 2009, 4: Pastore I, Poplausks R, Apsite I, Pastare I, Lombardi F, Erts D: Fabrication of ultra thin anodic aluminium oxide membranes by low anodization voltages. Mater Sci Eng 2011, 23(1 4): Tseng CA, Lin JC, Chang YF, Chyou SD, Peng KC: Microstructure and characterization of Al-doped ZnO films prepared by RF power sputtering on Al and ZnO targets. Appl Surf Sci 2012, 258: Hu X, Ling Z, Wang K, Li Y: Fabrication of three dimensional interconnected porous carbons from branched anodic aluminum oxide template. Electrochem Commun 2011, 13: Pan TM, Hsieh CI, Huang TY, Yang JR, Kuo PS: Good high-temperature stability of TiN/Al 2 O 3 /WN/TiN capacitors. IEEE Electron Device Lett. 2007, 28: Hourdakis E, Nassiopoulou AG: High-density MIM capacitors with porous anodic alumina dielectric. IEEE Trans. Electron Devices 2010, 57: Chen SB, Lai CH, Chin A, Hsieh JC, Liu J: High-density MIM capacitors using Al 2 O 3 and AlTiOx dielectrics. IEEE Electron Device LETT. 2002, 23: Allers KH, Brenner P, Schrenk M: Dielectric reliability and material properties of A1 2 O 3 in metal insulator metal capacitors (MIMCAP) for RF bipolar technologies in comparison to SiO 2, SiN and Ta 2 O 5. IEEE BCTM 2003, 3(2): Submit your manuscript to a journal and benefit from: 7 Convenient online submission 7 Rigorous peer review 7 Immediate publication on acceptance 7 Open access: articles freely available online 7 High visibility within the field 7 Retaining the copyright to your article Submit your next manuscript at 7 springeropen.com