ENGG 1203 Tutorial - 2 Recall Lab 2 - e.g. 4 input XOR. Parity checking (for interest) Recall : Simplification methods. Recall : Time Delay

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ENGG 23 Tutorial - 2 Recall Lab 2 - e.g.

number of s is odd (total number include

BC (A+A ) + A C = AB + ABC + A BC + A C =

(A+B)(A +C)(B+C) = (A+B)(A +C)((B+C)+ AA

1 ENGG 23 Tutorial - 2 Recall Lab 2 - e.g. 4 input XOR Parity checking (for interest) Parity bit Parity checking Error detection, eg. Data can be Corrupted Even parity total number of s is even Odd parity total number of s is odd (total number include Parity bit) XOR (2 input) to compute the parity. e.g. : even parity parity sum is even parity bit = parity sum is odd parity bit = 2 Recall : Simplification methods Add redundant terms Recall : Time Delay multiple by = A + A AB + BC +A C = AB + BC (A+A ) + A C = AB + ABC + A BC + A C = AB (+C) + A C (+B) = AB + A C Add = A A (A+B)(A +C)(B+C) = (A+B)(A +C)((B+C)+ AA ) = (A+B)(A +C)(B+C+A)(B+C+A ) = (A+B)((A+B)+C)(A +C)((A +C)+B) = (A+B)(A +C) 3 3 time delay 2 time delay 5 gates 2 gates 4

Question a) Simplify the circuit shown in the figure using Boolean algebra.

M NQ Solution (a) x MNQ MNQ MNQ MNQ M NQ M NQ MNQ M NQ M NQ M N N QMNQ M Q MNQ M MN M N Q Q M MN M NM NM M N M M M N 5 Less

) 6 Solution (b) Change each NAND gate in the circuit of the figure to a NOR gate First, we convert the circuit M NQ M NQ M NQ

2 Question a) Simplify the circuit shown in the figure using Boolean algebra. b) Change each NAND gate in the circuit of the figure to a NOR gate, M NQ and simplify the circuit using M NQ Boolean algebra. M NQ Solution (a) x MNQ MNQ MNQ MNQ M NQ M NQ MNQ M NQ M NQ M N N QMNQ M Q MNQ M MN M N Q Q M MN M NM NM M N M M M N 5 Less gate (power and resource) Shorter longest path => faster (what make the dalay? ) 6 Solution (b) Change each NAND gate in the circuit of the figure to a NOR gate First, we convert the circuit M NQ M NQ M NQ Then, we simplify the Boolean expression X M N Q M N Q M N Q M N QM N QM N Q (Expand) MM MN MQ NM N N NQ QM QN QQM N Q M MN MQ NM NQ QM QN QM N Q (Simplify) AB AB A B AB AA ABBABB AA A AA A A (DeMorgan's Theorem) (Group, Group) 7 8

Boolean expressions Draw the truth table and describe the function using SOP 9 Solution x AB BCC AB B C AB B C ABBC BC ABBC BC AB B C B C AB BBBCCBCC ABBC ABC B ABC Approach : Boolean simplification

3 Question 2... M MN MQNM NQ QM QN QM N Q M N QN Q QN N M N Q M QM N Q (Expand) MM MN MQ QM QN QQ M M N MN Q Q (Simplify) (Simplify) (Group, Group) (Simplify) MN QQMN Q A A A A A A Describe the function using Boolean expressions Draw the truth table and describe the function using SOP 9 Solution x AB BCC AB B C AB B C ABBC BC ABBC BC AB B C B C AB BBBCCBCC ABBC ABC B ABC Approach : Boolean simplification Find Truth Table Approach 2: Construct TT Find POS (De Morgan) (XOR expansion) (De Morgan) (De Morgan) (expansion) (grouping, expansion) (cancellation) POS: x ABC Gray Code Gray Code ( Reflected binary code RBC ) widely used in digital communications one of the most important codes. a non-weighted code, minimum change codes. 2

4 Karnaugh map grouping Rule of K-map:. No zeros allowed. 2. No diagonals. (group may be horizontal or vertical) 3. Only power of 2 number of cells in each group. 4. Groups should be as large as possible. 5. Every one must be in at least one group. 6. Overlapping allowed. 7. Wrap around allowed. (The leftmost cell in a row may be grouped with the rightmost cell and the top cell in a column may be grouped with the bottom cell. ) 8. Fewest number of groups possible. 3 K-map drawn on a torus, and in a plane. The dot-marked cells are adjacent. 4 Examples of Karnaugh map grouping Don t Care Conditions 5 6

5 Example 3 A Karnaugh map for an output involving four inputs, w, x, y, and z, is given below : Question 4 Find out the simplified f(x) from the given K-map Derive the digital logic expression for this function. 7 8 Question 5 (Question ) Solution 5(a) Simplify the Boolean expression of the circuit Change each NAND gate in the circuit to a NOR gate, and simplify the Boolean expression of the circuit M N Q x From truth table to K-map NQ M M N Q A B x 9 C 2

6 Solution 5(b) Question 6 M N Q x NQ M Simplify the following Boolean expressions using Karnaugh map. i) AB AB ii) BBC ABC AC x MN Q i) A/B AB AB A 2 22 Solution 6 ii) A/BC Example 7 A K-map for an output for four inputs, A, B, C, and D is given by : Which of the following is a possible expression for the output? Direct using K-map, we have Y CD ABD BCD BCD Ans : A 23 24

7 Example 8 A K-map for an output for four inputs, A, B, C, and D is given by : Which of the following is a possible expression for the output? Example 8 Re-group and we have Direct using K-map, we have Y AB AD BD Y AD BD AB Ans : A Example 9 Which one of the following Boolean expressions correctly represents this truth table? Kmap Example Given that A B, which of the following expressions are equivalent? Given that A B A =, B = or A =, B = Put these value to check the result Y AB BC Ans : A Ans : A 27 28

Sequential Logic Type of Flip Flop : RS, JK, D, T D

kind of gate, cost dependence Q(t) Sequential TIME

htm 29 D Q(t+) () Setup Time = t2-t (2) Propagation delay

8 Sequential Logic Type of Flip Flop : RS, JK, D, T D flip-flop Gate Timing difference timing for difference kind of gate, cost dependence Q(t) Sequential TIME D Q(t+) () Setup Time = t2-t (2) Propagation delay = t3-t2 (3) Hold time = t4-t2 What is the difference between Combinational and Sequential Circuit? Sequential factor - TIME CLK - END - 3

Boolean Algebra and Digital Logic 2009, University of Colombo School of Computing

IT 204 Section 3.0 Boolean Algebra and Digital Logic Boolean Algebra 2 Logic Equations to Truth Tables X = A. B + A. B + AB A B X 0 0 0 0 3 Sum of Products The OR operation performed on the products of