UNIT 4 MINTERM AND MAXTERM EXPANSIONS
|
|
- Cassandra Osborne
- 5 years ago
- Views:
Transcription
1 UNIT 4 MINTERM AND MAXTERM EXPANSIONS Spring 2
2 Minterm and Maxterm Expansions 2 Contents Conversion of English sentences to Boolean equations Combinational logic design using a truth table Minterm and maxterm expansions Incompletely specified functions Examples of truth table construction Design of binary adders Reading Unit 4 Words Translation IC
3 Objectives 3 Design a combinational logic circuit starting with a word description of the desired circuit behavior Steps:. Translate the word description into a switching function Boolean expression or truth table 2. Simplify the function 3. Realize it using available logic gates e.g., Mary watches TV if it is Monday night and she has finished her homework Translate Mary watches TV (F) if It is Monday night (A) And A She has finished her homework (B) F = A B B F=A B
4 Example: Designing an Alarm 4 The alarm will ring iff the alarm switch is turned on and the door is not closed, or it is after 6 P.M. and the window is not closed Translate The alarm will ring (Z) iff The alarm switch is on (A) and the door is NOT closed (B') Or It is after 6 P.M. (C) and the window is NOT closed (D') Z = A B' + C D' A B Z C D
5 5 Logic Design using a Truth Table A truth table helps translation
6 Threshold Detector (/2) 6 Design a detector that outputs when input is greater than 2 Inputs (A, B, C) 2 represent a binary number N; if N = (A, B, C) 2 3 = 2, output f = ; otherwise f = A B C f f A B C N > 2? Show the condition to make output == f B f = A'BC + AB'C' + AB'C + ABC' + ABC (SOP) = A'BC + ABC + AB'C' + AB'C + ABC' + ABC C = A + BC (Simplified using Boolean Algebra, Units 2&3) A f
7 Threshold Detector (2/2) 7 Counting s, we have SOP What if counting s? A B C f f 2 f' = A'B'C' + A'B'C + A'BC' Taking the complement by DeMorgan s law, f = (A'B'C' + A'B'C + A'BC')' = [(A' B' C')+(A' B' C)+(A' B C')]' = (A + B + C)(A + B + C')(A + B' + C) (POS) A B C N > 2? Show the condition to make output == f
8 Summary: Logic Design using a Truth Table 8 General steps:. Make a truth table according to the word description 2. Generate a Boolean expression SOP: check s POS: check s First of all, have f' in SOP, then derive f in POS 3. Simplify the Boolean expression Words Translation IC
9 9 Minterm & Maxterm Expansions
10 Minterm vs. Maxterm Definition: A minterm/maxterm of n variables is a product/sum of n literals in which each variable appears exactly once in either true or complement form (but not both) A literal is a variable or its complement, e.g., A, A' e.g., assume 3 variables Minterm: A'BC, AB'C' Maxterm: A+B+C, A+B+C' (m i )' = M i DeMorgan Each minterm corresponding one input condition Row No. ABC Minterms m i Maxterms M i m = A B C M = A + B + C m = A B C M = A + B + C 2 m 2 = A B C M 2 = A + B + C 3 m 3 = A B C M 3 = A + B + C 4 m 4 = A B C M 4 = A + B + C 5 m 5 = A B C M 5 = A + B + C 6 m 6 = A B C M 6 = A + B + C 7 m 7 = A B C M 7 = A + B + C
11 Minterm Expansion A minterm expansion or a standard sum of products: a function is written as a sum of minterms i.e., counting s e.g., f = A'BC + AB'C' + AB'C + ABC' + ABC = m 3 + m 4 + m 5 + m 6 + m 7 (m-notation) = Σ m(3, 4, 5, 6, 7) A B C N > 2? f Row No. ABC Minterms m i Maxterms M i m = A B C M = A + B + C m = A B C M = A + B + C 2 m 2 = A B C M 2 = A + B + C 3 m 3 = A B C M 3 = A + B + C 4 m 4 = A B C M 4 = A + B + C 5 m 5 = A B C M 5 = A + B + C 6 m 6 = A B C M 6 = A + B + C 7 m 7 = A B C M 7 = A + B + C
12 Maxterm Expansion 2 A maxterm expansion or a standard product of sums: a function is written as a product of of maxterms i.e., counting s e.g., f' = A'B'C' + A'B'C + A'BC' f = (A + B + C)(A + B + C')(A + B' + C) = M M M 2 (M-notation) = Π M(,, 2) A B C N > 2? f Row No. ABC Minterms m i Maxterms M i m = A B C M = A + B + C m = A B C M = A + B + C 2 m 2 = A B C M 2 = A + B + C 3 m 3 = A B C M 3 = A + B + C 4 m 4 = A B C M 4 = A + B + C 5 m 5 = A B C M 5 = A + B + C 6 m 6 = A B C M 6 = A + B + C 7 m 7 = A B C M 7 = A + B + C
13 Complement using Minterms/Maxterms 3 (m i )' = M i Complement of f:. Count s in f (find f' directly) f' = m + m + m 2 = Σ m(,, 2) f' = M 3 M 4 M 5 M 6 M 7 = Π M(3, 4, 5, 6, 7) 2. Count s in f (find f and then complement it) f' = (f)' = (m 3 + m 4 + m 5 + m 6 + m 7 )' = m 3 'm 4 'm 5 'm 6 'm 7 ' = M 3 M 4 M 5 M 6 M 7 = Π M(3, 4, 5, 6, 7) f' = (f)' = (M M M 2 )' = M ' + M ' + M 2 ' = m + m + m 2 = Σ m(,, 2) A B C f f
14 Example: Minterm/Maxterm Expansion 4 e.g., f(a, b, c, d) = a'(b' + d) + acd' f(a, b, c, d) = a'(b' + d) + acd' = a'b' + a'd + acd' = a'b'(c + c')(d + d') + a'd(b + b')(c + c') + acd'(b + b') = a'b'c'd' + a'b'c'd + a'b'cd' + a'b'cd + a'bc'd + a'bcd + abcd' + ab'cd' = Σ m(,, 2, 3, 5, 7,, 4) (Minterm Expansion) = Π M(4, 6, 8, 9,, 2, 3, 5) (Maxterm Expansion)
15 Summary (/2) 5 Convert a Boolean expression to a minterm/maxterm expansion Use truth table Sometimes there are too many terms Use Boolean algebra SOP multiply out and use (X + X')= minterm expansion POS factor and use XX'= maxterm expansion
16 Summary (2/2) 6 Convert between a minterm and a maxterm expansion If f = Σ m i, then f = Π M j, where each m j is not in f DESIRED FORM Minterm Maxterm Minterm Maxterm Expansion of f Expansion of f Expansion of f' Expansion of f' GiVEN FORM Minterm Expansion of f Maxterm Expansion of f minterm nos. are those nos. not on the maxterm list for f maxterm nos. are those nos. not on the minterm list for f list minterms not present in f minterm nos. are the same as maxterm nos. of f maxterm nos. are the same as minterm nos. of f list maxterms not present in f There is a -to- mapping between a truth table and the minterm/maxterm expansion
17 AND of Two Minterm Expansions 7 e.g., Given f = Σ m(, 2, 3, 5, 9, ), f 2 = Σ m(, 3, 9,, 3, 4), find f f 2 =? AND: take the numbers that appear in both expansions: f f 2 = Σ m(, 3, 9, ) Q: What if AND for two maxterm expansions?
18 General Truth Table 8 Q: Given three Boolean variables A, B, C, how many different Boolean functions can you produce? A: A B C f Each a i can be assigned with either or 2 8 = 256 a a a 2 a 3 a 4 a 5 a 6 a 7
19 9 Incompletely Specified Functions
20 Incompletely Specified Functions (/2) 2 A large digital system is usually divided into subcircuits Assume N never generates ABC = / for any w, x, y, z A B C F x x w x y z N don t care (DC) terms can be assigned with either or A B C N2 F F: Incompletely specified function A'B'C, ABC': don t care terms
21 Incompletely Specified Functions (2/2) 2 Impact of don t care terms on Boolean simplification: Try exhaustive combinations of DCs to find the best expression (may be stupid but works for now). Assign to both X : F = A'B'C' + A'BC + ABC = A'B'C' + BC 2. Assign to st X, and to 2 nd X : F = A'B'C' + A'B'C + A'BC + ABC = A'B' + BC 3. Assign to both X : F = A'B'C' + A'B'C + A'BC + ABC' + ABC = A'B' + BC + AB is the simplest solution Notation: F = Σ m(, 3, 7) + Σ d(, 6) F = Π M(2, 4, 5) Π D(, 6) don t care minterm and maxterm have the same numbers A B C F x x
22 22 Truth Table Construction
23 Error Detector for Codes (/2) 23 Design an error detector for codes: The output F = iff inputs (A, B, C, D) represent an invalid code combination ABCD F Decimal digit code. Construct the truth table
24 Error Detector for Codes (2/2) 24 ABCD F 2. Simplify the function F(A, B, C, D) = Σ m(2, 6,, 3, 4, 5) = A'B'CD' + A'BCD' + AB'CD' + ABCD' + ABC'D + ABCD = A'CD' + ACD' + ABD = CD' + ABD C D' A B D 3. Realize it F
25 25 A B C D Example: Truth Table Construction Decimal digit The output Z = iff the BCD number (A, B, C, D) is divisible by 3 BCD % 3 ==? code Z. Construct the truth table ABCD Z X X X X X X 2. Simplify the function Z(A, B, C, D) = Σ m(, 3, 6, 9) + Σ d(,, 2, 3, 4, 5) Logic minimization using Karnaugh map (Unit 5) 3. Realize it
26 26 Binary Adders and Subtractor Divide-and-conquer
27 -Bit Half Adder (HA) 27 Addition table: Simplify the function. Construct the truth table carry sum C = XY S = X'Y + XY' = X Y X Y Z C S X 3. Realize it S Y C
28 -Bit Full Adder (FA) 28 X Y C in. Construct the truth table X Y C in C out S Full Adder X Y + C in C out S X Y C in C out Sum 3. Realize it 2. Simplify the function C out = X'YC in + XY'C in + XYC in ' + XYC in = XY + XC in + YC in S = X'Y'C in + X'YC in ' + XY'C in ' + XYC in = X Y C in S X Y X C in Y C in C out
29 29 Designing a 4-Bit Parallel Adder (/3) A = (A 3 A 2 A A ), B = (B 3 B 2 B B ) Carry out A 3 A 2 A A + B 3 B 2 B B C 4 S 3 S 2 S S C Carry in A + B e.g., Carries C (=) How? Use a single truth table? Too big! C 4 S 3 S 2 S 4-bit Parallel Adder S C A 3 B 3 A 2 B 2 A B A B
30 Designing a 4-Bit Parallel Adder (2/3) 3 Decompose the 4 bit adder into four modules Each module adds two bits and a carry use full adder Extend to negative numbers Consider one s complement (What if two s complement?). Add just as if all numbers were positive 2. End-around carry: Add the carry out back to the rightmost bit How to detect overflow? Check sign! Add(+A, +B) A+B < 2 n (+) + (+) (-) or (-) + (-) (+) Add(+A, -B) B > A Add(-A, +B) B > A () Add(-A, -B) A+B 2 n ()
31 Designing a 4-Bit Parallel Adder (3/3) 3 S 3 S 2 S S C 4 C 3 Full Full Full Adder Adder Adder C 2 C Full Adder C A 3 B 3 A 2 B 2 A B A B Overflow detection? A B S A 3 B 3 S 3 Overflow end-around carry for s complement V = A 3 'B 3 'S 3 + A 3 B 3 S 3 '
32 Designing a Binary Subtractor (/2) 32 Consider A B = A + (-B) in 2 s complement A B = A + (-B) = A + B* = A + B_ + Convert B to 2 s complement: inverse and then add Discard the carry from the sign bit S 4 S 3 S 2 S C 5 (Ignore last carry ) Full Adder C 4 Full Adder C 3 Full Adder C 2 Full Adder C = B 4 ' B 3 ' B 2 ' B ' A 4 B 4 A 3 B 3 A 2 B 2 A B
33 Designing a Binary Subtracter (2/2) 33 Or design a full subtracter X Y = D (difference), B: borrow DIY! Cell i x i - y i - b i b i+ d i d n d i d 2 d b n+ Full Subtracter Full Subtracter b n b i+ b i b 3 Full b 2 Full b = Subtracter Subtracter x n y n x i y i x 2 y 2 x y
This form sometimes used in logic circuit, example:
Objectives: 1. Deriving of logical expression form truth tables. 2. Logical expression simplification methods: a. Algebraic manipulation. b. Karnaugh map (k-map). 1. Deriving of logical expression from
More informationUNIT 5 KARNAUGH MAPS Spring 2011
UNIT 5 KRNUGH MPS Spring 2 Karnaugh Maps 2 Contents Minimum forms of switching functions Two- and three-variable Four-variable Determination of minimum expressions using essential prime implicants Five-variable
More informationCDA 3200 Digital Systems. Instructor: Dr. Janusz Zalewski Developed by: Dr. Dahai Guo Spring 2012
CDA 3200 Digital Systems Instructor: Dr. Janusz Zalewski Developed by: Dr. Dahai Guo Spring 2012 Outline Combinational Logic Design Using a Truth Table Minterm and Maxterm Expansions General Minterm and
More informationLecture 6: Manipulation of Algebraic Functions, Boolean Algebra, Karnaugh Maps
EE210: Switching Systems Lecture 6: Manipulation of Algebraic Functions, Boolean Algebra, Karnaugh Maps Prof. YingLi Tian Feb. 21/26, 2019 Department of Electrical Engineering The City College of New York
More informationDIGITAL ELECTRONICS & it0203 Semester 3
DIGITAL ELECTRONICS & it0203 Semester 3 P.Rajasekar & C.M.T.Karthigeyan Asst.Professor SRM University, Kattankulathur School of Computing, Department of IT 8/22/2011 1 Disclaimer The contents of the slides
More informationCHAPTER III BOOLEAN ALGEBRA
CHAPTER III- CHAPTER III CHAPTER III R.M. Dansereau; v.. CHAPTER III-2 BOOLEAN VALUES INTRODUCTION BOOLEAN VALUES Boolean algebra is a form of algebra that deals with single digit binary values and variables.
More informationCHAPTER 5 KARNAUGH MAPS
CHAPTER 5 1/36 KARNAUGH MAPS This chapter in the book includes: Objectives Study Guide 5.1 Minimum Forms of Switching Functions 5.2 Two- and Three-Variable Karnaugh Maps 5.3 Four-Variable Karnaugh Maps
More informationKarnaugh Map & Boolean Expression Simplification
Karnaugh Map & Boolean Expression Simplification Mapping a Standard POS Expression For a Standard POS expression, a 0 is placed in the cell corresponding to the product term (maxterm) present in the expression.
More informationUnit 2 Session - 6 Combinational Logic Circuits
Objectives Unit 2 Session - 6 Combinational Logic Circuits Draw 3- variable and 4- variable Karnaugh maps and use them to simplify Boolean expressions Understand don t Care Conditions Use the Product-of-Sums
More informationCHAPTER III BOOLEAN ALGEBRA
CHAPTER III- CHAPTER III CHAPTER III R.M. Dansereau; v.. CHAPTER III-2 BOOLEAN VALUES INTRODUCTION BOOLEAN VALUES Boolean algebra is a form of algebra that deals with single digit binary values and variables.
More informationLecture 6: Gate Level Minimization Syed M. Mahmud, Ph.D ECE Department Wayne State University
Lecture 6: Gate Level Minimization Syed M. Mahmud, Ph.D ECE Department Wayne State University Original Source: Aby K George, ECE Department, Wayne State University Contents The Map method Two variable
More informationLecture 5: NAND, NOR and XOR Gates, Simplification of Algebraic Expressions
EE210: Switching Systems Lecture 5: NAND, NOR and XOR Gates, Simplification of Algebraic Expressions Prof. YingLi Tian Feb. 15, 2018 Department of Electrical Engineering The City College of New York The
More informationSimplification of Boolean Functions. Dept. of CSE, IEM, Kolkata
Simplification of Boolean Functions Dept. of CSE, IEM, Kolkata 1 Simplification of Boolean Functions: An implementation of a Boolean Function requires the use of logic gates. A smaller number of gates,
More information211: Computer Architecture Summer 2016
211: Computer Architecture Summer 2016 Liu Liu Topic: Storage Project3 Digital Logic - Storage: Recap - Review: cache hit rate - Project3 - Digital Logic: - truth table => SOP - simplification: Boolean
More informationEECS150 - Digital Design Lecture 19 - Combinational Logic Circuits : A Deep Dive
EECS150 - Digital Design Lecture 19 - Combinational Logic Circuits : A Deep Dive March 30, 2010 John Wawrzynek Spring 2010 EECS150 - Lec19-cl1 Page 1 Boolean Algebra I (Representations of Combinational
More informationReview for Test 1 : Ch1 5
Review for Test 1 : Ch1 5 October 5, 2006 Typeset by FoilTEX Positional Numbers 527.46 10 = (5 10 2 )+(2 10 1 )+(7 10 0 )+(4 10 1 )+(6 10 2 ) 527.46 8 = (5 8 2 ) + (2 8 1 ) + (7 8 0 ) + (4 8 1 ) + (6 8
More informationAdvanced Digital Design with the Verilog HDL, Second Edition Michael D. Ciletti Prentice Hall, Pearson Education, 2011
Problem 2-1 Recall that a minterm is a cube in which every variable appears. A Boolean expression in SOP form is canonical if every cube in the expression has a unique representation in which all of the
More informationDigital Logic Design. Combinational Logic
Digital Logic Design Combinational Logic Minterms A product term is a term where literals are ANDed. Example: x y, xz, xyz, A minterm is a product term in which all variables appear exactly once, in normal
More informationOptimizations and Tradeoffs. Combinational Logic Optimization
Optimizations and Tradeoffs Combinational Logic Optimization Optimization & Tradeoffs Up to this point, we haven t really considered how to optimize our designs. Optimization is the process of transforming
More informationSystems I: Computer Organization and Architecture
Systems I: Computer Organization and Architecture Lecture 6 - Combinational Logic Introduction A combinational circuit consists of input variables, logic gates, and output variables. The logic gates accept
More informationMC9211 Computer Organization
MC92 Computer Organization Unit : Digital Fundamentals Lesson2 : Boolean Algebra and Simplification (KSB) (MCA) (29-2/ODD) (29 - / A&B) Coverage Lesson2 Introduces the basic postulates of Boolean Algebra
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization Goal: To obtain the simplest implementation for a given function Optimization is a more formal
More informationCombinational Logic. Review of Combinational Logic 1
Combinational Logic! Switches -> Boolean algebra! Representation of Boolean functions! Logic circuit elements - logic gates! Regular logic structures! Timing behavior of combinational logic! HDLs and combinational
More informationReview. EECS Components and Design Techniques for Digital Systems. Lec 06 Minimizing Boolean Logic 9/ Review: Canonical Forms
Review EECS 150 - Components and Design Techniques for Digital Systems Lec 06 Minimizing Boolean Logic 9/16-04 David Culler Electrical Engineering and Computer Sciences University of California, Berkeley
More informationCs302 Quiz for MID TERM Exam Solved
Question # 1 of 10 ( Start time: 01:30:33 PM ) Total Marks: 1 Caveman used a number system that has distinct shapes: 4 5 6 7 Question # 2 of 10 ( Start time: 01:31:25 PM ) Total Marks: 1 TTL based devices
More informationKarnaugh Maps Objectives
Karnaugh Maps Objectives For Karnaugh Maps of up to 5 variables Plot a function from algebraic, minterm or maxterm form Obtain minimum Sum of Products and Product of Sums Understand the relationship between
More informationECEN 248: INTRODUCTION TO DIGITAL SYSTEMS DESIGN. Week 2 Dr. Srinivas Shakkottai Dept. of Electrical and Computer Engineering
ECEN 248: INTRODUCTION TO DIGITAL SYSTEMS DESIGN Week 2 Dr. Srinivas Shakkottai Dept. of Electrical and Computer Engineering Boolean Algebra Boolean Algebra A Boolean algebra is defined with: A set of
More informationChapter 7 Logic Circuits
Chapter 7 Logic Circuits Goal. Advantages of digital technology compared to analog technology. 2. Terminology of Digital Circuits. 3. Convert Numbers between Decimal, Binary and Other forms. 5. Binary
More informationELC224C. Karnaugh Maps
KARNAUGH MAPS Function Simplification Algebraic Simplification Half Adder Introduction to K-maps How to use K-maps Converting to Minterms Form Prime Implicants and Essential Prime Implicants Example on
More informationCHAPTER1: Digital Logic Circuits Combination Circuits
CS224: Computer Organization S.KHABET CHAPTER1: Digital Logic Circuits Combination Circuits 1 PRIMITIVE LOGIC GATES Each of our basic operations can be implemented in hardware using a primitive logic gate.
More informationCombinatorial Logic Design Principles
Combinatorial Logic Design Principles ECGR2181 Chapter 4 Notes Logic System Design I 4-1 Boolean algebra a.k.a. switching algebra deals with boolean values -- 0, 1 Positive-logic convention analog voltages
More informationChap 2. Combinational Logic Circuits
Overview 2 Chap 2. Combinational Logic Circuits Spring 24 Part Gate Circuits and Boolean Equations Binary Logic and Gates Boolean Algebra Standard Forms Part 2 Circuit Optimization Two-Level Optimization
More informationLecture 2 Review on Digital Logic (Part 1)
Lecture 2 Review on Digital Logic (Part 1) Xuan Silvia Zhang Washington University in St. Louis http://classes.engineering.wustl.edu/ese461/ Grading Engagement 5% Review Quiz 10% Homework 10% Labs 40%
More informationWhy digital? Overview. Number Systems. Binary to Decimal conversion
Why digital? Overview It has the following advantages over analog. It can be processed and transmitted efficiently and reliably. It can be stored and retrieved with greater accuracy. Noise level does not
More informationMinimization techniques
Pune Vidyarthi Griha s COLLEGE OF ENGINEERING, NSIK - 4 Minimization techniques By Prof. nand N. Gharu ssistant Professor Computer Department Combinational Logic Circuits Introduction Standard representation
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 1 Gate Circuits and Boolean Equations Charles Kime & Thomas Kaminski 2008 Pearson Education, Inc. (Hyperlinks are active
More informationBoolean Algebra and Logic Design (Class 2.2 1/24/2013) CSE 2441 Introduction to Digital Logic Spring 2013 Instructor Bill Carroll, Professor of CSE
Boolean Algebra and Logic Design (Class 2.2 1/24/2013) CSE 2441 Introduction to Digital Logic Spring 2013 Instructor Bill Carroll, Professor of CSE Today s Topics Boolean algebra applications in logic
More informationEEE130 Digital Electronics I Lecture #4
EEE130 Digital Electronics I Lecture #4 - Boolean Algebra and Logic Simplification - By Dr. Shahrel A. Suandi Topics to be discussed 4-1 Boolean Operations and Expressions 4-2 Laws and Rules of Boolean
More informationSignals and Systems Digital Logic System
Signals and Systems Digital Logic System Prof. Wonhee Kim Chapter 2 Design Process for Combinational Systems Step 1: Represent each of the inputs and outputs in binary Step 1.5: If necessary, break the
More informationGate-Level Minimization
Gate-Level Minimization Dr. Bassem A. Abdullah Computer and Systems Department Lectures Prepared by Dr.Mona Safar, Edited and Lectured by Dr.Bassem A. Abdullah Outline 1. The Map Method 2. Four-variable
More informationNumber System conversions
Number System conversions Number Systems The system used to count discrete units is called number system. There are four systems of arithmetic which are often used in digital electronics. Decimal Number
More informationAdministrative Notes. Chapter 2 <9>
Administrative Notes Note: New homework instructions starting with HW03 Homework is due at the beginning of class Homework must be organized, legible (messy is not), and stapled to be graded Chapter 2
More informationCombinational Logic. By : Ali Mustafa
Combinational Logic By : Ali Mustafa Contents Adder Subtractor Multiplier Comparator Decoder Encoder Multiplexer How to Analyze any combinational circuit like this? Analysis Procedure To obtain the output
More informationTotal Time = 90 Minutes, Total Marks = 50. Total /50 /10 /18
University of Waterloo Department of Electrical & Computer Engineering E&CE 223 Digital Circuits and Systems Midterm Examination Instructor: M. Sachdev October 23rd, 2007 Total Time = 90 Minutes, Total
More informationCOMBINATIONAL LOGIC FUNCTIONS
COMBINATIONAL LOGIC FUNCTIONS Digital logic circuits can be classified as either combinational or sequential circuits. A combinational circuit is one where the output at any time depends only on the present
More informationfor Digital Systems Simplification of logic functions Tajana Simunic Rosing Sources: TSR, Katz, Boriello & Vahid
SE140: omponents and Design Techniques for Digital Systems Simplification of logic functions Tajana Simunic Rosing 1 What we covered thus far: Number representations Where we are now inary, Octal, Hex,
More informationLogic Simplification. Boolean Simplification Example. Applying Boolean Identities F = A B C + A B C + A BC + ABC. Karnaugh Maps 2/10/2009 COMP370 1
Digital Logic COMP370 Introduction to Computer Architecture Logic Simplification It is frequently possible to simplify a logical expression. This makes it easier to understand and requires fewer gates
More informationSimplifying Logic Circuits with Karnaugh Maps
Simplifying Logic Circuits with Karnaugh Maps The circuit at the top right is the logic equivalent of the Boolean expression: f = abc + abc + abc Now, as we have seen, this expression can be simplified
More informationBoolean Algebra and Logic Simplification
S302 Digital Logic Design Boolean Algebra and Logic Simplification Boolean Analysis of Logic ircuits, evaluating of Boolean expressions, representing the operation of Logic circuits and Boolean expressions
More informationChapter 4. Combinational: Circuits with logic gates whose outputs depend on the present combination of the inputs. elements. Dr.
Chapter 4 Dr. Panos Nasiopoulos Combinational: Circuits with logic gates whose outputs depend on the present combination of the inputs. Sequential: In addition, they include storage elements Combinational
More informationPart 1: Digital Logic and Gates. Analog vs. Digital waveforms. The digital advantage. In real life...
Part 1: Digital Logic and Gates Analog vs Digital waveforms An analog signal assumes a continuous range of values: v(t) ANALOG A digital signal assumes discrete (isolated, separate) values Usually there
More informationCHAPTER 3 BOOLEAN ALGEBRA
CHAPTER 3 BOOLEAN ALGEBRA (continued) This chapter in the book includes: Objectives Study Guide 3.1 Multiplying Out and Factoring Expressions 3.2 Exclusive-OR and Equivalence Operations 3.3 The Consensus
More informationBoolean Algebra and Digital Logic 2009, University of Colombo School of Computing
IT 204 Section 3.0 Boolean Algebra and Digital Logic Boolean Algebra 2 Logic Equations to Truth Tables X = A. B + A. B + AB A B X 0 0 0 0 3 Sum of Products The OR operation performed on the products of
More informationL4: Karnaugh diagrams, two-, and multi-level minimization. Elena Dubrova KTH / ICT / ES
L4: Karnaugh diagrams, two-, and multi-level minimization Elena Dubrova KTH / ICT / ES dubrova@kth.se Combinatorial system a(t) not(a(t)) A combinatorial system has no memory - its output depends therefore
More informationMidterm1 Review. Jan 24 Armita
Midterm1 Review Jan 24 Armita Outline Boolean Algebra Axioms closure, Identity elements, complements, commutativity, distributivity theorems Associativity, Duality, De Morgan, Consensus theorem Shannon
More informationChapter 2 Boolean Algebra and Logic Gates
Ch1: Digital Systems and Binary Numbers Ch2: Ch3: Gate-Level Minimization Ch4: Combinational Logic Ch5: Synchronous Sequential Logic Ch6: Registers and Counters Switching Theory & Logic Design Prof. Adnan
More informationCHAPTER 7. Exercises 17/ / /2 2 0
CHAPTER 7 Exercises E7. (a) For the whole part, we have: Quotient Remainders 23/2 /2 5 5/2 2 2/2 0 /2 0 Reading the remainders in reverse order, we obtain: 23 0 = 0 2 For the fractional part we have 2
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 1 Gate Circuits and Boolean Equations Chapter 2 - Part 1 2 Chapter 2 - Part 1 3 Chapter 2 - Part 1 4 Chapter 2 - Part
More informationChapter 4 Optimized Implementation of Logic Functions
Chapter 4 Optimized Implementation of Logic Functions Logic Minimization Karnaugh Maps Systematic Approach for Logic Minimization Minimization of Incompletely Specified Functions Tabular Method for Minimization
More information1 Boolean Algebra Simplification
cs281: Computer Organization Lab3 Prelab Our objective in this prelab is to lay the groundwork for simplifying boolean expressions in order to minimize the complexity of the resultant digital logic circuit.
More informationStandard Expression Forms
ThisLecture will cover the following points: Canonical and Standard Forms MinTerms and MaxTerms Digital Logic Families 24 March 2010 Standard Expression Forms Two standard (canonical) expression forms
More informationLecture 7: Karnaugh Map, Don t Cares
EE210: Switching Systems Lecture 7: Karnaugh Map, Don t Cares Prof. YingLi Tian Feb. 28, 2019 Department of Electrical Engineering The City College of New York The City University of New York (CUNY) 1
More informationWEEK 3.1 MORE ON KARNAUGH MAPS
WEEK 3. MORE ON KARNAUGH MAPS Don t Cares Sometimes, we might have inputs and it doesn t matter what the output is; i.e., we don t care what the output is. These situations are called don t cares. Rather
More informationUnit 2 Boolean Algebra
Unit 2 Boolean Algebra 2.1 Introduction We will use variables like x or y to represent inputs and outputs (I/O) of a switching circuit. Since most switching circuits are 2 state devices (having only 2
More information14:332:231 DIGITAL LOGIC DESIGN. Combinational Circuit Synthesis
:: DIGITAL LOGIC DESIGN Ivan Marsic, Rutgers University Electrical & Computer Engineering all Lecture #: Combinational Circuit Synthesis I Combinational Circuit Synthesis Recall: Combinational circuit
More informationCh 2. Combinational Logic. II - Combinational Logic Contemporary Logic Design 1
Ch 2. Combinational Logic II - Combinational Logic Contemporary Logic Design 1 Combinational logic Define The kind of digital system whose output behavior depends only on the current inputs memoryless:
More informationComputer Organization I. Lecture 13: Design of Combinational Logic Circuits
Computer Organization I Lecture 13: Design of Combinational Logic Circuits Overview The optimization of multiple-level circuits Mapping Technology Verification Objectives To know how to optimize the multiple-level
More informationChapter 4: Combinational Logic Solutions to Problems: [1, 5, 9, 12, 19, 23, 30, 33]
Chapter 4: Combinational Logic Solutions to Problems: [, 5, 9, 2, 9, 23, 3, 33] Problem: 4- Consider the combinational circuit shown in Fig. P4-. (a) Derive the Boolean expressions for T through T 4. Evaluate
More informationZ = F(X) Combinational circuit. A combinational circuit can be specified either by a truth table. Truth Table
Lesson Objectives In this lesson, you will learn about What are combinational circuits Design procedure of combinational circuits Examples of combinational circuit design Combinational Circuits Logic circuit
More informationDigital Circuit And Logic Design I. Lecture 4
Digital Circuit And Logic Design I Lecture 4 Outline Combinational Logic Design Principles (2) 1. Combinational-circuit minimization 2. Karnaugh maps 3. Quine-McCluskey procedure Panupong Sornkhom, 2005/2
More informationChapter-2 BOOLEAN ALGEBRA
Chapter-2 BOOLEAN ALGEBRA Introduction: An algebra that deals with binary number system is called Boolean Algebra. It is very power in designing logic circuits used by the processor of computer system.
More informationII. COMBINATIONAL LOGIC DESIGN. - algebra defined on a set of 2 elements, {0, 1}, with binary operators multiply (AND), add (OR), and invert (NOT):
ENGI 386 Digital Logic II. COMBINATIONAL LOGIC DESIGN Combinational Logic output of digital system is only dependent on current inputs (i.e., no memory) (a) Boolean Algebra - developed by George Boole
More informationCPE100: Digital Logic Design I
Chapter 2 Professor Brendan Morris, SEB 3216, brendan.morris@unlv.edu http://www.ee.unlv.edu/~b1morris/cpe100/ CPE100: Digital Logic Design I Section 1004: Dr. Morris Combinational Logic Design Chapter
More informationFundamentals of Boolean Algebra
UNIT-II 1 Fundamentals of Boolean Algebra Basic Postulates Postulate 1 (Definition): A Boolean algebra is a closed algebraic system containing a set K of two or more elements and the two operators and
More informationEC-121 Digital Logic Design
EC-121 Digital Logic Design Lecture 2 [Updated on 02-04-18] Boolean Algebra and Logic Gates Dr Hashim Ali Spring 2018 Department of Computer Science and Engineering HITEC University Taxila!1 Overview What
More informationUnit 2 Boolean Algebra
Unit 2 Boolean Algebra 1. Developed by George Boole in 1847 2. Applied to the Design of Switching Circuit by Claude Shannon in 1939 Department of Communication Engineering, NCTU 1 2.1 Basic Operations
More informationCarry Look Ahead Adders
Carry Look Ahead Adders Lesson Objectives: The objectives of this lesson are to learn about: 1. Carry Look Ahead Adder circuit. 2. Binary Parallel Adder/Subtractor circuit. 3. BCD adder circuit. 4. Binary
More informationELCT201: DIGITAL LOGIC DESIGN
ELCT2: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 2 Following the slides of Dr. Ahmed H. Madian ذو الحجة 438 ه Winter
More informationBoolean Algebra & Logic Gates. By : Ali Mustafa
Boolean Algebra & Logic Gates By : Ali Mustafa Digital Logic Gates There are three fundamental logical operations, from which all other functions, no matter how complex, can be derived. These Basic functions
More informationCombinational Logic Fundamentals
Topic 3: Combinational Logic Fundamentals In this note we will study combinational logic, which is the part of digital logic that uses Boolean algebra. All the concepts presented in combinational logic
More informationCombinational Logic Circuits Part II -Theoretical Foundations
Combinational Logic Circuits Part II -Theoretical Foundations Overview Boolean Algebra Basic Logic Operations Basic Identities Basic Principles, Properties, and Theorems Boolean Function and Representations
More informationENG2410 Digital Design Combinational Logic Circuits
ENG240 Digital Design Combinational Logic Circuits Fall 207 S. Areibi School of Engineering University of Guelph Binary variables Binary Logic Can be 0 or (T or F, low or high) Variables named with single
More informationThe Karnaugh Map COE 202. Digital Logic Design. Dr. Muhamed Mudawar King Fahd University of Petroleum and Minerals
The Karnaugh Map COE 202 Digital Logic Design Dr. Muhamed Mudawar King Fahd University of Petroleum and Minerals Presentation Outline Boolean Function Minimization The Karnaugh Map (K-Map) Two, Three,
More informationLogic Design. Chapter 2: Introduction to Logic Circuits
Logic Design Chapter 2: Introduction to Logic Circuits Introduction Logic circuits perform operation on digital signal Digital signal: signal values are restricted to a few discrete values Binary logic
More informationKarnaugh Maps ف ر آ ا د : ا ا ب ا م آ ه ا ن ر ا
Karnaugh Maps مخطط آارنوف اعداد:محمد اسماعيل آلية علوم الحاسوب جامعة امدرمان الاهلية الاهداء الي آل من يسلك طريق العلم والمعرفة في هذا المجال Venn Diagrams Venn diagram to represent the space of minterms.
More informationSlide Set 3. for ENEL 353 Fall Steve Norman, PhD, PEng. Electrical & Computer Engineering Schulich School of Engineering University of Calgary
Slide Set 3 for ENEL 353 Fall 2016 Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary Fall Term, 2016 SN s ENEL 353 Fall 2016 Slide Set 3 slide
More informationEE40 Lec 15. Logic Synthesis and Sequential Logic Circuits
EE40 Lec 15 Logic Synthesis and Sequential Logic Circuits Prof. Nathan Cheung 10/20/2009 Reading: Hambley Chapters 7.4-7.6 Karnaugh Maps: Read following before reading textbook http://www.facstaff.bucknell.edu/mastascu/elessonshtml/logic/logic3.html
More informationIntroduction to Karnaugh Maps
Introduction to Karnaugh Maps Review So far, you (the students) have been introduced to truth tables, and how to derive a Boolean circuit from them. We will do an example. Consider the truth table for
More informationNumbers & Arithmetic. Hakim Weatherspoon CS 3410, Spring 2012 Computer Science Cornell University. See: P&H Chapter , 3.2, C.5 C.
Numbers & Arithmetic Hakim Weatherspoon CS 3410, Spring 2012 Computer Science Cornell University See: P&H Chapter 2.4-2.6, 3.2, C.5 C.6 Example: Big Picture Computer System Organization and Programming
More informationUnit 3 Session - 9 Data-Processing Circuits
Objectives Unit 3 Session - 9 Data-Processing Design of multiplexer circuits Discuss multiplexer applications Realization of higher order multiplexers using lower orders (multiplexer trees) Introduction
More informationCombina-onal Logic Chapter 4. Topics. Combina-on Circuit 10/13/10. EECE 256 Dr. Sidney Fels Steven Oldridge
Combina-onal Logic Chapter 4 EECE 256 Dr. Sidney Fels Steven Oldridge Topics Combina-onal circuits Combina-onal analysis Design procedure simple combined to make complex adders, subtractors, converters
More informationCombinational Logic Design/Circuits
3 ` Combinational Logic Design/Circuits Chapter-3(Hours : 12 Marks:24 ) Combinational Logic design / Circuits 3.1 Simplification of Boolean expression using Boolean algebra. 3.2 Construction of logical
More informationLogic Design I (17.341) Fall Lecture Outline
Logic Design I (17.341) Fall 2011 Lecture Outline Class # 06 October 24, 2011 Dohn Bowden 1 Today s Lecture Administrative Main Logic Topic Homework 2 Course Admin 3 Administrative Admin for tonight Syllabus
More informationMODULAR CIRCUITS CHAPTER 7
CHAPTER 7 MODULAR CIRCUITS A modular circuit is a digital circuit that performs a specific function or has certain usage. The modular circuits to be introduced in this chapter are decoders, encoders, multiplexers,
More informationDigital Logic Design. Malik Najmus Siraj
Digital Logic Design Malik Najmus Siraj siraj@case.edu.pkedu LECTURE 4 Today s Agenda Recap 2 s complement Binary Logic Boolean algebra Recap Computer Arithmetic Signed numbers Radix and diminished radix
More informationCSE 140, Lecture 2 Combinational Logic CK Cheng CSE Dept. UC San Diego
CSE 140, Lecture 2 Combinational Logic CK Cheng CSE Dept. UC San Diego 1 Combinational Logic Outlines 1. Introduction 1. Scope 2. Review of Boolean lgebra 3. Review: Laws/Theorems and Digital Logic 2.
More information2 Application of Boolean Algebra Theorems (15 Points - graded for completion only)
CSE140 HW1 Solution (100 Points) 1 Introduction The purpose of this assignment is three-fold. First, it aims to help you practice the application of Boolean Algebra theorems to transform and reduce Boolean
More informationChapter 2 : Boolean Algebra and Logic Gates
Chapter 2 : Boolean Algebra and Logic Gates By Electrical Engineering Department College of Engineering King Saud University 1431-1432 2.1. Basic Definitions 2.2. Basic Theorems and Properties of Boolean
More informationUNIT 3 BOOLEAN ALGEBRA (CONT D)
UNIT 3 BOOLEAN ALGEBRA (CONT D) Spring 2011 Boolean Algebra (cont d) 2 Contents Multiplying out and factoring expressions Exclusive-OR and Exclusive-NOR operations The consensus theorem Summary of algebraic
More informationChapter 2: Switching Algebra and Logic Circuits
Chapter 2: Switching Algebra and Logic Circuits Formal Foundation of Digital Design In 1854 George Boole published An investigation into the Laws of Thoughts Algebraic system with two values 0 and 1 Used
More information