Computer Organization I. Lecture 13: Design of Combinational Logic Circuits
|
|
- Winifred Hoover
- 6 years ago
- Views:
Transcription
1 Computer Organization I Lecture 13: Design of Combinational Logic Circuits
2 Overview The optimization of multiple-level circuits Mapping Technology Verification
3 Objectives To know how to optimize the multiple-level circuits To know how to map circuits with AND, OR, Inverters into circuits with NAND (NOR) gates To understand how to verify the circuits
4 Multiple-level optimization Multiple-level circuits are circuits that are not twolevel (with or without input and/or output inverters) Multiple-level circuits can have reduced gate input cost compared to two-level (SOP and POS) circuits eg G = ABC + ABD + E + ACF + ADF, after simplification G = A(B+F)(C+D) + E Multiple-level optimization is performed by applying transformations to circuits represented by equations while evaluating cost
5 Important Transformation Rules Factoring - finding a factored form from SOP or POS expression Decomposition - expression of a function as a set of new functions Substitution of G into F - expression function F as a function of G and some or all of its original variables Elimination - Inverse of substitution
6 Transformation Examples Algebraic Factoring F = ACD + ABC + ABC + ACD G = 16 Factoring: F = A ( CD + BC ) + A (BC + CD) Factoring again: F = ( AC + AC) (B + D) G = 10 Note: G is the Gate Input Cost without Inverters, it is equal to the number of AND inputs and the number of OR gate inputs
7 Transformation Examples Decomposition The simplified function: F = ( AC + AC) (B + D) The terms B + D and AC + AC can be defined as new functions E and H respectively, decomposing F: F = E H, E = B + D, and H = AC + AC G = 10 This series of transformations has reduced G from 16 to 10, a substantial savings The resulting circuit has three levels plus input inverters
8 Transformation Examples Elimination Beginning with a new set of functions: X = B + C Y = A + B Z = A X + C Y G = 10 Eliminating X and Y from Z: Z = A (B + C) + C (A + B) G = 10 Flattening (Converting to SOP expression): Z = AB + AC + AC + BC G = 12 This has increased the cost, but has provided an new SOP expression for two-level optimization
9 Transformation Examples Two-level Optimization The result of 2-level optimization is: Z = A B + C G = 4 This example illustrates that: Optimization can begin with any set of equations, not just with minterms or a truth table Increasing gate input count G temporarily during a series of transformations can result in a final solution with a smaller G
10 Extraction Beginning with two functions: E = ABD + ABD Transformation Examples H = BCD + BCD G = 16 Finding a common factor and defining it as a function: F = BD + BD We perform extraction by expressing E and H as the three functions: F = BD + BD, E = AF, H = CF G = 10 The reduced cost G results from the sharing of logic between the two output functions
11 Mapping Technologies Technology Mapping Mapping AND, OR, NOT To NAND gates Mapping AND, OR, NOT To NOR gates The mapping is accomplished by: Replacing AND and OR symbols, Pushing inverters through circuit fan-out points, and Canceling inverter pairs
12 1 Replace ANDs and ORs: Technology Mapping - NAND Mapping Algorithm 2 Repeat the following pair of actions until there is at most one inverter between : a A circuit input or driving NAND gate output, and b The attached NAND gate inputs
13 Technology Mapping - NAND Mapping Example A B C D E (a) F A B C D E 7 8 Y 5 X 1 3 (b) OI F A B 5 7 Y X 5 6 C D F E (c) (d)
14 1 Replace ANDs and ORs: Technology Mapping - NOR Mapping Algorithm 2 Repeat the following pair of actions until there is at most one inverter between : a A circuit input or driving NOR gate output, and b The attached NOR gate inputs
15 Technology Mapping - NOR Mapping Example A B A B C D E (a) A B F C D E 1 X (b) 3 2 F C F D E (c)
16 Verification Verification - show that the final circuit designed implements the original specification Simple specifications are: truth tables Boolean equations To verify if the above result from formulation are the same with the original specification or not, it is critical that the formulation process be flawless for the verification to be valid!
17 Manual Logic Analysis Verification - Basic Verification Methods Find the truth table or Boolean equations for the final circuit Compare the final circuit truth table with the specified truth table, or Show that the Boolean equations for the final circuit are equal to the specified Boolean equations Simulation Simulate the final circuit and the specified truth table or equations using test input values that fully validate correctness The obvious test for a combinational circuit is application of all possible care input combinations from the specification
18 Verification Example - Manual Analysis BCD-to-Excess 3 Code Converter Find the SOP Boolean equations from the final circuit Find the truth table from these equations Compare to the formulation truth table Finding the Boolean Equations: T 1 = C + D = C + D A W W = A (T 1 B) = A + B T 1 X = (T 1 B) (B CD ) = B T 1 + B CD Y = C D+ C D = CD + CD B C X D Y Z
19 Input BCD A B C D Output Excess -3 WXYZ Verification Example - Manual Analysis Find the circuit truth table from the equations and compare to specification truth table: The tables match!
20 Summary Multiple Level Optimization Mapping Technology Verification Approach
21 Thank you Q & A
Chapter 3 Combinational Logic Design
Logic and Computer Design Fundamentals Chapter 3 Combinational Logic Design Part 1- Implementation Technology and Logic Design Overview Part 1-Implementation Technology and Logic Design Design Concepts
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization Goal: To obtain the simplest implementation for a given function Optimization is a more formal
More informationLecture 5: NAND, NOR and XOR Gates, Simplification of Algebraic Expressions
EE210: Switching Systems Lecture 5: NAND, NOR and XOR Gates, Simplification of Algebraic Expressions Prof. YingLi Tian Feb. 15, 2018 Department of Electrical Engineering The City College of New York The
More informationLecture 6: Manipulation of Algebraic Functions, Boolean Algebra, Karnaugh Maps
EE210: Switching Systems Lecture 6: Manipulation of Algebraic Functions, Boolean Algebra, Karnaugh Maps Prof. YingLi Tian Feb. 21/26, 2019 Department of Electrical Engineering The City College of New York
More informationChap 2. Combinational Logic Circuits
Overview 2 Chap 2. Combinational Logic Circuits Spring 24 Part Gate Circuits and Boolean Equations Binary Logic and Gates Boolean Algebra Standard Forms Part 2 Circuit Optimization Two-Level Optimization
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization Charles Kime & Thomas Kaminski 2004 Pearson Education, Inc. Terms of Use (Hyperlinks are active
More informationEEE130 Digital Electronics I Lecture #4
EEE130 Digital Electronics I Lecture #4 - Boolean Algebra and Logic Simplification - By Dr. Shahrel A. Suandi Topics to be discussed 4-1 Boolean Operations and Expressions 4-2 Laws and Rules of Boolean
More informationLogic Gate Level. Part 2
Logic Gate Level Part 2 Constructing Boolean expression from First method: write nonparenthesized OR of ANDs Each AND is a 1 in the result column of the truth table Works best for table with relatively
More informationSimplification of Boolean Functions. Dept. of CSE, IEM, Kolkata
Simplification of Boolean Functions Dept. of CSE, IEM, Kolkata 1 Simplification of Boolean Functions: An implementation of a Boolean Function requires the use of logic gates. A smaller number of gates,
More informationGate-Level Minimization
Gate-Level Minimization Dr. Bassem A. Abdullah Computer and Systems Department Lectures Prepared by Dr.Mona Safar, Edited and Lectured by Dr.Bassem A. Abdullah Outline 1. The Map Method 2. Four-variable
More informationOptimizations and Tradeoffs. Combinational Logic Optimization
Optimizations and Tradeoffs Combinational Logic Optimization Optimization & Tradeoffs Up to this point, we haven t really considered how to optimize our designs. Optimization is the process of transforming
More informationChapter 4 BOOLEAN ALGEBRA AND THEOREMS, MINI TERMS AND MAX TERMS
Chapter 4 BOOLEAN ALGEBRA AND THEOREMS, MINI TERMS AND MAX TERMS Lesson 4 BOOLEAN EXPRESSION, TRUTH TABLE and SUM OF THE PRODUCTS (SOPs) [MINITERMS] 2 Outline SOP two variables cases SOP for three variable
More informationEx: Boolean expression for majority function F = A'BC + AB'C + ABC ' + ABC.
Boolean Expression Forms: Sum-of-products (SOP) Write an AND term for each input combination that produces a 1 output. Write the input variable if its value is 1; write its complement otherwise. OR the
More informationZ = F(X) Combinational circuit. A combinational circuit can be specified either by a truth table. Truth Table
Lesson Objectives In this lesson, you will learn about What are combinational circuits Design procedure of combinational circuits Examples of combinational circuit design Combinational Circuits Logic circuit
More informationKarnaugh Map & Boolean Expression Simplification
Karnaugh Map & Boolean Expression Simplification Mapping a Standard POS Expression For a Standard POS expression, a 0 is placed in the cell corresponding to the product term (maxterm) present in the expression.
More informationUnit 2 Session - 6 Combinational Logic Circuits
Objectives Unit 2 Session - 6 Combinational Logic Circuits Draw 3- variable and 4- variable Karnaugh maps and use them to simplify Boolean expressions Understand don t Care Conditions Use the Product-of-Sums
More informationELCT201: DIGITAL LOGIC DESIGN
ELCT2: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 2 Following the slides of Dr. Ahmed H. Madian ذو الحجة 438 ه Winter
More informationCHAPTER 3 BOOLEAN ALGEBRA
CHAPTER 3 BOOLEAN ALGEBRA (continued) This chapter in the book includes: Objectives Study Guide 3.1 Multiplying Out and Factoring Expressions 3.2 Exclusive-OR and Equivalence Operations 3.3 The Consensus
More informationThis form sometimes used in logic circuit, example:
Objectives: 1. Deriving of logical expression form truth tables. 2. Logical expression simplification methods: a. Algebraic manipulation. b. Karnaugh map (k-map). 1. Deriving of logical expression from
More informationMultilevel Logic Synthesis Algebraic Methods
Multilevel Logic Synthesis Algebraic Methods Logic Circuits Design Seminars WS2010/2011, Lecture 6 Ing. Petr Fišer, Ph.D. Department of Digital Design Faculty of Information Technology Czech Technical
More informationUNIT 5 KARNAUGH MAPS Spring 2011
UNIT 5 KRNUGH MPS Spring 2 Karnaugh Maps 2 Contents Minimum forms of switching functions Two- and three-variable Four-variable Determination of minimum expressions using essential prime implicants Five-variable
More informationL4: Karnaugh diagrams, two-, and multi-level minimization. Elena Dubrova KTH / ICT / ES
L4: Karnaugh diagrams, two-, and multi-level minimization Elena Dubrova KTH / ICT / ES dubrova@kth.se Combinatorial system a(t) not(a(t)) A combinatorial system has no memory - its output depends therefore
More informationLecture 6: Gate Level Minimization Syed M. Mahmud, Ph.D ECE Department Wayne State University
Lecture 6: Gate Level Minimization Syed M. Mahmud, Ph.D ECE Department Wayne State University Original Source: Aby K George, ECE Department, Wayne State University Contents The Map method Two variable
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 1 Gate Circuits and Boolean Equations Chapter 2 - Part 1 2 Chapter 2 - Part 1 3 Chapter 2 - Part 1 4 Chapter 2 - Part
More informationPrinciples of Computer Architecture. Appendix B: Reduction of Digital Logic. Chapter Contents
B-1 Principles of Computer Architecture Miles Murdocca and Vincent Heuring Appendix B: Reduction of Digital Logic B-2 Chapter Contents B.1 Reduction of Combinational Logic and Sequential Logic B.2 Reduction
More informationKarnaugh Maps Objectives
Karnaugh Maps Objectives For Karnaugh Maps of up to 5 variables Plot a function from algebraic, minterm or maxterm form Obtain minimum Sum of Products and Product of Sums Understand the relationship between
More informationCSE 140 Midterm I - Solution
CSE 140 Midterm I - Solution 1. Answer the following questions given the logic circuit below. (15 points) a. (5 points) How many CMOS transistors does the given (unsimplified) circuit have. b. (6 points)
More informationEXPERIMENT #4: SIMPLIFICATION OF BOOLEAN FUNCTIONS
EXPERIMENT #4: SIMPLIFICATION OF BOOLEAN FUNCTIONS OBJECTIVES: Simplify Boolean functions using K-map method Obtain Boolean expressions from timing diagrams Design and implement logic circuits Equipment
More informationSystems I: Computer Organization and Architecture
Systems I: Computer Organization and Architecture Lecture 6 - Combinational Logic Introduction A combinational circuit consists of input variables, logic gates, and output variables. The logic gates accept
More informationSignals and Systems Digital Logic System
Signals and Systems Digital Logic System Prof. Wonhee Kim Chapter 2 Design Process for Combinational Systems Step 1: Represent each of the inputs and outputs in binary Step 1.5: If necessary, break the
More informationChapter 7 Logic Circuits
Chapter 7 Logic Circuits Goal. Advantages of digital technology compared to analog technology. 2. Terminology of Digital Circuits. 3. Convert Numbers between Decimal, Binary and Other forms. 5. Binary
More informationLecture 2 Review on Digital Logic (Part 1)
Lecture 2 Review on Digital Logic (Part 1) Xuan Silvia Zhang Washington University in St. Louis http://classes.engineering.wustl.edu/ese461/ Grading Engagement 5% Review Quiz 10% Homework 10% Labs 40%
More informationDigital Logic Design ABC. Representing Logic Operations. Dr. Kenneth Wong. Determining output level from a diagram. Laws of Boolean Algebra
Digital Logic Design ENGG1015 1 st Semester, 2011 Representing Logic Operations Each function can be represented equivalently in 3 ways: Truth table Boolean logic expression Schematics Truth Table Dr.
More informationMC9211 Computer Organization
MC92 Computer Organization Unit : Digital Fundamentals Lesson2 : Boolean Algebra and Simplification (KSB) (MCA) (29-2/ODD) (29 - / A&B) Coverage Lesson2 Introduces the basic postulates of Boolean Algebra
More informationChapter 3. Boolean Algebra. (continued)
Chapter 3. Boolean Algebra (continued) Algebraic structure consisting of: set of elements B binary operations {+, -} unary operation {'} Boolean Algebra such that the following axioms hold:. B contains
More informationUNIT 4 MINTERM AND MAXTERM EXPANSIONS
UNIT 4 MINTERM AND MAXTERM EXPANSIONS Spring 2 Minterm and Maxterm Expansions 2 Contents Conversion of English sentences to Boolean equations Combinational logic design using a truth table Minterm and
More informationAdvanced Digital Design with the Verilog HDL, Second Edition Michael D. Ciletti Prentice Hall, Pearson Education, 2011
Problem 2-1 Recall that a minterm is a cube in which every variable appears. A Boolean expression in SOP form is canonical if every cube in the expression has a unique representation in which all of the
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 1 Gate Circuits and Boolean Equations Charles Kime & Thomas Kaminski 2008 Pearson Education, Inc. (Hyperlinks are active
More informationMODULAR CIRCUITS CHAPTER 7
CHAPTER 7 MODULAR CIRCUITS A modular circuit is a digital circuit that performs a specific function or has certain usage. The modular circuits to be introduced in this chapter are decoders, encoders, multiplexers,
More informationChapter 2: Switching Algebra and Logic Circuits
Chapter 2: Switching Algebra and Logic Circuits Formal Foundation of Digital Design In 1854 George Boole published An investigation into the Laws of Thoughts Algebraic system with two values 0 and 1 Used
More informationELC224C. Karnaugh Maps
KARNAUGH MAPS Function Simplification Algebraic Simplification Half Adder Introduction to K-maps How to use K-maps Converting to Minterms Form Prime Implicants and Essential Prime Implicants Example on
More informationLecture 7: Karnaugh Map, Don t Cares
EE210: Switching Systems Lecture 7: Karnaugh Map, Don t Cares Prof. YingLi Tian Feb. 28, 2019 Department of Electrical Engineering The City College of New York The City University of New York (CUNY) 1
More informationReduction of Logic Equations using Karnaugh Maps
Reduction of Logic Equations using Karnaugh Maps The design of the voting machine resulted in a final logic equation that was: z = (a*c) + (a*c) + (a*b) + (a*b*c) However, a simple examination of this
More informationCHAPTER 7. Exercises 17/ / /2 2 0
CHAPTER 7 Exercises E7. (a) For the whole part, we have: Quotient Remainders 23/2 /2 5 5/2 2 2/2 0 /2 0 Reading the remainders in reverse order, we obtain: 23 0 = 0 2 For the fractional part we have 2
More informationCHAPTER 5 KARNAUGH MAPS
CHAPTER 5 1/36 KARNAUGH MAPS This chapter in the book includes: Objectives Study Guide 5.1 Minimum Forms of Switching Functions 5.2 Two- and Three-Variable Karnaugh Maps 5.3 Four-Variable Karnaugh Maps
More informationChapter 2 Boolean Algebra and Logic Gates
Ch1: Digital Systems and Binary Numbers Ch2: Ch3: Gate-Level Minimization Ch4: Combinational Logic Ch5: Synchronous Sequential Logic Ch6: Registers and Counters Switching Theory & Logic Design Prof. Adnan
More informationCombinational Logic. Review of Combinational Logic 1
Combinational Logic! Switches -> Boolean algebra! Representation of Boolean functions! Logic circuit elements - logic gates! Regular logic structures! Timing behavior of combinational logic! HDLs and combinational
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 3 Additional Gates and Circuits Overview Part 1 Gate Circuits and Boolean Equations Binary Logic and Gates Boolean Algebra
More informationNumber System conversions
Number System conversions Number Systems The system used to count discrete units is called number system. There are four systems of arithmetic which are often used in digital electronics. Decimal Number
More informationII. COMBINATIONAL LOGIC DESIGN. - algebra defined on a set of 2 elements, {0, 1}, with binary operators multiply (AND), add (OR), and invert (NOT):
ENGI 386 Digital Logic II. COMBINATIONAL LOGIC DESIGN Combinational Logic output of digital system is only dependent on current inputs (i.e., no memory) (a) Boolean Algebra - developed by George Boole
More informationENG2410 Digital Design Combinational Logic Circuits
ENG240 Digital Design Combinational Logic Circuits Fall 207 S. Areibi School of Engineering University of Guelph Binary variables Binary Logic Can be 0 or (T or F, low or high) Variables named with single
More informationUniversity of California at Berkeley College of Engineering Department of Electrical Engineering and Computer Science SOLUTIONS
EECS 150 Spring 27 University of California at Berkeley College of Engineering Department of Electrical Engineering and Computer Science SOLUTIONS R. H. Katz Problem Set #2: Programmable Logic Assigned
More informationDigital Logic Design. Combinational Logic
Digital Logic Design Combinational Logic Minterms A product term is a term where literals are ANDed. Example: x y, xz, xyz, A minterm is a product term in which all variables appear exactly once, in normal
More informationCHAPTER III BOOLEAN ALGEBRA
CHAPTER III- CHAPTER III CHAPTER III R.M. Dansereau; v.. CHAPTER III-2 BOOLEAN VALUES INTRODUCTION BOOLEAN VALUES Boolean algebra is a form of algebra that deals with single digit binary values and variables.
More informationUnit 2 Boolean Algebra
Unit 2 Boolean Algebra 1. Developed by George Boole in 1847 2. Applied to the Design of Switching Circuit by Claude Shannon in 1939 Department of Communication Engineering, NCTU 1 2.1 Basic Operations
More information211: Computer Architecture Summer 2016
211: Computer Architecture Summer 2016 Liu Liu Topic: Storage Project3 Digital Logic - Storage: Recap - Review: cache hit rate - Project3 - Digital Logic: - truth table => SOP - simplification: Boolean
More informationENGR 303 Introduction to Logic Design Lecture 3. Dr. Chuck Brown Engineering and Computer Information Science Folsom Lake College
Introduction to Logic Design Lecture 3 Dr. Chuck rown Engineering and Computer Information Science Folsom Lake College Outline for Todays Lecture Logic Circuits SOP / POS oolean Theorems DeMorgan s Theorem
More informationEE40 Lec 15. Logic Synthesis and Sequential Logic Circuits
EE40 Lec 15 Logic Synthesis and Sequential Logic Circuits Prof. Nathan Cheung 10/20/2009 Reading: Hambley Chapters 7.4-7.6 Karnaugh Maps: Read following before reading textbook http://www.facstaff.bucknell.edu/mastascu/elessonshtml/logic/logic3.html
More informationCSE20: Discrete Mathematics for Computer Science. Lecture Unit 2: Boolan Functions, Logic Circuits, and Implication
CSE20: Discrete Mathematics for Computer Science Lecture Unit 2: Boolan Functions, Logic Circuits, and Implication Disjunctive normal form Example: Let f (x, y, z) =xy z. Write this function in DNF. Minterm
More information1. Expand each of the following functions into a canonical sum-of-products expression.
CHAPTER 4 PROLEMS 1. Expand each of the following functions into a canonical sum-of-products expression. (a) F(x, y, z) = xy + y z + x (b) F(w, x, y, z) = x y + wxy + w yz (c) F(A,,C,D) = AC + CD + C D
More informationUnit 3 Session - 9 Data-Processing Circuits
Objectives Unit 3 Session - 9 Data-Processing Design of multiplexer circuits Discuss multiplexer applications Realization of higher order multiplexers using lower orders (multiplexer trees) Introduction
More informationBoolean Algebra and Logic Simplification
S302 Digital Logic Design Boolean Algebra and Logic Simplification Boolean Analysis of Logic ircuits, evaluating of Boolean expressions, representing the operation of Logic circuits and Boolean expressions
More informationENGG 1203 Tutorial - 2 Recall Lab 2 - e.g. 4 input XOR. Parity checking (for interest) Recall : Simplification methods. Recall : Time Delay
ENGG 23 Tutorial - 2 Recall Lab 2 - e.g. 4 input XOR Parity checking (for interest) Parity bit Parity checking Error detection, eg. Data can be Corrupted Even parity total number of s is even Odd parity
More informationEECS150 - Digital Design Lecture 19 - Combinational Logic Circuits : A Deep Dive
EECS150 - Digital Design Lecture 19 - Combinational Logic Circuits : A Deep Dive March 30, 2010 John Wawrzynek Spring 2010 EECS150 - Lec19-cl1 Page 1 Boolean Algebra I (Representations of Combinational
More informationAdministrative Notes. Chapter 2 <9>
Administrative Notes Note: New homework instructions starting with HW03 Homework is due at the beginning of class Homework must be organized, legible (messy is not), and stapled to be graded Chapter 2
More informationCS 226: Digital Logic Design
CS 226: Digital Logic Design 0 1 1 I S 0 1 0 S Department of Computer Science and Engineering, Indian Institute of Technology Bombay. 1 of 29 Objectives In this lecture we will introduce: 1. Logic functions
More informationLecture 4: More Boolean Algebra
Lecture 4: More Boolean Algebra Syed M. Mahmud, Ph.D ECE Department Wayne State University Original Source: Prof. Russell Tessier of University of Massachusetts Aby George of Wayne State University ENGIN2
More informationCHAPTER III BOOLEAN ALGEBRA
CHAPTER III- CHAPTER III CHAPTER III R.M. Dansereau; v.. CHAPTER III-2 BOOLEAN VALUES INTRODUCTION BOOLEAN VALUES Boolean algebra is a form of algebra that deals with single digit binary values and variables.
More informationECE 238L Boolean Algebra - Part I
ECE 238L Boolean Algebra - Part I August 29, 2008 Typeset by FoilTEX Understand basic Boolean Algebra Boolean Algebra Objectives Relate Boolean Algebra to Logic Networks Prove Laws using Truth Tables Understand
More informationBoolean Algebra and Logic Design (Class 2.2 1/24/2013) CSE 2441 Introduction to Digital Logic Spring 2013 Instructor Bill Carroll, Professor of CSE
Boolean Algebra and Logic Design (Class 2.2 1/24/2013) CSE 2441 Introduction to Digital Logic Spring 2013 Instructor Bill Carroll, Professor of CSE Today s Topics Boolean algebra applications in logic
More informationMinimization techniques
Pune Vidyarthi Griha s COLLEGE OF ENGINEERING, NSIK - 4 Minimization techniques By Prof. nand N. Gharu ssistant Professor Computer Department Combinational Logic Circuits Introduction Standard representation
More informationBoolean Algebra and Digital Logic 2009, University of Colombo School of Computing
IT 204 Section 3.0 Boolean Algebra and Digital Logic Boolean Algebra 2 Logic Equations to Truth Tables X = A. B + A. B + AB A B X 0 0 0 0 3 Sum of Products The OR operation performed on the products of
More informationCprE 281: Digital Logic
CprE 28: Digital Logic Instructor: Alexander Stoytchev http://www.ece.iastate.edu/~alexs/classes/ Examples of Solved Problems CprE 28: Digital Logic Iowa State University, Ames, IA Copyright Alexander
More informationPart 1: Digital Logic and Gates. Analog vs. Digital waveforms. The digital advantage. In real life...
Part 1: Digital Logic and Gates Analog vs Digital waveforms An analog signal assumes a continuous range of values: v(t) ANALOG A digital signal assumes discrete (isolated, separate) values Usually there
More informationLecture 3: Boolean Algebra
Lecture 3: Boolean Algebra Syed M. Mahmud, Ph.D ECE Department Wayne State University Original Source: Prof. Russell Tessier of University of Massachusetts Aby George of Wayne State University Overview
More informationMidterm1 Review. Jan 24 Armita
Midterm1 Review Jan 24 Armita Outline Boolean Algebra Axioms closure, Identity elements, complements, commutativity, distributivity theorems Associativity, Duality, De Morgan, Consensus theorem Shannon
More informationCHAPTER 2 BOOLEAN ALGEBRA
CHAPTER 2 BOOLEAN ALGEBRA This chapter in the book includes: Objectives Study Guide 2.1 Introduction 2.2 Basic Operations 2.3 Boolean Expressions and Truth Tables 2.4 Basic Theorems 2.5 Commutative, Associative,
More informationUNIT 3 BOOLEAN ALGEBRA (CONT D)
UNIT 3 BOOLEAN ALGEBRA (CONT D) Spring 2011 Boolean Algebra (cont d) 2 Contents Multiplying out and factoring expressions Exclusive-OR and Exclusive-NOR operations The consensus theorem Summary of algebraic
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 3 Additional Gates and Circuits Charles Kime & Thomas Kaminski 2008 Pearson Education, Inc. (Hyperlinks are active in
More informationReview. EECS Components and Design Techniques for Digital Systems. Lec 06 Minimizing Boolean Logic 9/ Review: Canonical Forms
Review EECS 150 - Components and Design Techniques for Digital Systems Lec 06 Minimizing Boolean Logic 9/16-04 David Culler Electrical Engineering and Computer Sciences University of California, Berkeley
More informationBoolean Algebra & Logic Gates. By : Ali Mustafa
Boolean Algebra & Logic Gates By : Ali Mustafa Digital Logic Gates There are three fundamental logical operations, from which all other functions, no matter how complex, can be derived. These Basic functions
More informationCombinational Logic Design
PEN 35 - igital System esign ombinational Logic esign hapter 3 Logic and omputer esign Fundamentals, 4 rd Ed., Mano 2008 Pearson Prentice Hall esign oncepts and utomation top-down design proceeds from
More informationINTRO TO I & CT. (Boolean Algebra and Logic Simplification.) Lecture # By: Department of CS & IT.
INTRO TO I & CT. (Boolean Algebra and Logic Simplification.) Lecture # 13-14 By: M.Nadeem Akhtar. Department of CS & IT. URL: https://sites.google.com/site/nadeemcsuoliict/home/lectures 1 Boolean Algebra
More informationCPE100: Digital Logic Design I
Chapter 2 Professor Brendan Morris, SEB 3216, brendan.morris@unlv.edu http://www.ee.unlv.edu/~b1morris/cpe100/ CPE100: Digital Logic Design I Section 1004: Dr. Morris Combinational Logic Design Chapter
More informationThe Karnaugh Map COE 202. Digital Logic Design. Dr. Muhamed Mudawar King Fahd University of Petroleum and Minerals
The Karnaugh Map COE 202 Digital Logic Design Dr. Muhamed Mudawar King Fahd University of Petroleum and Minerals Presentation Outline Boolean Function Minimization The Karnaugh Map (K-Map) Two, Three,
More information( c) Give logic symbol, Truth table and circuit diagram for a clocked SR flip-flop. A combinational circuit is defined by the function
Question Paper Digital Electronics (EE-204-F) MDU Examination May 2015 1. (a) represent (32)10 in (i) BCD 8421 code (ii) Excess-3 code (iii) ASCII code (b) Design half adder using only NAND gates. ( c)
More informationCHAPTER 7. Solutions for Exercises
CHAPTER 7 Solutions for Exercises E7.1 (a) For the whole part we have: Quotient Remainders 23/2 11 1 11/2 5 1 5/2 2 1 2/2 1 0 1/2 0 1 Reading the remainders in reverse order we obtain: 23 10 = 10111 2
More informationChapter 3 Combinational Logic Design
Logic and Computer Design Fundamentals Chapter 3 Combinational Logic Design Part 2 Combinational Logic Charles Kime & Thomas Kaminski 28 Pearson Education, Inc. (Hyperlinks are active in View Show mode)
More informationT02 Tutorial Slides for Week 6
T02 Tutorial Slides for Week 6 ENEL 353: Digital Circuits Fall 2017 Term Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary 17 October, 2017
More informationCHAPTER 7 MULTI-LEVEL GATE CIRCUITS NAND AND NOR GATES
CHAPTER 7 MULTI-LEVEL GATE CIRCUITS NAND AND NOR GATES This chapter in the book includes: Objectives Study Guide 7.1 Multi-Level Gate Circuits 7.2 NAND and NOR Gates 7.3 Design of Two-Level Circuits Using
More informationKarnaugh Maps (K-Maps)
Karnaugh Maps (K-Maps) Boolean expressions can be minimized by combining terms P + P = P K-maps minimize equations graphically Put terms to combine close to one another B C C B B C BC BC BC BC BC BC BC
More informationChapter 2: Boolean Algebra and Logic Gates
Chapter 2: Boolean Algebra and Logic Gates Mathematical methods that simplify binary logics or circuits rely primarily on Boolean algebra. Boolean algebra: a set of elements, a set of operators, and a
More informationFundamentals of Boolean Algebra
UNIT-II 1 Fundamentals of Boolean Algebra Basic Postulates Postulate 1 (Definition): A Boolean algebra is a closed algebraic system containing a set K of two or more elements and the two operators and
More informationCombinational Logic. Course Instructor Mohammed Abdul kader
Combinational Logic Contents: Combinational and Sequential digital circuits. Design Procedure of combinational circuit. Adders: Half adder and Full adder. Subtractors: Half Subtractor and Full Subtractor.
More informationL2: Combinational Logic Design (Construction and Boolean Algebra)
L2: Combinational Logic Design (Construction and Boolean Algebra) Acknowledgements: Lecture material adapted from Chapter 2 of R. Katz, G. Borriello, Contemporary Logic Design (second edition), Pearson
More informationCOM111 Introduction to Computer Engineering (Fall ) NOTES 6 -- page 1 of 12
COM111 Introduction to Computer Engineering (Fall 2006-2007) NOTES 6 -- page 1 of 12 Karnaugh Maps In this lecture, we will discuss Karnaugh maps (K-maps) more formally than last time and discuss a more
More informationBoolean Algebra and logic gates
Boolean Algebra and logic gates Luis Entrena, Celia López, Mario García, Enrique San Millán Universidad Carlos III de Madrid 1 Outline l Postulates and fundamental properties of Boolean Algebra l Boolean
More informationChapter 4: Designing Combinational Systems Uchechukwu Ofoegbu
Chapter 4: Designing Combinational Systems Uchechukwu Ofoegbu Temple University Gate Delay ((1.1).1) ((1.0).0) ((0.1).1) ((0.1).0) ((1.1) = 1 0 s = sum c out carry-out a, b = added bits C = carry in a
More informationIn Module 3, we have learned about Exclusive OR (XOR) gate. Boolean Expression AB + A B = Y also A B = Y. Logic Gate. Truth table
Module 8 In Module 3, we have learned about Exclusive OR (XOR) gate. Boolean Expression AB + A B = Y also A B = Y Logic Gate Truth table A B Y 0 0 0 0 1 1 1 0 1 1 1 0 In Module 3, we have learned about
More informationCSE 140: Components and Design Techniques for Digital Systems
Lecture 4: Four Input K-Maps CSE 4: Components and Design Techniques for Digital Systems CK Cheng Dept. of Computer Science and Engineering University of California, San Diego Outlines Boolean Algebra
More information