A New Method For Simultaneously Measuring And Analyzing PLL Transfer Function And Noise Processes

Transcription

1 A New Method For Simultaneouly Meauring And Analyzing PLL Tranfer Function And Noie Procee Mike Li CTO, Ph.D. Jan Wiltrup Corporate Conultant 1

2 Outline Introduction Phae Locked-Loop (PLL) and Noie Procee Variance and Power Spectrum Denity (PSD) Application of Variance and PSD in PLL analyi Concluion (Patent for the methodology i pending)

3 Phae-Locked Loop Input Noie Noie Output Phae Detector Low-Pa Filter VCO 1/N counter (Optional) 3

4 PLL Application Tracking Frequency multiplication/diviion Synchronization Demodulation Computer/microproceor Clock generation Clock recovery 4

5 PLL Model I.) Time-Domain Approach θι Phae Detector LPF VCO kd θε v(t) Kf K v( t) dt 0 θο 5

6 PLL Model I.) Time-Domain Solution θ Kt e Kt e i = ( e θ ( t) dt c) K = K d K f K o, i the loop gain, If θ i = contant, then θ e 0 when t ; If θ i = ωt, then, θ e contant when t. 6

7 PLL Model II.) Frequency-Domain Approach Phae Detector LPF VCO θι kd θε F() v() Ko/ θο 7

8 8 PLL Model II.) Frequency-Domain Solution Sytem tranfer function Error tranfer function ) ( ) ( ) ( ) ( 0 F K K F K K H o d o d i o = = θ θ ) ( ) ( ) ( ) ( F K K K H o d d i e e = = θ θ

9 PLL Tranfer Function Mag He(ω ) Ho(ω ) ω ch ω cl ω 9

10 PLL Pole and Zero ω i X 0 ω r x 10

11 PLL Key Parameter Damping factor Natural frequency Locking time Locking range Pull-in time Pull-in range Noie bandwidth. 11

12 PLL Noie Procee Thermal noie Short noie S i kt / th, = S i qi( t), = R flick noie S f = K a I f m a b, b ~ 1 Random walk S f = K a I f m a b, b ~ High order random noie 1

13 PLL Noie Procee Noie Noie Noie Phae Detector LPF VCO θι θε v() kd F() Ko/ θο 13

14 PLL Noie Model I.) Time-domain approach σ t = σ ( t) ( R ( t ( t), t )) 0 tt n 0 But R tt ( t n ( t ), = I t ) ( S ( f 0 1 )) 14

15 PLL Noie Variance (or igma) record σ (t) t 15

16 PLL Noie Some baic on LTI ytem θ ι(f) S i (f) H (f) P L L θ ο(f) S o (f) θ = o ( f ) H ( f ) ( f o θ i ) S ( f ) o = H o ( f ) S i ( f ) 16

17 PLL Noie Model II.) Frequency-domain approach S o ( f ) = i S i ( f ) 1 H FG _ i H OL ( ) ( ) = j π f Key inight: PLL noie PSD manifet both noie proce and tranfer function 17

18 PLL Noie Spectrum Noie Power Spectrum Denity S o (f) f 18

19 PLL Tranfer Function and Gain Traditional Method Meaurement Signal/ Modulation Generator PLL Spectrum Analyzer Or Ocillocope 19

20 Limitation for Traditional Method Require a modulation & ignal ource Require the acce of PLL internal It i a piece-meal approach No eparation of noie from tranfer function It i low No prediction capability 0

21 New PLL Meaurement and Analyi Method The methodology i baed on the fact that PLL variance track both noie proce and tranfer function. The methodology take the advantage of Time Interval Analyzer (TIA) that can take > 1 million meaurement per econd. The methodology determine the noie PSD and tranfer function baed on meaured variance time record. 1

22 Illutration of the New Method For a econd-order PLL H 0 ( ) Variance function will be: σ t = ( t, ζ, Parameter of ω n, ζ, N n are determined by ζω ω n n ζω, N ω n n ) n ω n σ σ < t _ mod el t _ meaured ε

23 A Cae Study Setup Output PLL SIA3000 or DTS 077 3

24 Variance Meaurement Reult Sigma (p) Time (u) 4

25 PLL Tranfer Function and Noie PSD Damping factor: ζ = 0.11 Natural frequency: ω n = 4.30 MHz Average PSD: N n = 3.16 x10-7 µw/hz H 0 ( ) =

26 PLL Tranfer Function log H(j ω ) (db) Frequency (ω/ω n ) 6

27 PLL Parameter Lock-in time: T L = π ω n Lock range: ω L ζω n Pull-in time: T P = π ω ζω n Noie bandwidth : B L = ω n ζ 1 4 ζ etc.. 7

28 Analyi Functionalitie Pole/zero location Bode plot Root locu Stability analyi in itu imulation and prediction 8

29 New Meaurement Platform: SIA3000 Up to 10 channel (ingle ended or differential) >1 million meaurement per econd 3. GHz, 3. Gb/ peed 00 f reolution < p rm noie floor.. 9

30 Concluion A new theory link PLL tranfer function with noie procee. A methodology meaure and analyze PLL tranfer function and noie PSD in one pa. A methodology that i fat ( ~ econd throughput) and doe not require a timulator. A methodology provide all the PLL parameter and function. A methodology that make compliance teting practical for PLL tranfer function. 30