A Study on Simulating Convolutional Codes and Turbo Codes

Transcription

1 A Study on Simulating Convolutional Code and Turbo Code Final Report By Daniel Chang July 27, 2001 Advior: Dr. P. Kinman

2 Executive Summary Thi project include the deign of imulation of everal convolutional code and a turbo code uing component convolutional code. Thee error correction code allow a meage to be ent with le power over a noiy channel with the ame number of bit error a an uncoded meage ent with higher power over the ame channel. Thi i important becaue it allow for the reduction of power conumption in many communication ytem.

3 Introduction In mot communication ytem there i noie in the channel between the tranmitter and receiver. A a reult, the received ignal i different from the tranmitted ignal. To remedy thi problem, error-correction code, uch a convolutional code and turbo code, are ued. At the channel encoder, thee code add redundancy to a meage prior to being tranmitted. After Additive White Gauian Noie AWGN i added to the encoded meage in the communication channel, the channel decoder ue the nown redundancy to determine the correct meage. Thi project include the deign of everal imulation of convolutional code and a turbo code in a channel model.

4 Methodology The imulation of the channel model add zero-mean AWGN with a given variance to a binary meage ignal that ha been converted to an analog ignal. The variance of the AWGN in the channel model i given by 2 1 σ = E 2 N Where the energy per ymbol, E, i equal to the energy per bit, E b, for an uncoded channel. The theoretical performance of an uncoded channel with antipodal ignaling and AWGN, in term of Bit Error Rate BER and E b /N 0 i 0 1 BER = erfc 2 E b / N 0 The 8 tate RSC encoder i Meage bit z Sytematic bit x Modulo-2 adder Figure 1 Parity-chec bit z Note that the initial tate of the RSC i et to 000.

5 After the lat meage bit i ent to the RSC encoder, the RSC change to the following: Sytematic bit x Figure 2. Parity-chec bit z Then, the RSC cycle three more time. The reulting ytematic and parity bit are nown a tail bit, and they enure that the end tate of the RSC i 000. The initial and end tate of the RSC are both et to 000 becaue the Viterbi decoding algorithm i more efficient when the initial and end tate are nown. For the unpunctured code, thi 8 tate RSC i r = 1/2. For the punctured code, on odd meage bit, the ytematic and parity bit are both ent on the channel. However, on even bit only the ytematic bit i ent. A a reult, the punctured code i rate r = 2/3. In the imulation, E b = 2E for the r = 1/2 RSC code. Liewie, E b = 3/2 E for the r = 2/3 RSC code.

6 The tate diagram for the RSC encoder i \ Legend 100 Y 1 Y S = Regiter State Y 1 = Sytematic Bit Y 2 = Parity Bit Figure 3. The Viterbi decoder for the different RSC code ue the ame trelli diagram. There are only two poible tate that a given tate can tranition from, and the output ymbol from thoe tate are complementary.

7 The baic trelli i Figure 4. For the punctured RSC, on even bit, when only the ytematic bit i ent, the trelli i the ame with the exception that a placeholder replace the econd output ymbol, or parity bit. The Viterbi algorithm i an efficient method of remembering the bet path, baed on minimum ditance, through the trelli into each new column of node. In the Viterbi algorithm with oft deciion, the ymbol with added noie are ued in the decoding algorithm. Euclidean ditance i calculated here. However, with hard deciion, the ymbol with added noie are firt converted to binary ymbol before they are decoded. If the ymbol with added noie i < 0, it become 0. Otherwie, it become 1. Hamming ditance i calculated here. Since ome information i lot here, we can expect that the Viterbi algorithm with hard deciion i not a efficient a with oft deciion. Liewie, in the punctured cae, ince only half of the parity bit are ent, we can alo expect the punctured code to be le efficient than the unpunctured code. It i important to note, however, that the noie per ymbol i le in the punctured code. The reult i that we can expect the punctured code to be only lightly le efficient then the unpunctured cae.

8 The turbo code i given by Meage bit z Sytematic bit x Interleaver Parity-chec bit z Figure 5. Note that there are two component 8 tate RSC in thi turbo code. The interleaver i a bloc interleaver with an odd number of row and an odd number of column. Thi deign allow for each ytematic bit to have a correponding parity bit that i alo ent through the channel. Only one parity bit from one of the component RSC i ent with each ytematic bit. On the next bit, the parity bit from the other RSC i ent. A a reult, thi code i rate 1/2.

9 The turbo-code decoder i given by: Meage Bit 8 State MAP Decoder DEC 1 Interleaver 8 State MAP Decoder DEC 2 GND Deinterleaver Deinterleaver Parity Bit GND Deciion Output Figure 6. Thi decoder doe not ue component Viterbi algorithm decoder. Although oft-output Viterbi algorithm decoder may be ued in turbo code, ymbol-by-ymbol maximum a priori MAP decoder are ued in thi deign. Note that the interleaver here i the ame a the interleaver hown in the encoder. Alo, the deinterleaver here correpond to the given interleaver. Note that the meage bit are added to the output of decoder #1 and are interleaved and ent to decoder #2. Finally, the turbo-code decoder ha an iterative proce. With each iteration in the feedbac loop, the performance of the code i increaed. New information calculated in the previou half-iteration i ued in the decoding of the current half-iteration to mae better deciion about the original meage. According William R. Ryan in an unpublihed paper entitled, A Turbo Code Tutorial, the MAP decoder calculate the log lielihood that the encoder i at a certain tate at a given time. Firt,γ are calculated for each poible tranition from node,, to node at each time,, uing the following equation where 1 e e γ ', = exp[ u L u + Lc y ] γ ', 2 e γ ', = 1 exp[ 2 L c y p x p ]

10 Note that there are 16 γ, or tranition, between two column of node. Alo, note that u = x = the encoder input word p x = the parity bit generated by the encoder, p y y y = = the noiy verion of, p x x 0 2 N E L b c =, for rate ½ code Next, α are calculated for each node of the trelli from left to right. They are calculated from the following equation = ' 1 1 ' ', ' ', ' γ α γ α α Note that the denominator of thi equation repreent the normalization for each column of node, and the α repreent the probability that the encoder i at a certain tate at time. For both MAP decoder #1 and #2 in the turbo-code decoder, the far left column of α are et to 1 for = 0 and 0 for 0. Thi i becaue the encoder i initially et to tate 000, correponding to = 0. β are then calculated for each node of the trelli from right to left. They are calculated from the following equation = ' 1 ' 1 ', ' ', ' γ α γ β β For the firt map decoder, the far right column of β are et to 1 for = 0 and 0 for 0. Again, thi i becaue of the added tail bit. However, for the econd map decoder, the far right column of β are et to the far right column of α calculated in the previou tep. Finally, the extrinic lielihood i calculated uing the following equation = + e e L, ', ' ln 1 1 β γ α β γ α Where + repreent the tranition that are aociated with a ytematic bit of 1, and where - repreent the tranition that are aociated with a ytematic bit of 0. Thi extrinic lielihood then interleaved or deinterleaved and i added to the quantity c y L. Thi i then paed to the next MAP decoder.

11 After the final half-iteration, L 1 u i calculated uing the following equation e e L1 u = Lc y + L12 + L21 e e where L 12 i the extrinic log lielihood calculated from decoder #1, and L 21 i the deinterleaved extrinic log lielihood calculated from decoder #2. If L 1 u > 0, the turbo-decoder decide that u = 1. Otherwie, it decide that u = 0.

12 Reult The following figure how the performance of the imulation of the channel model in comparion with the theoretical uncoded limit. Figure 7. For the mot part, the channel model lie on the theoretical uncoded limit. Figure 7 indicate that the channel model i a good approximation of a channel with zero-mean AWGN.

13 Figure 8. Thi figure how the performance of the RSC code in comparion with the uncoded cae. The bloc ize i 361 bit, and 100,000 bloc were encoded and decoded for each point. For maller value of E b /N 0 db, the code perform wore than the uncoded cae. However, there i a coding gain for larger value of E b /N 0 db. In particular, for the RSC with hard deciion, there i a coding gain of approximately 2.25 db for a BER of A expected, the RSC with oft deciion perform even better and ha a coding gain of approximately 2 db in comparion to the hard deciion cae at the ame BER. Alo, the RSC with puncturing and oft deciion perform better than the hard deciion cae but lightly wore than the oft deciion cae without puncturing. Finally, the MAP decoder perform lightly better than the unpunctured oft deciion Viterbi algorithm. Thee curve match thoe found in literature.

14 Figure 9. Thi figure how the performance of the turbo code. Iteration #1, #2, #3 and #6 are hown. The bloc ize i 361 bit, and the interleaver i 19 x 19. Although each iteration perform better than the proceeding iteration, the performance increae i le with each iteration.

15 Figure 10. Thi figure i a comparion of the turbo code, iteration #6, and the RSC, Viterbi decoded with oft deciion. There i a ignificant coding gain at low bit error rate.

16 Concluion All of the goal a et forth in the project propoal have been achieved. The verification have been met, and the requirement have been completed. The imulation how that the different coding cheme have E b /N 0 gain for given BER. The performance of the error correction code match thoe found in literature.

17 Recommendation Since thi project ha been deigned a a imulation, there are few recommendation for a continuation. However, the hardware that i imulated here can be reearched.