Spin-Transfer Torque MRAM (STT-MRAM): Challenges and Prospects

Transcription

1 Spin-Transfer Torque MRAM (STT-MRAM): Challenges and Prospects Spin-Transfer Torque MRAM (STT-MRAM): Challenges and Prospects Yiming Huai Co-founder, Grandis, Inc., 1123 Cadillac Court, Milpitas, CA 95035, USA Yiming Huai Spin-transfer torque (STT) switching demonstrated in submicron sized magnetic tunnel junctions (MTJs) has stimulated considerable interest for developments of STT switched magnetic random access memory (STT-MRAM). Remarkable progress in STT switching with MgO MTJs and increasing interest in STT- MRAM in semiconductor industry have been witnessed in recent years. This paper will present a review on the progress in the intrinsic switching current density reduction and STT-MRAM prototype chip demonstration. Challenges to overcome in order for STT-MRAM to be a mainstream memory technology in future technology nodes will be discussed. Finally, potential applications of STT-MRAM in embedded and standalone memory markets will be outlined. 1. INTRODUCTION The giant magnetoresistance (GMR), discovered about twenty years ago, is at the heart of read-heads in high density hard disk drives ubiquitous in our daily lives Nobel Prize in physics was awarded to Albert Fert (Université Paris- Sud, Orsay, France) and Peter Grünberg (Forschungszentrum Jülich, Germany) for the discovery of the GMR phenomenon. GMR is the large variation in the electrical resistance of thin film structures composed of alternating ferromagnetic and nonmagnetic metal layers in response to an external magnetic field [1]. The applied field changes the relative magnetization orientations in ferromagnetic layers. When the magnetizations in adjacent layers are aligned parallel (P), electrons with spins oriented parallel to the magnetization (up electrons) pass easily from one layer to another, and anti-parallel (down) electrons are strongly scattered, leading to low resistivity for up electrons. If adjacent layers have magnetizations aligned antiparallel (AP), both spin up and spin down electrons are strongly scattered, and the resistance is high for all electrons. In other words, magnetization orientations (states) manipulated through an external magnetic field determines spin polarized electron transport, leading to low and high resistance states in GMR devices. It is the spin-based explanation for GMR that has led to a practical structure spin valve used in various GMR devices. A basic spin valve consists of two ferromagnetic layers separated by a thin nonmagnetic spacer layer. The GMR ratio is defined as ΔR= (R AP -R P )/R P, where R AP and R P denote the resistance for anti-parallel and parallel magnetization configurations between two ferromagnets. In 1997, spin-valve based read-out head in hard disk drives was commercialized and this soon became the industrial standard. In 1996, Slonczewski [2] and Berger [3] independently predicted an important adverse effect of GMR: spin-transfer effect, in which magnetization orientations (corresponding to low-high resistance states) in magnetic multilayer nanostructures can be manipulated via spin polarized current. The spin transfer phenomena occur for electron current flowing through two ferromagnetic layers separated by a thin nonmagnetic spacer layer. The current becomes spin polarized by transmission through or reflection from the first ferromagnetic layer (the pinned reference layer) and mostly maintains this polarization as it passes through the nonmagnetic spacer and enters and interacts with the second ferromagnetic layer (the free layer). This interaction exerts a spin torque on the magnetic moment of the free layer (FL) through a transfer of angular momentum from the polarized current to the FL magnetization. This spin torque can oppose the intrinsic damping of the FL causing the magnetization precession (exiting spin waves) and, or reverse the direction of the magnetization with sufficient current strengths. Spin-transfer can have important implications on electronic device applications since it provides a local means of magnetization manipulation rather than using the long-range Oersted field generated by a remote current. The early experiments for spin transfer driven magnetic precession [4-6] and switching [5-8] have been explored and reported in current-perpendicular-to-plane (CPP) nanoscale spin valve structures from 1998 to Since then, a rapidly increasing research effort on both experimental and theoretical side has been focusing on exploring its microscopic origins [9, 10] and switching dynamics [8, 11, 12] of spin-transfer effect, as well as its potential applications for STT based magnetic random access memory (MRAM) [13] and current tunable highfrequency oscillators [14]. All-metal based nanoscale spin valves exhibit low resistance of several Ohm (Ω) and small GMR ratio of 3-5% (corresponding to a voltage swing ΔV of less than 1 mv) [6, 7], which are not suitable for integration with CMOS technology. Magnetic tunnel junctions are necessary in MRAM due to their much large and adjustable resistances (~kω) and high signal voltage output (ΔV~ hundreds mv) which allow high-speed read operation AAPPS Bulletin December 2008, Vol. 18, No. 6 33

2 Celebrating 20 Years of GMR Past, Present, and Future (II) in memory applications. A basic MTJ is composed of two ferromagnetic layers separated by a thin insulating tunneling barrier. Similar to GMR, tunnel magnetoresistance (TMR) ratio is defined as ΔR= (R AP -R P )/R P, but has much large amplitude up to several hundred percent at room temperature [15]. A key milestone in STT research has been reached in early 2004 by first demonstration of STT switching in Al 2 O 3 based MTJs by Huai et al. [13, 16]. In late 2004, the revolutionary high TMR above 200% has been reported in MTJs with crystalline MgO barrier [15] following the early theoretical predictions [17, 18]. Such giant TMR originates from the fact that the electrons in highly spin-polarized Δ 1 band in (001) direction of bcc ferromagnetic electrodes can tunnel through the MgO (001) barrier more easily than the electrons in other bands (Δ 2 and Δ 5 ) [17, 18]. Subsequent STT research has been focusing on MgO MTJs. And in 2005, STT switching has been successfully demonstrated in MgO MTJs with TMR> 150% and small intrinsic switching current density J c0 = A/cm 2 [19-24]. STT-MRAM technology has significant advantages over magnetic-fieldswitched (toggle) MRAM that recently has been commercialized by Freescale [25]. The main hurdles associated with field switched MRAM are its more complex cell architecture with bypass line and remote write lines [Fig.1(a)], as well as its high write current ( in the order of ma) and poor scalability beyond 65 nm. The fields and the currents required to write the bits increase rapidly as the size of the MTJ elements shrinks. STT writing technology [Fig.1(b)], by directly passing a current through MTJ, overcomes these hurdles with much lower switching current (in the order of μa), simpler cell architecture which results in a cell that can be as small as 6F 2 (for single-bit cells) and reduced manufacturing cost, and more importantly, excellent scalability to future technology nodes. The main challenge for implementing STT writing mode in high-density and high-speed memory is the substantial reduction of the intrinsic current density J c0 required to switch the magnetization of the FL while maintaining high thermal stability required for long-term data retention. Minimal switching (write) current is required mainly for reducing the size of the selection transistor in series with MTJ in one transistor and one MTJ design (1T1J) to achieve the highest possible memory density, because the channel width (in unit of F) of the transistor is proportional to the write current for a given transistor current drivability (μa/μm). Minimal channel width of 1 F or the width of MTJ element is required for achieving ultimate smallest STT-MRAM cell size. Second, smaller voltage across MTJ decreases the probability of tunneling barrier degradation and breakdown, ensuring write endurance of the device. This is particularly important for STT-MRAM, because both sense and write currents are driven through MTJ cells. 2. SPIN-TRANSFER SWITCHING CHARACTERISTICS Before reviewing STT research progress in MTJs, it is useful to understand the intrinsic switching current density J c0 and the characteristics of switching current amplitude vs. switching current pulse [8, 12]. Under a macrospin model assuming a collinear geometry at zero temperature [8, 11, 26], the intrinsic current density J c0 required for current driven magnetization reversal in a MTJ with the magnetization in the film plane can be expressed as: J c0 = 2eαM st F (H + H k +2πM s ), (1) ħη where H is the field applied along the easy axis, M s and t F are the magnetization and thickness of the free layer respectively, α is the damping constant, and H k is the effective anisotropy field including magnetocrystalline anisotropy and shape anisotropy. The spin transfer efficiency η, is a function of the current polarity, polarization, and the relative angle between the free and pinned layer. Eq. (1) gives a current density threshold. When J > J c0, an initial stable magnetization state of the free layer along the easy axis becomes unstable at zero temperature and the magnetization enters a stable precessional state or a complete reversal occurs. The global picture of STT switching vs. the current pulse width is shown in Fig. 2 based on analytical and numerical calculations. Three distinct switching modes have been found: thermal activation, dynamic reversal and precessional switching [12]. Fig. 1: Comparison of memory cell architecture between conventional field switching MRAM (a) and spin-transfer torque MRAM (STT-MRAM) (b). For fast precessional switching in nanosecond (ns) regime (less than a few ns), the required switching current is several times greater than the instability current J c0 [8, 12, 26, 27]. Switching current density can be estimated J c0 (τ) J c0 + [ ln(π/2θ) τ ], where τ is the pulse width of switching current and θ being the initial angle between the magnetization vector of the free layer and the easy axis. 34 AAPPS Bulletin December 2008, Vol. 18, No. 6

3 Spin-Transfer Torque MRAM (STT-MRAM): Challenges and Prospects a high thermal stability (e.g. Δ over 40). Simple reduction of free layer magnetization M s and free layer dimensions (thickness and/or area product) accompanied also the reduction of thermal stability Δ, since Δ = K u V/k B T = H k M s V/2k B T. Below we review three J c0 reduction means: (1) Materials engineering, (2) MTJ structure improvement, and (3) MTJ with perpendicular magnetic anisotropy. Fig. 2: STT switching current density (normalized by J c0 ) as a function of current pulse width. At a finite temperature, thermal agitation plays an important role in reducing the switching current at long current pulses (>10 ns). In this slow thermal activated switching regime, the switching current is dependent on the current pulse width τ and thermal stability factor Δ = K u V/k B T of the free layer (assuming H = 0) [8, 11, 26]: k J c (τ) = J B T c0 [1 ln τ Ku V ( τ0 ) ], (2) where τ 0 ~ 1 ns is the inverse of the attempt frequency. K u V is anisotropy energy. From Eq. (2), one can obtain the intrinsic current density J c0 by extrapolating the experimentally obtained switching current density J c to τ = τ 0 [28, 29]. Thus obtained value of J c (τ 0 )= J c0 is a good measure of STT performance in a nano-magnetic device and corresponds to J c value at switching times ranged from 5 to 10 ns for room temperature operation [Fig. 2]. The dynamic switching occurs at intermediate current pulses within a small range of 3 to 10 ns, which corresponds to the operating speed of practical STT- MRAM. It is found that the magnetization reversal is determined by both the initial thermal distribution and the thermal agitation during the switching process [12]. The dynamic reversal is a combination of precessional and thermally activated switching in the nanosecond regime. Unlike dealing with other two regimes, it is difficult to obtain an explicit formula to describe the dynamic switching due to the complicated reversal process. Beyond the macro-spin model, a full micromagnetic modeling is required to completely understand the magnetization switching in the presence of spin current. First, the free layer may not behave as a single macro-spin due to the shape anisotropy. Second, the effect of the current-induced Oersted field on the magnetization vectors at the sample centre is much different from that at edge. A more detailed analysis of macro-spin dynamics and full micromagnetic modeling under spin-current induced torque can be found in Refs. [12], and [22]. 3. SPIN-T RANSFER SWITCHING IN MTJs AND SWITCHING CURRENT DENSITY REDUC- TION Refereeing to Eq. (1), the intrinsic switching J c0 reduction can be pursued through materials and magnetic anisotropy engineering (related to M s, the damping constant α, spin polarization factor η, and perpendicular anisotropy) and MTJ and free layer structures (related to effective spin polarization factor η eff ) improvement. The main challenge associated with J c0 reduction is to lower J c0 while maintaining 3.1. Materials Engineering With materials engineering, as seen from Eq. (1), the intrinsic current density J c0 can be reduced by using materials with a low magnetization M s and a high spin transfer efficiency η. Recent experiments showed that CoFeB incorporated in MgO MTJs is one of the most efficient materials for this purpose. For a typical Co 90 Fe 10 alloy, the magnetization value is 1540 emu/cm 3, whereas the magnetization of Co 40 Fe 20 B 20 is less than 1050 emu/cm 3, depending on the layer thickness. A rough estimate from equation (1) shows a reduction in J c0 by a factor of about 2, assuming the other parameters remain unchanged. With CoFeB MTJs with a crystalline MgO barrier instead of amorphous Al 2 O 3, the TMR increases from 30-70% to 300% [15] at room temperature due to higher spin polarization. The intrinsic current density J c0 is expected to be lowered by about two times due to much higher spin polarization. Figures 3 and 4 show the spin transfer switching results for MTJ cells with Al 2 O 3 and MgO barriers [19, 28, 29]. The similar MTJ structures were of the form Ta(3)/PtMn(20)/CoFe(2)/Ru(0.7)/ CoFeB(2)/AlOx/CoFeB(2.5)/Ta(3) (nm) and Ta(5)/PtMn(20)/CoFe(2)/Ru(0.8)/ CoFeB(2)/MgO/CoFeB(2.5)/Ta(8) (nm). For Al 2 O 3 MTJs, TMR is 42% with RA 40 Ω μm 2. MgO MTJs exhibits much higher TMR about 155% with RA 50 Ω μm 2. For both MgO and Al 2 O 3 MTJ cells, the average intrinsic switching current density J c0 was obtained by extrapolation of the switching current to 1 ns pulse width as described in the Sec. 2. J c0 is found to be A/cm 2 in MgO MTJs, which is about one third AAPPS Bulletin December 2008, Vol. 18, No. 6 35

4 Celebrating 20 Years of GMR Past, Present, and Future (II) of that ( A/cm 2 ) obtained in Al 2 O 3 junctions [19, 28, 29]. Fig. 3: Typical field (a) and current (b) driven magnetization switching for an MTJ cell with an Al 2 O 3 barrier. Current pulse width of 30ms was used in obtaining (b). From Refs. [19], [28] and [29]. Fig. 4: Typical field (a) and current (b) driven magnetization switching for an MTJ cell with an MgO barrier. Current pulse width of 30ms was used in obtaining (b). From Refs. [19], [28] and [29]. Fig. 5: The dielectric breakdown voltage as a function of the pulse width. From Ref. [12]. Fig. 6: A dual MTJ structure with anti-parallel magnetization orientation of two pinned layers. The reliability of the insulating barrier in MTJ is the key issue for STT-MRAM, since the current is passing through MTJ element in each read and write operation. Fig. 5 shows the breakdown characteristic of the MgO tunnel barrier as a function of the write current pulse width. The breakdown voltage in the nanosecond regime (1.8 V at 10 ns) is about 3 times greater than typical STT switching voltages [12, 23]. Furthermore, an endurance stress test at 10 ns pulse width and 1.0 V stress voltage shows negligible change in signal output after more than write cycles [12, 23]. In addition to M s and η, one can also reduce FL intrinsic damping constant for lowering J c0, but practically it is difficult to reduce FL α constant. Experimentally, it was found that J c0 depends also on dynamic damping enhanced by the spin-pumping effect at interface of FL and conducting metal capping layer like Ta [31]. A spin barrier layer can be configured on top of FL to substantially reduce spin-pumping induced damping [33]. While exploring low M s free layer materials and optimal capping layer for reducing spin-pumping induced damping, epitaxial (001) orientation in MgO MTJ structures should not be sacrificed in order to maintain high TMR MTJ and Free Layer Structure Improvement Dual magnetic tunnel junction (MTJ) structures have been developed consisting of two MgO insulating barriers of different resistances, two pinned reference layers aligned anti-parallel to one another, and a free layer sandwiched between the two insulating barriers, as shown in Fig. 6. In such a dual structure with anti-parallel magnetization configuration of two pinned layers, spin transfer torque can be enlarged due to spin torque acting on both side of free layer [32]. Recently, Diao et al. have successfully built such dual MgO barrier MTJ devices with TMR = 70%, which exhibited a signif- 36 AAPPS Bulletin December 2008, Vol. 18, No. 6

5 Spin-Transfer Torque MRAM (STT-MRAM): Challenges and Prospects icant reduction in intrinsic current density J c0 (= A/cm 2 ) compared to simple MgO stacks [Fig. 7, from Ref. [32]] [32]. In addition, the smaller asymmetry of J c (defined as the intrinsic current density ratio J P AP c0 / J AP P c0 ) in the dual MTJ structures has an advantage over single MTJ Fig. 7: (a) STT driven magnetization switching for a dual MTJ cell two MgO barriers, (b) the switching current density versus current pulse width for the dual MTJ structure of (a). structures that widens the read write margin for memory device design. Dual tunnel barriers sandwiching the free layer are also desirable because they avoid the spin pumping at the FL/Ta interface which may increase the effective damping [31, 32]. The synthetic free layer Co 40 Fe 40 B 20 /Ru/ Co 40 Fe 40 B 20 employed in MgO MTJs was demonstrated to enable higher thermal stability (Δ = 67) and lower switching current density (J c0 = A/cm 2 ), as compared to the equivalent single free layer Co 40 Fe 40 B 20 MTJ with (Δ = 56 and J c0 = A/cm 2 ) [30, 34]. The enhanced Δ is believed to be a result of high coercivity H c and strong exchange coupling [34]. The origin of the reduction of J c0 is not fully understood but it may be due to spin-accumulation in the free layer. It was found that spin accumulation can enhance the spin-torque efficiency, thus reducing intrinsic current density [35] MTJ with Perpendicular Anisotropy By closely looking at Eq. (1), the intrinsic current density is primarily governed by the thin film easy-plane anisotropy 4πM s (>10 koe). The anisotropy field H k, mainly dominated by shape anisotropy, is about several hundred Oe. Therefore, most efficient means of reducing J c0 would be to use a FL with perpendicular anisotropy with H k >4πM s. In this case, the magnetization is out of the film plane, which would eliminate the 2πM s term in Eq. (1), where the H k becomes the effective perpendicular anisotropy H k =H k -4πM s. The perpendicular anisotropy technology is being increasingly used to enhance storage capacity for high-density hard disk drives. A detailed theoretical analysis of STT switching in MTJ with perpendicular anisotropy for 28 nm technology node has been presented at IEDM 2007 [36]. There are many distinct advantages of perpendicular STT switching based MTJs, compared to in-plane MTJs [36, 37]. The switching current density J c0 is expected to be reduced significantly in perpendicular MTJ (P-MTJ) because of eliminating the dominant term of the 2πM s in Eq. (1) (assuming the other materials parameters remain unchanged). In addition, for a p- MTJ, the thermal energy barrier is provided by effective perpendicular anisotropy H k (=H k -4πM s ), instead of shape anisotropy. Therefore elongated cell shape is no longer needed. P-MTJ can use circular cell shape, which facilitates manufacturability in smaller technology nodes beyond 45 nm. Large H k >1000 Oe usually found in perpendicular FL provide significantly large thermal stability Δ, thus sustainable at very small technology nodes, as shown in Fig. 8. The smaller circular area (e.g. 1 F 2 ), compared to elongated shape area, also leads to smaller switching current for a given J c0, resulting in smaller cell size. I c0 /Δ is an important figure of metric for comparison of STT performance between p-mtj and in-plane MTJ. Finally, dipole field interaction between neighboring cells can also be reduced in high bit density layout [36]. Fig. 8: Scalability of data retention. Calculated activation energy K u V for both p-mtj and in-pane MTJ as a figure of merit for data retention. AR denotes aspect ratio. From Ref. [36]. The perpendicular STT switching was first demonstrated in metallic spin valve systems with out-of-plane anisotropy [38]. In 2007, Toshiba presented first STT switching in MTJs with perpendicular anisotropy at the 52nd Magnetism and Magnetic Materials Conference [39]. P- MTJs composed of TbCoFe/CoFeB/MgO/ CoFeB/TbCoFe (as shown in Fig. 9) have been patterned to a circular shape with AAPPS Bulletin December 2008, Vol. 18, No. 6 37

6 Celebrating 20 Years of GMR Past, Present, and Future (II) 0.13 μm diameter. The STT writing was performed at current pulse width ranged from ns. The intrinsic current density A/cm 2 has been achieved with a large thermal stability Δ=107 [Fig. 10] [39]. More recently, lower J c0 = A/cm 2 and higher TMR of 60% have also been demonstrated in MgO based p-mtjs consisting of CoFeB wedge/ [Pd/Co] 2/Pd free layer and FePt/CoFeB reference layer [40]. For p-mtj to be an ultimate solution for high density and scalable STT-MRAM, one need to further improve TMR (>100%) and reduce J c0 close to or below A/cm 2 by enhancing spin polarization and reducing free layer damping. Perpendicular films often have higher damping constant α due to Fig. 9: Cell structure of TbCoFe/CoFeB based perpendicular MTJs. From Ref. [39]. Fig. 10: Resistance verse magnetic field applied perpendicular to the film layers (a), and resistance verse voltage pulses (b) for a p-mtj with the structure in Fig. 9. From Ref. [39]. strong spin-orbit coupling. It should be also noted that a small and consistent net anisotropy H k of a perpendicular film requires a delicate balancing between relatively large numbers (H k and 4πM s ), and in addition, H k is believed to be sensitive to desired crystalline structures required for perpendicular anisotropy, all this may result in large bit-to-bit variations. 4. STT-MRAM CHIP DEMON- STRATION Parallel to tremendous effort to explore optimal MTJ materials and structures for reducing the intrinsic switching current density while maintaining high thermal stability, significant work has also been carried out to demonstrate STT-MRAM at chip level in order to proven MTJ STT switching characteristic and reliability such as bit write yield, write current distribution, write cycle endurance [41] and circuitry functionality such as bipolar current drive and low read disturb sensing scheme [42]. In December 2005, Sony announced a first 4 kbit SpinRAM chip demonstration at 2005 IEDM meeting [41]. The memory cell is based on 1T1J architecture. The chip was fabricated with a 180 nm CMOS process with 4 metal layers. The optimized low-m s CoFeB free layer has been used in MgO MTJs (with high TMR of 160% and RA of 20 Ω μm 2 ) for achieving small intrinsic switching current density of ~ A/cm 2. Characteristics of switching current vs. write current pulse width from 1ns to 1 ms has been examined. In the thermal activated range of 10 ns (nanosecond) to 1 ms (millisecond), the current required for switching the magnetization increases with decreasing write current pulse width, as predicted by the macrospin model [8, 11] (referring to Fig. 2). For fast precessional switching (τ 3 ns), the write current amplitude increases rapidly with increasing writing speed. The fastest switching speed within 2 ns has been demonstrated in both write current directions at the cost of high switching current (~625 μa in average) [41]. On the other hand, low switching current below 200 μa can be also achieved, but at very low speed (τ ~ms) [41]. From this current (which dictates cell size) vs. switching speed feature, one may consider tradeoff between write speed and memory density, depending on the applications. Embedded applications often require fast performance rather than bit density, larger cell size (30-40 F 2 ) can be allowed. In February 2007, a Hitachi and Tohuku University joint collaboration announced a 2 Mbit STT-MRAM demo at ISSCC meeting [42, 43]. The chip was manufactured in a 200 nm CMOS process technology. The cell size is μm, which is equivalent to 16 F 2 (F is the design rule of cell section which equals to 0.4 μm), which is smaller than toggle MRAM. A high performance of 100 ns write and 40 ns read operation has been achieved at a low voltage of 1.8 V. The capacity of the chip (2 Mbit) is nearly three orders of magnitude larger than that of Sony s 4 Kbit demo chip. More importantly, two major circuit technologies for STT writing have been developed in their demo chip. One is related to bidirectional current writing, required in STT-MRAM to write high resistance state 1 and low resistance state 0. The other circuit technology has addressed the read disturb errors caused by reading current unintentionally disturbing or writing the bit. This read disturb possibility can be minimized or eliminated by choosing the read current that flow in the direction to align parallel the magnetization of the MTJ element. In this case, the resistance is low but the read current is high. In this way, only the low read current with high resistance state could disturb the bit, thus substantially reducing the read disturb possibility [42, 43]. In short, with intensified effort on STT- MRAM in semiconductor industry in recent years, future STT-MRAM demo chips with high performance and advanced functionality at leading technology nodes (90 nm and beyond) could be expected in near future. 38 AAPPS Bulletin December 2008, Vol. 18, No. 6

7 Spin-Transfer Torque MRAM (STT-MRAM): Challenges and Prospects 5. STT-MRAM PROSPECTS Spin-transfer torque writing technology combined with high TMR enabled by MgO based MTJs provides a promising path to realize a future universal memory with low power consumption, high density, fast write and read speed (a few ns), unlimited endurance and excellent scalability to small technology nodes. STT research and understanding in MgO based in-plane MTJs are more advanced comparing to p-mtjs. Low J c0 (close to A/cm 2 ) with reasonably high thermal stability (Δ = 40-50) could be achieved in MgO in-plane MTJs at 90 and 65 nm technology nodes, which are suitable for high-performance and low-density embedded memory applications. The scalability of cell shape anisotropy limited thermal stability and manufacturability of elongated memory cells beyond 45 nm for in-plane MTJs can pose significant challenge for high-density memory applications. STT switching in p-mtjs could be one of the most efficient solutions for high-density STT-MRAM at and beyond 45 nm technology nodes. STT-MRAM technology can revolutionize the performance of electronic products in many areas, from consumer electronics and personal computers to automotive, medical, military and space. It also has the potential to create new sectors in the semiconductor industry and enable entirely new products not yet envisaged. STT-MRAM has key initial markets replacing embedded technologies such as embedded SRAM, embedded Flash and DRAM, and providing new functionality at 65nm and beyond. In automotive applications, it has higher speed and lower power consumption than embedded Flash and is denser than embedded SRAM. In portable and handset applications, it can eliminate multichip packages, provide a unified memory subsystem and reduce system power consumption for extended battery life. In personal computers, it can replace SRAM for high-speed cache, Flash for non-volatile cache and PSRAM (pseudo-static random access memory) and DRAM for high speed program execution. In short, remarkable progress has been made in STT-MRAM research and product development since the first demonstration of STT switching in MTJs in Since it often takes more than 10 years to commercialize new phenomena, the commercialized STT-MRAM could be expected beyond ACKNOWLEDGEMENTS I would like to thank M. Pakala, Z. Diao, F. Albert, L. C. Wang, Y. Ding, D. Apalkov, Z. Li, H. Nagai, K. Kawabata, A. Panchula, A. D. Smith, X. Tang, S. Watts, D. Yu, X. Luo, S. Wang, E. Chen, Y. Xu, Te-ho Wu, H. Yoda, Stu Wolf, Y. K. Kim, K. Ando, H. Ohno, Jordan Katine, W. Mass and J. Zhang for stimulating discussions. I also want to thank Bill Almon for the strong encouragement throughout my work on STT-MRAM. REFERENCES [1] M. N. Baibich et al., Phys. Rev. Lett. 61, 2472 (1988). [2] J. C. Slonczewski, J. Magn. Magn. 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