Designing Information Devices and Systems I Fall 2016 Babak Ayazifar, Vladimir Stojanovic Homework 6. This homework is due October 11, 2016, at Noon.

Transcription

1 EECS 16A Designing Informtion Devices nd Systems I Fll 2016 Bk Ayzifr, Vldimir Stojnovic Homework 6 This homework is due Octoer 11, 2016, t Noon. 1. Homework process nd study group Who else did you work with on this homework? List nmes nd student ID s. (In cse of hw prty, you cn lso just descrie the group.) How did you work on this homework? Working in groups of 3-5 will ern credit for your prticiption grde. 2. Nodl Anlysis Using techniques presented in clss, lel ll unknown node voltges nd pply KCL to ech node to find ll the node voltges. () Solve for ll node voltges using nodl nlysis. Verify with superposition. 20Ω 1 2 1A 10Ω 50Ω 2A () Solve for ll node voltges using nodl nlysis. 10Ω 1 50Ω 10V 1V 10 V x 20Ω 2 V x 60Ω 55Ω 3. Thévenin nd Norton equivlent circuits () Find the Thévenin nd Norton equivlent circuits seen from the outside the ox. EECS 16A, Fll 2016, Homework 6 1

2 () Find the Thévenin nd Norton equivlent circuits seen from the outside the ox. 4. Nodl Anlysis Or Superposition? Solve for the current through the 3Ω resistor, mrked s i, using superposition. Verify using nodl nlysis. You cn use IPython to solve the system of equtions if you wish. Where did you plce your ground, nd why? 3Ω 1.5Ω 1.5Ω 1A 3Ω i 5. (OPTIONAL) esistive Voltge egultor" In this prolem, we will design circuit tht provides n pproximtely constnt voltge divider cross rnge of lods. We will use resistor divider circuit s seen in discussion. The gol is to design circuit tht from source voltge of would yield n output voltge within 5% of 4V for lods in the rnge of 1kΩ to 100kΩ. () First, consider the resistive voltge divider in the following circuit. Wht vlue of the resistor would chieve voltge Vout of 4V? EECS 16A, Fll 2016, Homework 6 2

3 12kΩ () Now consider loding the circuit with resistor of 1kΩ s depicted in the following circuit with the sme vlue of the resistor s clculted in prt (). Wht is the voltge now? 12kΩ 1kΩ (c) Now consider loding the circuit with resistor of 100kΩ, insted, s depicted in the following circuit with the sme vlue of the resistor s clculted in prt (). Wht is the voltge now? 12kΩ 100kΩ (d) Now we would like to design divider tht would keep the voltge regulted for lods for rnge of lods l. By tht, we would like the voltge to remin within 5% window of 4V. Tht is, we would like to design the following circuit such tht 3.80V 4.20V for rnge of lods l. As first step, wht is the Norton equivlent of the circuit on the left? Write I No nd G e f f it in terms of conductnce vlues G 1 = 1 1 nd G 2 = = 1 G 1 2 = 1 G 2 I No e f f = 1 G e f f (e) The second step, using the Norton equivlent circuit you found in prt (d), wht is the rnge of G e f f tht chieves 3.80V 4.20V in terms of I No nd G l? EECS 16A, Fll 2016, Homework 6 3

4 I No e f f = 1 G e f f l = 1 G l (f) Trnslte the rnge of G e f f in terms of I No nd G l (tht you found in prt (e)) into rnge on G 2 in terms of G 1 nd G l. (g) Sy we wnt to support lods in the rnge 1kΩ l 100kΩ with pproximtely constnt voltge s descried ove (tht is, 3.80V 4.20V). Wht is the rnge of G 2 in terms of G 1 now? Trnslte the rnge of G 2 in terms of G 1 into rnge of 2 in terms of 1. (h) Note tht conductnce is lwys non-negtive. From the ounds on G 2 you found in the previous prt, derive ound on G 1 tht ensures tht G 2 is lwys non-negtive nd non-empty (tht is, the whole rnge of possile G 2 vlues is non-negtive nd is not empty). Trnslte this rnge into rnge of possile 1 vlues. (Hint: In ddition to the conductnce eing non-negtive, lso mke sure tht the rnge for G 2 is non-empty.) (i) Pick the vlues of 1 nd 2 tht chieve 3.80V 4.20V for 1kΩ l 100kΩ while minimizing the power consumed y the voltge divider circuit in open circuit (when there is no lod ttched to the output). Wht re these vlues 1 nd 2? How much power is consumed in this cse? Clculte nd report this power consumption using oth the originl circuit nd the Norton equivlent circuit. Are the power you clculted using the originl circuit nd the power you clculted using the Norton equivlent circuit equl? (j) Now using the sme vlues 1 nd 2 from the previous prt, lod the circuit with lod of 51kΩ, how much is consumed y ech of the three resistors, 1, 2 nd l (use the originl circuit to compute the power)? 6. Solving Circuits with Voltge Sources v 1 i 1 i 3 u 1 v 2 i u u 4 i 4 v 4 i 5 u 3 v 3 u 5 V S In the lst homework, we implemented circuit solver in n ipython noteook. This week we will mke smll extension to llow us to solve circuits with voltge sources. EECS 16A, Fll 2016, Homework 6 4

5 () Wht reltionship does the voltge source enforce etween v 1 nd v 4? () As you sw ove, voltge sources will fix the nodes they re ttched to e constnt offset from ech other. We will tret v 1 nd v 4 s one node, nd our new vector of potentils will e v = v 2 v 3 v 4. For the circuit ove, drw the grph for the circuit where v 1 nd v 4 re comined into one node. Specify new incidence mtrix for this grph. (c) Previously we wrote Ohm s lw s mtrix eqution: F v = i. Using our new incidence mtrix, for every Ohm s lw eqution involving v 1, we will need to ccount for the constnt offset y the voltge source. Find nd so tht Ohm s lw is written F v = i. (d) From efore, we wrote KCL s F T i f = 0. (Wht is f in this circuit?) Use this informtion, in ddition to the previously derived eqution to write v in terms of known quntities ( f,,g,f,). You cn use G s the conductnce mtrix. You my need to modify severl of the memers of the derived eqution y grounding node nd dropping row or column in order to give the prolem unique solution. (e) Now, use this informtion to write i in terms of known quntities ( f,g,f,, v) nd the quntities defined the the previous prt (which should lso e derived from known quntities). (f) In n ipython noteook, solve for v nd i in the given circuit. Let 1 = 100,000Ω, 2 = 200Ω 3 = 100Ω 4 = 100,000Ω 5 = 100Ω nd V S = 10V. EECS 16A, Fll 2016, Homework 6 5