An Efficient Graph Sparsification Approach to Scalable Harmonic Balance (HB) Analysis of Strongly Nonlinear RF Circuits

Transcription

1 Design Automation Group An Efficient Graph Sparsification Approach to Scalable Harmonic Balance (HB) Analysis of Strongly Nonlinear RF Circuits Authors : Lengfei Han (Speaker) Xueqian Zhao Dr. Zhuo Feng (Advisor) 1 Department of Electrical & Computer Engineering Michigan Technological University

2 Motivation Traditional harmonic balance methods for RF simulation Solve large yet non-sparse Jacobian matrices Direct solution methods Take excessively long simulation time Consume huge amount of memory resources Iterative solution methods Rely on high-quality preconditioner Traditional iterative methods preconditioners Matrix-oriented, may miss important circuit information Inefficient for strongly nonlinear system 2

3 Prior Works Prior RF circuit HB simulation approaches Direct solution method(a. Mehrotra et al, DAC 09) Handles strongly nonlinear RF circuit Consumes large computational resources Block-diagonal averaging preconditioner (P. Feldmann et al, CICC 96) Fast and memory efficient Limited to weakly nonlinear systems Hierarchical HB preconditioner (W. Dong et al, TCAD 09) Suitable for parallel computing Bad performance when handling strongly-nonlinear systems 3

4 Harmonic Balance Harmonic balance refers to balancing the current between linear and nonlinear portions at every harmonic frequency. Harmonic balance process Nonlinear Diff. Equations Time Domain Convert to nonlinear equation of Fourier coefficients Approximate steady state solution 4

5 Harmonic Balance Analysis(1) Non-autonomous circuit analysis[1] t y ( t s) x( s) ds + + f ( x( t)) + b( t) = 0 xx(tt): State variables dq( x( t)) dt yy : Matrix-valued impulse response function of frequency-domain linear circuit components qq : Function for the nonlinear charge and flux ff ( ): Static(memoryless) nonlinearities bb : Time-dependent excitations [1] K. S. Kundert and A. Sangiovanni-vincentelli. Simulation of Nonlinear Circuits in the Frequency Domain, CAD,

6 6 Harmonic Balance Analysis(2) HB Jacobian matrix[1] Γ and Γ 1 represent the Fast Fourier Transform(FFT) and Inverse Fast Fourier Transform(IFFT) respectively GG and CC denote the linearization of qq()andff()at s time domain sampled points JJ hbb includes lots of dense blocks introduced by ΓGGΓ 1 and ΓCCΓ 1 [1] K. S. Kundert and A. Sangiovanni-vincentelli. Simulation of Nonlinear Circuits in the Frequency Domain, CAD, Γ + Γ Γ ΩΓ + = G C f j Y J hb π = t S t t x q x q x q C 2 1 = t S t t x f x f x f G 2 1

7 Our Proposed SCPHB Method Our proposed method: support-circuit preconditioned HB (SCPHB) iterative solver: Effective for solving RF nonlinear circuits Scalable linearized RF circuit sparsification Circuit-oriented preconditioner generation Adaptive support-circuit sparsification Matrix-free iterative solver 7

8 Graph Sparsification Techniques General linear circuit analysis problems can be converted to equivalent weighted, undirected graph problems G = ( V, E, w) The Laplacian matrix A of a graph VV : a set of vertices EE : a set of edges ww : a weight function that assigns a positive weight to every edge Defined by the quadratic form it induces, which is also known as the admittance matrix in circuit theory x T Ax = ( s, d ) E w, ( x( s) x( d)) s d 2 8

9 Graph Sparsification Techniques (cont.) Graph sparsifier GGG Sparse subgraph of GG can approximate GG in some measure(pairwise distance, cut values or the graph Laplacian) The goal of graph sparsification is to approximate a given graph GG by GG on the same set of vertices such that GG can be used as a proxy for GG in numerical computations without introducing too much error. A good sparsifier should have very few edges that will immediately result in significantly reduced computation and storage cost 9 Figure source: L. Koutis, G. L. Miller and R. Peng. A fast solver for a class of linear systems. Commun. ACM, 2012

10 Matrix Sparsification Benefit Good sparsifier: has fewer edges, significantly reduced computation and storage cost Our observation Modify node analysis (MNA) matrix entries reduction: 20% ~ 38% Fill-ins during LU reduction: 60% LU factorization Speedup: 50X 10

11 Support Graph Preconditioners Spanning-tree support graph as a preconditioner[2] May not be efficient for ill-conditioned system Reduces overall conductivities of the resistive network Mismatches the power dissipation between original graph and the spanning tree graph Original graph Spanning tree Edges of original graph Edges of spanning tree graph 11 [2] X. Zhao, J. Wang, Z. Feng and S. Hu. Power grid analysis with hierarchical support graphs. In Proc. ACM ICCAD, 2011.

12 Support Graph Preconditioners(cont.) Ultra-sparsifier support graph as a preconditioner[3] Adds critical extra edges to spanning tree Has better approximation in both eigenvalues and power dissipation Introduces more fill-ins during LU factorization Spanning tree Ultra-sparsifier Edges of spanning tree graph Extra edges [3] X. Zhao and Z. Feng. GPSCP: A General-Purpose Support-Circuit Preconditioning Approach to Large-Scale SPICE-Accurate Nonlinear Circuit Simulations. In Proc. IEEE/ACM ICCAD,

13 Adaptive Support-Circuit Sparsification Total simulation runtime T total = T LU + N T GMRES T LU T GMRES : Preconditioner LU factorization runtime : One GMRES iteration runtime N : Total GMRES iteration number N T GMRES T LU T LU N T GMRES Dense graph Sparse graph Adaptive sparsification control 13 If N is large then maintain more edges If N is small then further sparsify the matrix

14 Flowchart of Proposed Approach Start Device evaluation Decompose MNA matrix to Passive and active matrices NR Support-circuit preconditioner Preconditioner factorization 1. Construct representative passive matrix 2. Extract sparsification pattern 3. Sparsify MNA Matrix 4. Generate Support-circuit preconditioner GMRES iterations Block-based LU decomposition Convergence checking Matrix-free iterative solver 14 End

15 Support Circuit Preconditioner Construction Step 1: Linearized Circuit Decomposition Support-graph sparification : symmetric, diagonally dominant matrix Passive Matrix(P): passive devices such as resistors, capacitors, inductors Active Matrix(A): active devices such as transconductances, sources 15 L1 M1 R2 C1 L2 R1 RF Circuit C2 Note: t1~ts are s time sampled time points C gs C gs L1 3 C gd gmvgs C1 1 2 g C gs ds 4L2 R2 5 R1 C2 Linearized Circuit at t1... L1 C C gd g C gs ds C2 gmvgs 4 L2 R1 R2 5 Linearized Circuit at ts P t1 A t1 P ts A ts

16 Support Circuit Preconditioner Construction(cont.) Step 2: Representative Passive Matrix Construction Different sampled time points have different entry values Normalize all sampled time points passive matrix Average all scaled passive matrices P t1 P t2 P ts Normalize Average 16 Representative Passive Matrix

17 Support Circuit Preconditioner Construction(cont.) Step 3: Sparsification Pattern Extraction Convert matrix to weighted graph Sparsify the weighted graph and Convert back to matrix Combine with Active matrix Representative Passive Matrix 2 C1/h 1 C gd /h 3 g ds +C ds /h C gs /h 4 g2 Original Weighted Graph 5 g1+c2/h 2 C1/h 1 g1+c2/h C gd /h 3 g ds +C ds /h 4 g2 5 Ultra-Sparsifier 17 Sparsification pattern Matrix Active Matrix Sparsified Representative Passive Matrix

18 Support Circuit Preconditioner Construction(cont.) Step 4: MNA Matrix Sparsification System MNA Matrix t1 Sparsified System MNA Matrix t1 System MNA Matrix t2 Sparsification pattern Matrix Sparsified system MNA Matrix t2 18 System MNA Matrix ts Sparsified system MNA Matrix ts

19 Support Circuit Preconditioner Construction(cont.) Circulant matrix review G = g 1 g 2 g s [ 1 2 g, g,, ] FFT [ 1 2 g s G, G,, ] G s T T Γ G Γ 1 = G G G 1 s 2 G G 2 1 G s G G s 1 Step 5: Support circuit block preconditioner generation Original matrix : all variables of a single harmonic grouped together Permuted matrix: all the harmonics of a single variable grouped together Permutation FFT Sparsified MNA matrix 19 Permuted matrix Support circuit preconditioner

20 Block Sparse Matrix LU Factorization Test matrix Has same sparsity structure as the MNA matrix Has representative entries of all sampled time points MNA matrices Approximates the properties of block sparse matrix Has same permutation and pivoting pattern with block sparse matrix LU factorization Block sparse matrix LU factorization Applies permutation and pivoting pattern to block sparse matrix Performs LU factorization w/o pivoting Uses LAPACK/BLAS for matrix dense block multiplication and division Matrix-free iterative solver Implicit system Jacobian matrix Explicit preconditioner matrix which has limited entries 20

21 Experiment Setup Widely used RF circuits as the benchmark CKT Name Nodes Tones Freqs Nunk 1 mixer mixer mixer mixer LNA + mixer LNA + mixer LNA + mixer Note: Freqs: Number of harmonics Nunk: Number of unknowns 21

22 Runtime and Memory Efficiency Support-circuit preconditioned HB(SCPHB) method High robustness and efficiency Runtime speedup: 10X (compared with direct solver) Memory reduction: 8X(compared with direct solver) CKT Direct solver BD preconditioner SCPHB preconditioner Time(s) Mem(GB) Time(s) K-Its Time(s) Mem(GB) K-Its DNF DNF DNF DNF DNF DNF K-Its : GMRES iteration number DNF : Do not finish within 1000 Newton iterations 22

23 Near-constant runtime efficiency Simulation runtime VS. input power of LNA+Mixer BD preconditioner: increase exponentially SCPHB preconditioner: near-constant 23

24 Conclusion A scalable Jacobian matrix solving method is proposed for tackling frequency-domain strongly nonlinear HB analysis Our experimental results show that SCPHB method can attain: Obtain up to 10X speedups in RF HB simulations Reduce up to 8X memory consumption Key ideas : Use ultra-sparsifier support circuit as the preconditioner Use block sparse LU matrix solver for factorizing the preconditioner Use matrix-free iterative solver Use adaptive sparsification control to get best overall runtime 24