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1 Supplementary Materials for Layer-Resolved Graphene Transfer via Engineered Strain Layers Jeehwan Kim,* Hongsik Park,* James B. Hannon, Stephen W. Bedell, Keith Fogel, Devendra K. Sadana, Christos Dimitrakopoulos* *Corresponding author. (J.K.); (H.P.); (C.D.) This PDF file includes: Materials and Methods Supplementary Text Figs. S1 to S6 References (31, 32) Published 31 October 2013 on Science Express DOI: /science

2 Materials and Methods Graphene formation and transfer A 4-inch epitaxial graphene sheet with a single orientation was grown on a Si-face (0001) 4H-SiC wafer with 0.05 o miscut (23). Miscut orientation of as-received SiC wafers was undefined. The graphitization was performed in a commercial AIXTRON reactor (VP508GFR). The SiC substrate was annealed at 850 o C for 20 min for surface cleaning in vacuum (<1x10-6 mbar). The substrate temperature was raised to 1555 o C for 30 min and H 2 was introduced into the chamber (800 mbar) for 30 min for the second surface cleaning by thermally etching the top layers of SiC that might contain structural defects or remaining residue (10). The graphene of one or two monolayers was subsequently formed on the cleaned SiC surface in Ar ambient (100 mbar) at 1575 o C for 60 min by sublimating the Si atoms from the SiC wafer. The graphene formation process slows down dramatically after the completion of the first graphene monolayer on top of the buffer layer, allowing for manageable growth kinetics and good thickness uniformity. The reason behind the retardation of the growth rate of graphene is the inhibition of the Si sublimation process due to the growth of a barrier (graphene) impermeable to Si above the SiC decomposition front. Si atoms can escape only from defects in the graphene lattice (C vacancies, etc.), vicinal terrace edges, or the wafer edge. Thus, if a high quality graphene monolayer grows, formation of extra graphene layer(s) is practically restricted to the vicinity of the step edges (8,10). The graphene is completely exfoliated using a Ni adhesive-stressor layer and the thermally released tape handling layer. The graphene released from the SiC is transferred onto the Si wafer coated with 90-nm SiO 2 by pressing down the stack of layers, followed by the removal of the thermal tape by annealing just above the release temperature of 90 o C, and then etching the Ni layer in a FeCl 3 based solution. After the first growth and transfer of graphene, the SiC wafer was reused for the second graphene growth. As done in the first growth, the wafer was annealed (850 o C, 15 min) for removing any organic contamination and the high temperature annealing (1555 o C, 45 min) was performed for removing structural defect or remaining residue (10). The cleaned SiC was graphitized with the same condition as that used for the first growth. Because we could not observe Ni residue on the surface of the reused SiC wafer in optical microscope inspection, we only applied the two-step annealing to clean the wafer without applying any chemical etching/cleaning steps. However, for more cycles of growth/transfer processes, it may be required to apply wet-etching process to remove any adverse effects from accumulated process residue. Ni deposition and control of the internal stress The first 30-nm Ni protection film is deposited via thermal evaporation in the vacuum level of 1x10-5 Torr at a room temperature. This layer prevents the graphene surface from being damaged by a subsequent sputtering process. The second Ni adhesive-stressor layer is then deposited using a sputtering system. The internal stresses of metal films were estimated by using Stoney s method which is a standard method to measure the stress of films on a wafer. This method deduces the internal stress in the deposited films by 2

3 measuring the curvature of the substrate containing the stressed films (31). The wafer curvature was measured by a Tencor Flexus dual wavelength tool. The relation between the internal stress and the wafer curvature is given by Yst s σ Ni = ( ) 6 R R0 (1 ν s) tni where, σ Ni, R, R 0, ν S, t s, and t Ni are internal stress of Ni, curvature of the wafer after Ni deposition, curvature of the wafer before Ni deposition, Poisson s ratio of the substrate, thickness of substrate, and thickness of Ni. The stress in Ni is controlled by changing the deposition pressure with Ar flow from 3 mtorr to 10 mtorr (32). 300 MPa and 600 MPa are measured from the Ni films sputtered at 3 mtorr and 10 mtorr, respectively. The measured stress from purely evaporated Ni was 1 GPa. 3

4 Supplementary text Estimation of γ Ni-G by using Eq (1) The equation was derived based on the delamination theory (18,19). When the tensile strain energy is accumulated in the Ni films by increasing a thickness, this strain energy has to be relaxed at a critical point. There are three different energy states to be considered in a stack of Ni/graphene/SiC substrate: Ni surface energy, Ni/graphene interface energy (binding energy in the manuscript), and graphene/sic interface energy. It can be assumed that the strain in graphene is negligible since the Ni thickness is ~3 orders of magnitude higher. Since the surface energy of Ni is the highest among these three values, as a strain-relaxation path, the interface separation would proceed to the crack formation in the Ni films if the Ni thickness increases. Also because Ni/graphene interface energy ( γ Ni G ) is stronger than graphene/sic interface energy ( γ SiC G ), separation of Ni/graphene interface is preferred at a critical strain applied by the biaxial stress in Ni films. The delamination of graphene occurs from the SiC surface when the strain energy in Ni at a critical thickness reaches to γ SiC G. The critical Ni thickness ( t C Ni ) was empirically estimated by monitoring if the graphene is self-exfoliated in the deposition chamber with increasing Ni deposition thickness. By inserting t, Ni internal stress, and material parameters of Ni into the Eq. (1), quantitative value of γ SiC G was obtained. C Ni Reuse of a SiC wafer for more graphene growth/transfers To demonstrate that the SiC wafer can be reused for the developed transfer method, we repeated five cycles of the graphene growth/transfer (see Fig. S2) by reusing one SiC wafer. Fig. S2A shows five reproducible transfers of 4-inch wafer-scale graphene onto an 8-inch Si wafer coated with 90 nm. As a first step to estimate the quality of graphene from the first to the fifth growth/transfer, we compared Raman spectra measured from the five transferred graphene layers. Representative Raman spectra from each cycle are shown in Fig. S2B. We observed typical Raman spectra corresponding to high quality monolayer graphene (no D peak) from the five growth/transfer cycles spectra were collected from Raman mapping on 40 µm 40 µm area and their distributions of 2D/G peak ratio for five growth/transfer cycles are shown in Fig. S2C. The distribution shows that transferred graphene layers are monolayer and the consistency of the distributions from the five layers indicates that there was no significant change in the graphene quality during the five cycles of the process (Fig. S2D). Graphene coverage after transfer in each cycle was measured by Raman mapping and optical microscope. The high yield (> 95%) was maintained throughout the five cycles of growth/transfer (Fig. S2E). 4

5 Transfer yield of graphene after five repeated growths/transfers In order to determine the transfer yield (graphene coverage after transfer), we have observed the surface of transferred graphene on SiO 2 /Si (SiO 2 = 90 nm) by using optical microscopy images under the lowest magnification. Representative images from the graphene layer obtained by fifth growth and transfer are shown in Fig. S3 and the total displayed area is 55 mm 2. Empty regions were observed in the optical microscopy images as marked by the red arrows. The transfer yield estimated from the images was 95 99%. Electrical characterization of transferred graphene For fabrication of field effect transistors, monolayer graphene sheets were transferred from SiC substrates onto an oxidized Si substrate (highly-doped n-type Si wafer with a 90-nm-thick SiO 2 ) by using the two-step exfoliation. The channel length of the transistors was varied from 0.5 to 10 µm and the channel width was 2 µm. Source and drain electrodes (Ti/Pd/Au = 0.2/20/20 nm) were patterned on the graphene via electron beam lithography. After electrode patterning, the second e-beam lithography was used to define channel regions. The highly doped Si substrate was used as a back-gate. The transistors were measured by a semiconductor parameter analyzer (Agilent B5100) at room temperature in vacuum (~ 10-7 torr). The Hall bars were fabricated on a monolayer graphene by the same process as that for the transistors. The size of the Hall bar was 10 µm 2 µm. The Hall measurement was performed with a varied magnetic field (0.2, 0.4, 0.6, 0.8, 1.0 T) at room temperature in vacuum (~ 10-7 torr). The constant current applied for the measurement was 10 µa. During the fabrication of the Hall bars and transistors, we did not take any extraordinary steps to reduce positive unintentional doping. This unintentional doping could be originated from the elements that have made a contact to the graphene, such as adsorbed water molecules, e-beam resist (PMMA), Ni, and/or Au. Although no degradation of the mobility was observed after our graphene transfer process compared to the mobility of graphene before transfer, we expect that optimization on the process for thoroughly removing process residue will lead to the further improvement of mobility. 5

6 Fig. S1 A strain energy in Ni films as a function of thickness of Ni films under different internal stress conditions. Uniform high yield exfoliation (>95%) was obtained with high strain energy in Ni (approximately larger than 80% of the strain energy for self-exfoliation). 6

7 Fig. S2 (A) 4-inch wafer-scale graphene layers on 8-inch Si wafers coated with 90-nm-thick SiO 2 via five cycles of growth/transfer processes with one SiC wafer. (B) Representative Raman spectra from transferred graphene in each growth/transfer cycle. (C) Distribution of 2D/G peak ratio of 1680 Raman spectra from transferred graphene layers in each growth/transfer cycle. (D) The average 2D/G ratio in each cycle, indicating that graphene monolayer is consistently obtained during five cycles. Error bars correspond to standard deviations. (E) Graphene coverage after transfer in each cycle measured by Raman mapping and optical microscope, showing the transfer yield is maintained during five cycles. 7

8 Fig. S3 Optical microscopy images of transferred graphene on SiO 2 /Si wafer, which was obtained by the fifth growth and transfer. The total displayed area is 55 mm 2. 8

9 Fig. S4 40 ev electron diffraction pattern recorded from the graphene after transfer to SiO 2. The diffuse diffraction spots are characteristic of monolayer graphene on SiO 2. Reciprocal lattice vectors are shown in yellow. The bright feature indicated by the dashed lines arises from inelastically scattered electrons (e.g. secondary electrons). 9

10 Fig. S grid of 40 ev electron diffraction pattern recorded across the transferred graphene (scan area = 1mm 1mm). The identical diffraction patterns indicate that the transferred graphene layer has a single orientation. Identically aligned patterns were also observed on the graphene layer obtained from the reused SiC wafer. The transfer yield estimated from this image is 95%. 10

11 Fig. S6 Optical microscope images of field effect transistor (Left) and Hall bar (Right) fabricated on graphene obtained by the two-step exfoliation. 11

12 References and Notes 1. Y.-M. Lin, C. Dimitrakopoulos, K. A. Jenkins, D. B. Farmer, H. Y. Chiu, A. Grill, P. Avouris, 100-GHz transistors from wafer-scale epitaxial graphene. Science 327, 662 (2010). doi: /science Medline 2. Y.-M. Lin, A. Valdes-Garcia, S. J. Han, D. B. Farmer, I. Meric, Y. Sun, Y. Wu, C. Dimitrakopoulos, A. Grill, P. Avouris, K. A. Jenkins, Wafer-scale graphene integrated circuit. Science 332, (2011). doi: /science Medline 3. F. Xia, T. Mueller, Y.-M. Lin, A. Valdes-Garcia, Ph. Avouris, Ultrafast graphene photodetector. Nat. Nanotechnol. 4, (2009). doi: /nnano Medline 4. M. Liu, X. Yin, E. Ulin-Avila, B. Geng, T. Zentgraf, L. Ju, F. Wang, X. Zhang, A graphenebased broadband optical modulator. Nature 474, (2011). doi: /nature10067 Medline 5. K. S. Novoselov, V. I. Fal ko, L. Colombo, P. R. Gellert, M. G. Schwab, K. Kim, A roadmap for graphene. Nature 490, (2012). doi: /nature11458 Medline 6. X. Li, W. Cai, J. An, S. Kim, J. Nah, D. Yang, R. Piner, A. Velamakanni, I. Jung, E. Tutuc, S. K. Banerjee, L. Colombo, R. S. Ruoff, Large-area synthesis of high-quality and uniform graphene films on copper foils. Science 324, (2009). doi: /science Medline 7. K. S. Kim, Y. Zhao, H. Jang, S. Y. Lee, J. M. Kim, K. S. Kim, J. H. Ahn, P. Kim, J. Y. Choi, B. H. Hong, Large-scale pattern growth of graphene films for stretchable transparent electrodes. Nature 457, (2009). doi: /nature07719 Medline 8. K. V. Emtsev, A. Bostwick, K. Horn, J. Jobst, G. L. Kellogg, L. Ley, J. L. McChesney, T. Ohta, S. A. Reshanov, J. Röhrl, E. Rotenberg, A. K. Schmid, D. Waldmann, H. B. Weber, T. Seyller, Towards wafer-size graphene layers by atmospheric pressure graphitization of silicon carbide. Nat. Mater. 8, (2009). doi: /nmat2382 Medline 9. S. Tanaka et al., Phys. Rev. B 80, R (2009). doi: /physrevb Ph. Avouris, C. Dimitrakopoulos, Graphene: Synthesis and applications. Mater. Today 15, (2012). doi: /s (12) S. Unarunotai, J. C. Koepke, C. L. Tsai, F. Du, C. E. Chialvo, Y. Murata, R. Haasch, I. Petrov, N. Mason, M. Shim, J. Lyding, J. A. Rogers, Layer-by-layer transfer of multiple, large area sheets of graphene grown in multilayer stacks on a single SiC wafer. ACS Nano 4, (2010). doi: /nn101896a Medline 12. J. D. Caldwell, T. J. Anderson, J. C. Culbertson, G. G. Jernigan, K. D. Hobart, F. J. Kub, M. J. Tadjer, J. L. Tedesco, J. K. Hite, M. A. Mastro, R. L. Myers-Ward, C. R. Eddy, Jr., P. M. Campbell, D. K. Gaskill, Technique for the dry transfer of epitaxial graphene onto arbitrary substrates. ACS Nano 4, (2010). doi: /nn901585p Medline Page 1 of 3

13 13. J. B. Hannon, R. M. Tromp, Pit formation during graphene synthesis on SiC(0001): In situ electron microscopy. Phys. Rev. B 77, R (2008). doi: /physrevb N. Luxmi et al., J. Vac. Sci. Technol. B 28, C5C1 (2010). 15. During graphene formation on the Si face of a SiC wafer by Si sublimation from the surface, an interfacial C buffer layer [the ( )R30 reconstruction of the 0001 surface of SiC] that is covalently bonded to the SiC surface is also formed. For simplicity, we express a C buffer/sic substrate as a SiC substrate. 16. Materials and methods are available as supplementary materials on Science Online. 17. I. Hamada, M. Otani, Comparative van der Waals density-functional study of graphene on metal surfaces. Phys. Rev. B 82, (2010). doi: /physrevb J. Kim, D. Inns, D. K. Sadana, Investigation on critical failure thickness of hydrogenated/nonhydrogenated amorphous silicon films. J. Appl. Phys. 107, (2010). doi: / W. D. Nix, Mechanical properties of thin films. Metall. Mater. Trans. A Phys. Metall. Mater. Sci. 20, (1989). doi: /bf R. Podeszwa, Interactions of graphene sheets deduced from properties of polycyclic aromatic hydrocarbons. J. Chem. Phys. 132, (2010). doi: / Medline 21. R. Zacharia, H. Ulbricht, T. Hertel, Interlayer cohesive energy of graphite from thermal desorption of polyaromatic hydrocarbons. Phys. Rev. B 69, (2004). doi: /physrevb S.-H. Ji, J. B. Hannon, R. M. Tromp, V. Perebeinos, J. Tersoff, F. M. Ross, Atomic-scale transport in epitaxial graphene. Nat. Mater. 11, (2011). doi: /nmat3170 Medline 23. C. Dimitrakopoulos, A. Grill, T. J. McArdle, Z. Liu, R. Wisnieff, D. A. Antoniadis, Effect of SiC wafer miscut angle on the morphology and Hall mobility of epitaxially grown graphene. Appl. Phys. Lett. 98, (2011). doi: / Y.-M. Lin, D. B. Farmer, K. A. Jenkins, Y. Wu, J. L. Tedesco, R. L. Myers-Ward, C. R. Myers-Ward, D. K. Gaskill, C. Dimitrakopoulos, P. Avouris, Enhanced performance in epitaxial graphene FETs with optimized channel morphology. IEEE Electron Device Lett. 32, (2011). doi: /led E. Bauer, Low energy electron microscopy. Rep. Prog. Phys. 57, (1994). doi: / /57/9/ K. R. Knox, S. Wang, A. Morgante, D. Cvetko, A. Locatelli, T. O. Mentes, M. A. Niño, P. Kim, R. M. Osgood, Spectromicroscopy of single and multilayer graphene supported by a weakly interacting substrate. Phys. Rev. B 78, R (2008). doi: /physrevb T. Ohta, A. Bostwick, T. Seyller, K. Horn, E. Rotenberg, Controlling the electronic structure of bilayer graphene. Science 313, (2006). doi: /science Medline Page 2 of 3

14 28. C. Riedl, A. A. Zakharov, U. Starke, Precise in situ thickness analysis of epitaxial graphene layers on SiC(0001) using low-energy electron diffraction and angle resolved ultraviolet photoelectron spectroscopy. Appl. Phys. Lett. 93, (2008). doi: / F. Xia, V. Perebeinos, Y.-M. Lin, Y. Wu, Ph. Avouris, The origins and limits of metalgraphene junction resistance. Nat. Nanotechnol. 6, (2011). doi: /nnano Medline 30. A. D. Franklin, S.-J. Han, A. A. Bol, W. Haensch, Effects of nanoscale contacts to graphene. IEEE Electron Device Lett. 32, (2011). doi: /led G. Stoney, The tension of metallic films deposited by electrolysis. Proc. R. Soc. London Ser. A 82, (1909). doi: /rspa S. W. Bedell, K. Fogel, P. Lauro, D. Shahrjerdi, J. A. Ott, D. Sadana, Layer transfer by controlled spalling. J. Phys. D Appl. Phys. 46, (2013). doi: / /46/15/ Page 3 of 3

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