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1 Supplementary Information for Highly Stable, Dual-Gated MoS 2 Transistors Encapsulated by Hexagonal Boron Nitride with Gate-Controllable Contact Resistance and Threshold Voltage Gwan-Hyoung Lee, Xu Cui, Young Duck Kim, Ghidewon Arefe, Xian Zhang, Chul-Ho Lee, Fan Ye, Kenji Watanabe, Takashi Taniguchi, Philip Kim, and James Hone Stacking techniques Two polymer-free transfer techniques were utilized to multi-stack two-dimensional (2D) materials for van der Waals (vdw) heterostructures assembly. vdw transfer : As shown in our previous report 1, this technique utilizes vdw adhesion force to assemble 2D materials into heterostructures and avoid polymer residue contamination. First, hexagonal boron nitride (hbn) flakes with the thickness of 5-30 nm were mechanically exfoliated onto a bare Si chip coated with poly-propylene carbonate (PPC) film of approximately 1 µm thickness. Then MoS 2 (SPI Supplies) and few-layer graphene (Covalent Materials Co.) were separately prepared on SiO 2 substrates by mechanical exfoliation. After carefully peeling the PPC film off the Si substrate, it was placed onto a transparent polydimethylsiloxane (PDMS) stamp. The hbn flake on the PDMS stamp was inverted and aligned onto the target MoS 2 or graphene flakes on the SiO 2 substrate by micromanipulator. When the hbn flake was brought into contact to the target flake at 40 C,

2 it was gently released to pick up the target flake. As shown in Fig. S1, the stack of hbn/gr/mos 2 was sequentially formed. The entire stack of hbn/gr/mos 2 was finally transferred onto hbn on a SiO 2 /Si substrate by melting the PPC film at 90 C, followed by dissolving the polymer in chloroform, resulting in a final stack of hbn/gr/mos 2 /hbn on the SiO 2. PDMS transfer : As explained in our previous report 5, we directly exfoliated hbn, MoS 2, and graphene flakes on the PDMS stamps and conducted multiple transfers onto the hbn on a SiO 2 substrate. Figure S1. Optical micrographs for stacking process. Top-hBN flake was prepared on a PPC/PDMS stamp. Graphene flakes were picked up with top-hbn. Subsequently, MoS 2 flake was picked up. The entire stack was transferred onto bottom-hbn on a SiO 2 substrate.

3 Device fabrication process We used e-beam lithography to expose the edges of graphene for graphene-metal edge contacts. 1 The patterned Poly(methyl methacrylate) (PMMA) was used as an etching mask for a dry etching process using inductively coupled plasma (ICP, Oxford 80) with a mixture of CHF 3 and O 2 gases. The stack was fully etched to expose edges of graphene flakes. After dissolution of the PMMA film in acetone, the second e-beam lithography process was followed to define the metal leads. Then, the metals of Cr 1 nm/pd 20 nm/au 50 nm was deposited. Storage conditions for environmental sensitivity tests Ambient air: Monolayer MoS 2 on a SiO 2 substrate was stored in ambient condition. It was exposed to air at room temperature for a few months without controlling any environmental conditions. Note that the HfO 2 -encapsulated or hbn-encapsulated monolayer MoS 2 samples were stored in this condition. High humidity: Monolayer MoS 2 on a SiO 2 substrate was stored in a sealed big beaker, which has a smaller beaker filled with water. The beaker containing the MoS 2 sample was heated on a hot plate at 80 C for a few months, maintaining high humidity. Vacuum: Monolayer MoS 2 on a SiO 2 substrate was stored in a vacuum desiccator of < 1 Torr for a few months to maintain the low humidity and prevent air-exposure.

4 Figure S2. (a) Raman and (b) Photoluminescence (PL) spectra of monolayer MoS 2 stored in humidity and vacuum conditions. (c) FWHM of PL peak in the monolayer MoS 2 samples stored in different conditions. The green arrow indicates the change in the HfO 2 -encapsulated sample right after deposition of HfO 2.

5 Table S1. Summary of two-terminal field-effect mobilities of the hbn-encapsulated MoS 2 devices. The thickness of MoS 2 and stacking method for each sample are given. Tests for degradation and stability of MoS 2 devices For comparison, un-encapsulated MoS 2 field effect transistor with 1-3 layers was fabricated on a SiO 2 /Si substrate. In this case, the metal electrodes of Al 40 nm/cr 5 nm/au 50 nm or Ti 1 nm/au 50 nm were used. As reported by others 2, 3, 4, 5, 6, the field effect mobilities (µ FE ) in these MoS 2 devices were in the range of cm 2 /Vs when measured right after device fabrication. However, when the devices were exposed to ambient air for 2 months, the conductance of MoS 2 continuously decreased, leading to a significant reduction of mobility. As shown in the inset of Fig. 3, trilayer MoS 2 showed a decrease of mobility

6 from 7 cm 2 /Vs to 1.2 cm 2 /Vs after 2 months. The other MoS 2 devices also showed the similar trend of mobility degradation with time. Note that all the measurements were conducted under ambient condition (in air at room temperature). When the MoS 2 FETs were encapsulated by 30 nm-thick HfO 2, the devices exhibited the more complicated behavior as shown in Fig. S2. The HfO 2 film was grown on MoS 2 devices by atomic layer deposition (ALD) at 200 C. Right after deposition of HfO 2, the bilayer MoS 2 FET showed a large shift of threshold voltage and significant increase of conductance, probably due to doping by chemical reaction during ALD process. However, when measured after 2 days, it appears that performance of the device was back to normal. The field effect mobility of this device showed enhancement from 19.9 cm 2 /Vs (before deposition of HfO 2 ) to 29.9 cm 2 /Vs (after deposition). In addition, hysteresis was reduced after HfO 2 deposition, probably due to prevention of air exposure during measurement. We tested HfO 2 - encapsulated MoS 2 EFTs of more than ten, the mobilities for 1L, 2L, 3L and 5nm-thick MoS 2 showed broad ranges of cm 2 /Vs, cm 2 /Vs, cm 2 /Vs, and cm 2 /Vs, respectively. Even though deposition of HfO 2 normally leads to improvement of the mobility of MoS 2, some of samples showed low mobilities and there was no huge enhancement contrary to the two orders of magnitude improvement reported by others. 3, 7 Moreover, the HfO 2 -encapsulated MoS 2 FETs degraded after 2 months, resulting in a decrease of mobility to 3.5 cm 2 /Vs, as shown in Fig. S3.

7 Figure S3. Transfer curves of HfO 2 -encapsulated bilayer MoS 2 device. As time goes by, the device shows performance degradation. Figure S4. Transfer curves of the hbn-encapsulated MoS 2 devices with different number of MoS 2 layers without degradation over 4 months.

8 Figure S5. Changes in the ratios of mobilities (μ/μ ) and threshold voltages ( / ) of the hbn-encapsulated MoS 2 devices with different number of MoS 2 layers as a function of time. μ and are mobility and threshold voltage right after device fabrication. High temperature stability of MoS 2 device To further investigate the device stability of MoS 2 devices, the devices were heated up to 200 C during the measurement. For comparison, we did the same measurements on the unencapsulated or HfO 2 -encapsulated MoS 2 FETs on a SiO 2 substrate. As shown in Fig. S6, the un-encapsulated bilayer MoS 2 device was damaged around 50 C during the measurement. Note that all the measurements were conducted under ambient condition. The optical micrographs of Fig. S6a indicate that MoS 2 flake is damaged by burning near or in the junction area between metal and MoS 2, probably due to chemical reaction of reactive MoS 2 surface and Joule heating around electrodes. Even though the un-encapsulated thicker MoS 2 devices of > 3 layers are operating at 200 C as shown in trilayer MoS 2 of Fig. 6b, it should be noted that the operating trilayer MoS 2 device shows lots of kinks, indicative of reactions with air or charged impurities. On the other hand, it was observed that the HfO 2 -encapsulated bilayer MoS 2 device was strongly n-doped during the heating process, i.e. left-hand shift of threshold voltage, showing abrupt jumps in conductance, memory steps, as shown in Fig. S6c. When it was cooled down

9 to room temperature, a large negative shift (> 40 V) of threshold voltage was observed. Even though this device showed the similar mobility after cooling down, the large threshold voltage shift indicates that the HfO 2 -encapsulated MoS 2 experienced a considerable doping through chemical reactions with residual chemicals of HfO 2 and interfaces or there are charged impurities in the substrate. On the contrary, the BN-encapsulated MoS 2 FETs maintain the high mobilities and threshold voltage during heating and cooling procedure, consistently showing high device operation stability. Figure S6. (a) Optical micrographs of un-encapsulated bilayer MoS 2 FET before heating and after heating at 50 C. Transfer curves of (b) un-encapsulated trilayer MoS 2 device on SiO 2 substrate and (c) HfO 2 -encapsulated bilayer MoS 2 device during heating and cooling procedure.

10 References S1. Wang, L.; Meric, I.; Huang, P. Y.; Gao, Q.; Gao, Y.; Tran, H.; Taniguchi, T.; Watanabe, K.; Campos, L. M.; Muller, D. A.; et al. One-Dimensional Electrical Contact to a Two-Dimensional Material. Science 2013, 342, S2. Novoselov, K. S.; Jiang, D.; Schedin, F.; Booth, T. J.; Khotkevich, V. V.; Morozov, S. V.; Geim, A. K. Two-Dimensional Atomic Crystals. Proc. Natl. Acad. Sci. 2005, 102, S3. Radisavljevic, B.; Radenovic, A.; Brivio, J.; Giacometti, V.; Kis, A. Single-Layer MoS 2 Transistors. Nat. Nanotechnol. 2011, 6, S4. Late, D. J.; Liu, B.; Matte, H. S. S. R.; Dravid, V. P.; Rao, C. N. R. Hysteresis in Single-Layer MoS 2 Field Effect Transistors. ACS Nano 2012, 6, S5. Choi, M. S.; Lee, G. H.; Yu, Y. J.; Lee, D. Y.; Lee, S. H.; Kim, P.; Hone, J.; Yoo, W. J. Controlled Charge Trapping by Molybdenum Disulphide and Graphene in Ultrathin Heterostructured Memory Devices. Nat. Commun. 2013, 4, S6. Bao, W. Z.; Cai, X. H.; Kim, D.; Sridhara, K.; Fuhrer, M. S. High Mobility Ambipolar MoS 2 Field-Effect Transistors: Substrate and Dielectric Effects. Appl. Phys. Lett. 2013, 102, S7. Fuhrer, M. S.; Hone, J. Measurement of Mobility in Dual-Gated MoS 2 Transistors. Nat. Nanotechnol. 2013, 8,

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