Description. Table 1. Device summary (1) Lead finish

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Transcription:

Aerospace 45 V power Schottky rectifier Datasheet - production data Description A K K his power Schottky rectifier is designed and packaged to comply with the ESCC5000 specification for aerospace products. It is housed in a surface mount hermetically sealed LCC2B package. A he 1N5819U is suitable for switching mode power supplies and high frequency DC to DC converters such as low voltage high frequency inverter, free wheeling or polarity protection. Leadless chip carrier 2 (LCC2B) Features Aerospace applications Surface mount hermetic package High thermal conductivity materials Very small conduction losses Negligible switching losses Extremely fast switching Low forward voltage drop Package mass: 0.18 g arget radiation qualification 150 krad (Si) low dose rate 3 Mrad (Si) high dose rate ESCC qualified Order code ESCC detailed specification able 1. Device summary (1) Quality level Lead finish EPPL I F(AV) V RRM j(max) VF (max) 1N5819UB1 Engineering model Gold 1N5819U01B 56/021/02 ESCC Gold yes 1N5819U02B 56/021/03 ESCC Solder dip yes 1 45 150 0.49 1. Contact S sales office for information about the specific conditions for products in die form. December 2015 DocID16006 Rev 5 1/ his is information on a product in full production. www.st.com

Characteristics 1N5819U 1 Characteristics able 2. Absolute ratings (limiting values) Symbol Parameter Value Unit V RRM Repetitive peak reverse voltage 45 V I F(RMS) Forward rms current A I F(AV) Average forward rectified current c 142 Cδ = 0.5 1 A I FSM Forward surge current t p = ms sinusoidal 25 A stg Storage temperature range -65 to +150 C j Maximum operating junction temperature (1) 150 C sol Maximum soldering temperature (2) 245 C 1. dp tot 1 < d Rth(j-a) j condition to avoid runaway for a diode on its own heatsink 2. Maximum duration 5 s. he same package must not be re-soldered until 3 minutes have elapsed. able 3. hermal resistance Symbol Parameter Value Unit R th (j-c) Junction to case 16 C/W 2/ DocID16006 Rev 5

Characteristics able 4. Static electrical characteristics Symbol Parameter est conditions Min. yp. Max. Unit j = 25 C - - 20 µa V R = 45 V j = 0 C - - 3.5 ma j = -55 C V R = 45 V - - 20 j = -55 C V R = 40 V - - µa I R (1) Reverse leakage current j = 25 C - - 15 V R = 40 V j = 0 C - - 3 j = 0 C V R = 35 V - - 2.5 j = 0 C V R = 24 V - - 1.6 j = 0 C V R = 12 V - - 1.2 ma j = 0 C V R = 6 V - - 1 j = 25 C I F = 0.1 A - - 350 j = 25 C - - 490 V F (2) Forward voltage drop j = 0 C I F = 1A - - 450 mv j = - 55 C - - 650 j = 25 C I F = 3.1 A - - 800 1. Pulse test: t p = 5 ms, δ < 2% 2. Pulse test: t p = 680 µs, δ < 2% o evaluate the conduction losses use the following equation: 2 P = 0.285 x IF(AV) + 0.165 x I F (RMS ) able 5. Dynamic characteristics Symbo l Parameter est conditions Min. y p. Max. Uni t C j Diode capacitance V R = 5 V, F = 1 MHz - - 70 pf DocID16006 Rev 5 3/

Characteristics 1N5819U Figure 1. Average forward power dissipation versus average forward current 0.9 P F(AV) (W) 1.2 Figure 2. Average forward current versus ambient temperature ( = 0.5) I F(AV) (A) 0.8 0.7 δ = 0.05 δ = 0.1 δ = 0.2 δ = 0.5 δ = 1 1.0 R th(j-a) = R th(j-c) 0.6 0.8 0.5 0.4 0.6 0.3 0.2 0.1 δ =t p / I t p (A) F(AV) 0.0 0.0 0.2 0.4 06 0.8 1.0 1.2 1.4 1.6 0.4 0.2 δ =t p / t p amb 0.0 0 25 50 75 0 125 150 ( C) Figure 3. Non repetitive surge peak forward current versus overload duration (maximum values) Figure 4. Relative variation of thermal impedance junction to case versus pulse duration 16 I (A) M 1.0 0.9 Z th(j-c) / R th(j-c) 14 0.8 12 0.7 8 6 4 2 I M 0 1.E-03 t δ = 0.5 1.E-02 1.E-01 C = 25 C C = 75 C C = 125 C t(s) 1.E+00 0.6 0.5 0.4 0.3 Single pulse 0.2 0.1 0.0 1.E-05 1.E-04 1.E-03 1.E-02 1.E-01 1.E+00 t (s) p 1.E+01 Figure 5. Reverse leakage current versus reverse voltage applied (typical values) Figure 6. Forward voltage drop versus forward current (typical values) 1.E+02 1.E+01 1.E+00 I (ma) R j = 150 C j = 125 C j = 0 C.00 1.00 I (A) FM 1.E-01 1.E-02 1.E-03 j = 75 C = 50 C j = 25 C j V (V) R 1.E-04 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0. j = 0 C j = 25 C j = -55 C V (V) FM 0.01 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 4/ DocID16006 Rev 5

Characteristics Figure 7. Non repetitive surge peak forward current versus number of cycles 30 25 I FSM (A) F = 50 Hz j initial = 25 C 20 15 5 Number of cycles 0 0 0 00 DocID16006 Rev 5 5/

Package information 1N5819U 2 Package information In order to meet environmental requirements, S offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an S trademark. 2.1 Leadless chip carrier 2 (LCC2B) package information Figure 8. Leadless chip carrier 2 (LCC2B) package outline A B D Note 1 2 C 1 F Note 1 Pin 2 Cathode E Note 1 E Pin 1 Anode H 1 2 r1 G I r2 1. he anode is identified by metalization in two top internal angles and the index mark. 6/ DocID16006 Rev 5

Package information able 6. Leadless chip carrier 2 (LCC2B) package mechanical data Dimensions Ref. Millimeters Inches Min. yp. Max. Min. yp. Max. A (1) 2.04 2.23 2.42 0.080 0.088 0.095 B 5.27 5.4 5.6 0.207 0.213 0.220 C 3.49 3.62 3.76 0.137 0.143 0.148 D 1.71 1.90 2.09 0.067 0.075 0.082 E 0.48-0.71 0.019-0.028 F - 1.4 - - 0.055 - G - 3.32 - - 0.131 - H - 1.82 - - 0.072 - I - 0.15 - - 0.006 - r1-0.15 - - 0.006 - r2-0.20 - - 0.008-1. Measurement prior to solder coating the mounting pads on bottom of package DocID16006 Rev 5 7/

Ordering information 1N5819U 3 Ordering information able 7. Ordering information (1) Order code 1N5819UB1 ESCC detailed specification Package Lead finish Marking (2) EPPL Mass Packing Gold 1N5819UB1-1N5819U01B 56/021/02 LCC2B Gold 56022 Y 0.18 g Waffle pack 1N5819U02B 51/021/03 Solder dip 56023 Y 1. Contact S sales office for information about the specific conditions for products in die form. 2. Specific marking only. he full marking includes in addition: For the engineering models: S logo, date code, country of origin (FR). For ESCC flight parts: S logo, date code, country of origin (FR), ESA logo, serial number of the part within the assembly lot. 4 Other information 4.1 Date code Date code is structured as describe below: EM xyywwz ESCC flight yywwz Where: x (EM only): 3, assembly location Rennes (France) yy: last two digits year ww: week digits z: lot index in the week 4.2 Documentation In able 8 is a summary of the documentation provided with each type of products. able 8. Documentation provided with each type of products Quality level Documentation Engineering model ESCC flight Certificate of conformance 8/ DocID16006 Rev 5

Revision history 5 Revision history able 9. Document revision history Date Revision Changes -Aug-2009 1 First issue. 07-Jun-20 2 Updated ESCC specification codes in able 1 and able 7. 23-Sep-2011 3 Updated able 1 and able 7 for ESCC qualification. 8-Nov-2013 4 Updated able 1, able 5 and able 7 and inserted Other information. 04-Dec-2015 5 Updated able 7 and reformatted to current standard. DocID16006 Rev 5 9/

IMPORAN NOICE PLEASE READ CAREFULLY SMicroelectronics NV and its subsidiaries ( S ) reserve the right to make changes, corrections, enhancements, modifications, and improvements to S products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on S products before placing orders. S products are sold pursuant to S s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of S products and S assumes no liability for application assistance or the design of Purchasers products. No license, express or implied, to any intellectual property right is granted by S herein. Resale of S products with provisions different from the information set forth herein shall void any warranty granted by S for such product. S and the S logo are trademarks of S. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 2015 SMicroelectronics All rights reserved / DocID16006 Rev 5