Network Synthesis Part I

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1 Part I Amin Electronics and Electrical Communications Engineering Department (EECE) Cairo University elc.n2.eng@gmail.com

2 OUTLINE References Definition Network Functions Realizability Conditions 2

3 References Gabor C. Temes & Jack W. Lapatra, Introduction to Circuit Synthesis and Design, McGraw-Hill Book Company. M.E. Van Valkenburg, Introduction to Modern Network Synthesis, John Wiley Inc. 3

4 Definition What we have used to do so far is the calculation of the response of a known circuit to a given excitation. This is called analysis of circuits. 4

5 Definition In network synthesis we try to find a new circuit that provides a required response to a given input excitation Synthesis solutions are not unique 5

6 Definition In network synthesis, complex frequency s = δ + jω is used to analyze the circuits because it simplifies algebraic work by including the imaginary part in s. I = V R + jωl + jωc I = V R + sl + sc 6

7 One-Port Networks For a single port network, synthesis may be operated on the following functions: Driving point impedance Z s = V s I s Driving point admittance Y s = I s V s 7

8 Two-Port Networks For a two port network, synthesis may be operated on the following functions: Driving point impedance Z s = V s I s Driving point admittance Z 22 s = V 2 s I 2 s 8

9 Two-Port Networks For a two port network, synthesis may be operated on the following functions: Driving point impedance Z 2 s = V s I 2 s Driving point admittance Y 2 s = I 2 s V s 9

10 Two-Port Networks For a two port network, synthesis may be operated on the following functions: Driving point impedance G 2 s = V 2 s V s Driving point admittance α 2 s = I 2 s I s 0

11 One-Port Networks We will focus on the synthesis of driving point functions for oneport networks. The functions used are generally in the form of ratios of polynomials Z s or Y s = φ s ψ s = α ms m + α m s m + + α 0 β n s n + β n s n + + β 0 = γ m γ n s z s z 2 s z m s p s p 2 s p n

12 Example () Z s = // R + sl sc Find the impedance of the shown circuit = R + sl sc R + sl + sc = R + sl scr + s 2 LC + 2

13 One-Port Networks Z s or Y s = φ s ψ s = α ms m + α m s m + + α 0 β n s n + β n s n + + β 0 α s and β s are positive constants m is the orders of φ s. n are the orders of ψ s. 3

14 One-Port Networks Z s or Y s = φ s ψ s = α γms m + α m s m s z s z 2 + s+ αz 0m γα n s n + β n s n n s p s p s β 0 p n z, z 2,, z m are the zeros of Z s or Y s p, p 2,, p n are the poles of Z s or Y s γ m γ n is the scale factor 4

15 For series impedances Z s = Z s + Z 2 s Realization of a Function For parallel impedances Z s = Y s + Y 2 s = Z s + Z 2 s 5

16 For series impedances Y s = Realization of a Function Z s + Z 2 s For parallel impedances Y s = Y s + Y 2 s = Z s + Z s 6

17 For a combination of series and parallel impedances Z s = Z s + Z p s Realization of a Function = Z s + Y 2 s + Y 3 s = Z s + Z 2 s + Z 3 s 7

18 For a combination of series and parallel impedances Z s = Realization of a Function Y s + Y 2 s = Z s + Z 2 s + Z 3 s 8

19 For a combination of series and parallel impedances Y s = Realization of a Function Z s + Z p s = = Z s + Y 2 s + Y 3 s Z s + Z 2 s + Z 3 s 9

20 For a combination of series and parallel impedances Y s = Y s + Y s s Realization of a Function = Z s + Z 2 s + Z 3 s 20

21 Realization of a Function Z s = Z s + Y 2 s + Z 3 s + Y 4 s + Z 5 s + Y s = Y s + Z 2 s + Y 3 s + Z 4 s + Y 5 s + 2

22 Realization of a Function Z s = sl + R s 2 LC + src + Z s = sc + R + sl 22

23 Realization of a Function Z s = sl + R s 2 LC + src + Z s = sc + R + sl In network synthesis, we try to find a way to convert the function (Z s or Y s ) into a form that is easier to be realized into a circuit. 23

24 Realizability Conditions ) The function must be a Positive Real (PR) Real Z s or Y s 0 for Real s 0 This condition means that the power flows from the source to the circuit Z s = R + sx Z 2 s = R + sx Y s = G + sx Y 2 s = G + sx 24

25 ) The function must be a Positive Real (PR) Real Z s or Y s 0 for Real s 0 This condition means that the power flows from the source to the circuit The poles of the function are negative or, if complex, they have a negative real part. This condition makes the circuit stable. The poles on the jω axis must be simple poles. Z s or Y s origin. Realizability Conditions must not have multiple zeros or poles at the 25

26 Realizability Conditions 2) For the function Z s or Y s = φ s ψ s = α ms m + α m s m + + α 0 β n s n + β n s n + + β 0 The power of the numerator and denominator in s must differ at most by ±. This is because the function must be reduced to one of the elements R, sl, sc or G, sl, sc 26

27 First Foster Form In first foster form, partial fraction is used to factorized Z s α s + α 0 Z s = β 2 s 2 + β 2 s + β 0 Z s = k a s + b + k 2 a 2 s + b 2 27

28 Example () Use the first foster form to synthesize the function Z s = s2 + 4s + 3 s 2 + 2s 28

29 Second Foster Form In second foster form, partial fraction is used to factorized Y s α s + α 0 Y s = β 2 s 2 + β 2 s + β 0 Y s = k a s + b + k 2 a 2 s + b 2 29

30 Example (2) Use the second foster form to synthesize the function Y s = 4s4 + 7s 2 + s 2s Y s = 4s4 + 7s 2 + 2s 3 + 3s = 2s + s2 + s 2s

31 Cauer Form (Continued Fraction Expansion) First Cauer Form of Z s starts with Z s = α ms m + α m s m + + α 0 β n s n + β n s n + + β 0 then Continued Fraction Expansion (CFE) is applied to Z s put it in the form to Z s = Z s + Y 2 s + Z 3 s + Y 4 s + Z 5 s + 3

32 Example (3) Realize the following function in the first Cauer form Z s = s4 + 4s s 3 + 2s 32

33 Cauer Form (Continued Fraction Expansion) First Cauer Form of Y s starts with Y s = β ns n + β n s n + + β 0 α m s m + α m s m + + α 0 then Continued Fraction Expansion (CFE) is applied to Y s put it in the form to Y s = Y s + Z 2 s + Y 3 s + Z 4 s + Y 5 s + 33

34 Example (4) Realize the following admittance function in the first Cauer Form Y s = s2 + 4s + 3 s 2 + 2s 34

35 Cauer Form (Continued Fraction Expansion) Secound Cauer Form of Z s starts with Z s = α α m s m + α m s m β β n s n + β n s n then Continued Fraction Expansion (CFE) is applied to Z s put it in the form to Z s = Z s + Y 2 s + Z 3 s + Y 4 s + Z 5 s + 35

36 Example (5) Realize the following admittance function in the second Cauer Form Z s = s4 + 4s s 3 + 2s 36

37 Cauer Form (Continued Fraction Expansion) Secound Cauer Form of Y s starts with Y s = β β n s n + β n s n α α m s m + α m s m then Continued Fraction Expansion (CFE) is applied to Y s put it in the form to Y s = Y s + Z 2 s + Y 3 s + Z 4 s + Y 5 s + 37

38 Example (6) Realize the following admittance function in the second Cauer Form Y s = s2 + 4s + 3 s 2 + 2s 38

Network Synthesis. References :

Network Synthesis. References : References : Network ynthesis Gabor C. Temes & Jack W. Lapatra, Introduction to Circuit ynthesis and Design, McGraw-Hill Book Company. M.E. Van Valkenburg, Introduction to Modern Network ynthesis, John