Boolean Algebra and Logic Gates

Transcription

1 Boolean Algebra and Logic Gates Prof. Wangrok Oh Dept. of Information Communications Eng. Chungnam National Universit Prof. Wangrok Oh(CNU) / 5

2 Overview Aiomatic Definition of Boolean Algebra 2 Basic Theorems and Properties of Boolean Algebra 3 Boolean Functions 4 Canonical and Standard Forms 5 Other Logic Operations 6 Digital Logic Gates 7 Integrated Circuits Prof. Wangrok Oh(CNU) 2 / 5

3 Aiomatic Definition of Boolean Algebra In 854, George Boole developed an algebraic sstem now called Boolean algebra 938, Claude E. Shannon introduced a two-valued Boolean algebra called switching algebra Boolean Algebra Set of elements B 2 Two binar operators: + and Boolean algebra satisfies following (Huntington) postulates: The structure is closed with respect to the operators + and 2 and are an identit with respect to + and, respectivel + = + = = = 3 The structure is commutative with respect to + and + = + = Prof. Wangrok Oh(CNU) Aiomatic Definition of Boolean Algebra 3 / 5

4 Aiomatic Definition of Boolean Algebra 4 The operator is distributive over + and the operator + is distributive over ( + ) = + + ( ) = ( + ) ( + ) 5 For ever element B, there eists an element B (called the complement of ) such that + = and = + = = 6 There eist at least two elements, B such that Prof. Wangrok Oh(CNU) Aiomatic Definition of Boolean Algebra 4 / 5

5 Our interest here is in the application of Boolean algebra to gate tpe circuits commonl Aiomatic used in Definition digital devices and ofcomputers. Boolean Algebra Two Valued Boolean Algebra Two-Valued A two valued Boolean Boolean algebra Algebra is defined on a set of two elements, B = {, }, with rules for the A two-valued binar operators Boolean+ algebra and # as is shown defined the onfollowing a set ofoperator two elements, tables (the rule for the Bcomplement {, } with operator rules for is for the verification two binar of operators postulate 5): + and # These rules are eactl the same as the AND, OR and NOT operations Huntington postulates valid for the set B {, } Structure is closed with respect to the two operators + and 2 Identit elements: for + and for 3 Commutative laws are obvious from the smmetr of the binar operators 4 Distributive law Prof. Wangrok Oh(CNU) Aiomatic Definition of Boolean Algebra 5 / 5

6 3. The commutative laws are obvious from the smmetr of the binar operator tables. Aiomatic Definition of Boolean Algebra 4. (a) The distributive law # ( + ) = ( # ) + ( # ) can be shown to hold from the operator tables b forming a truth table of all possible values of,, and. For each combination, we derive # ( + ) and show that the value is the same as the value of ( # ) + ( # ): # ( ) # # ( # ) ( # ) (b) The distributive law of + over # can be shown to hold b means of a truth table 5 Complement of similar to the one in part (a). 5. From the + complement = table, it is + easil = shown + that =, + = + = (a) + = =, since + = + = = and =, + = + =. (b) # =, since # = # = and # = # =. 6 Two-valued Boolean algebra has two elements, and with Thus, postulate is verified. Two-valued Boolean algebra 6. Postulate 6 is satisfied because the two valued Boolean algebra has two elements, Two and elements, with. and 2 We Two have binar just established operators: a two valued equivalent Boolean to algebra AND, having + equivalent a set of two to elements, OR and and, two abinar complement operators operator with rules equivalent to tothe NOT AND and OR operations, and a complement operator equivalent to the NOT operator. Thus, Boolean algebra has been defined in a formal mathematical manner and has been shown to be equivalent to the binar logic presented heuristicall in Section.9. The heuristic presentation is helpful in understanding the application of Boolean algebra to gate tpe circuits. The formal Prof. Wangrok Oh(CNU) Aiomatic Definition of Boolean Algebra 6 / 5

7 the identit elements are interchanged. This important propert of Boolean algebra is called the dualit principle and states that ever algebraic epression deducible from the postulates of Boolean algebra remains valid if the operators and identit elements are interchanged. In a two valued Boolean algebra, the identit elements and the elements of the set B are the same: and. The dualit principle has man applications. If the dual of an algebraic epression is desired, we simpl interchange OR and AND operators and replace s b s and s b s. Dualit Basic If Theorems the dual of an algebraic epression is desired, we simpl interchange Table 2. lists OR si theorems and AND of Boolean and replace algebra s and b four s of its and postulates. s b The s notation is simplified b omitting the binar operator + = whenever = doing so does not lead to confusion. The theorems and postulates listed are the most = basic relationships in Boolean Basic Theorems and Properties of Boolean Algebra Table Basic2. Theorems Postulates and Theorems of Boolean Algebra Postulate 2 (a) + = (b) # = Postulate 5 (a) + = (b) # = Theorem (a) + = (b) # = Theorem 2 (a) + = (b) # = Theorem 3, involution ( ) = Postulate 3, commutative (a) + = + (b) = Theorem 4, associative (a) + ( + ) = ( + ) + (b) () = () Postulate 4, distributive (a) ( + ) = + (b) + = ( + )( + ) Theorem 5, DeMorgan (a) ( + ) = (b) ( ) = + Theorem 6, absorption (a) + = (b) ( + ) = Prof. Wangrok Oh(CNU) Basic Theorems and Properties of Boolean Algebra 7 / 5

8 Basic Theorems and Properties of Boolean Algebra Theorem ((a): + = ) + = ( + ) = ( + ) ( + ) = + = + = Theorem ((b): = ) = + = + = ( + ) = = Prof. Wangrok Oh(CNU) Basic Theorems and Properties of Boolean Algebra 8 / 5

9 Basic Theorems and Properties of Boolean Algebra Theorem (2(a): + =, 2(b): = ) + = ( + ) = ( + ) ( + ) = + = + = Theorem 2(b) can be proved b dualit Theorem (3: ( ) = ) From postulate 5, we have + = and = The complement of is and is also ( ) Prof. Wangrok Oh(CNU) Basic Theorems and Properties of Boolean Algebra 9 / 5

10 Basic Theorems and Properties of Boolean Algebra Theorem (6(a): + =, 6(b): ( + ) = ) + = + = ( + ) = ( + ) = = Theorem 6(b) can be proved b dualit The theorems can be proved b means of truth tables + The first DeMorgan s theorem ( + ) = Prof. Wangrok Oh(CNU) Basic Theorems and Properties of Boolean Algebra / 5

11 Basic Theorems and Properties of Boolean Algebra + ( + ) The operator precedence for evaluating Boolean epressions Parentheses 2 NOT 3 AND 4 OR Prof. Wangrok Oh(CNU) Basic Theorems and Properties of Boolean Algebra / 5

12 tionship between binar variables and is evaluated b determining the binar value of the epression for all possible values of the variables. A Boolean function can be represented in a truth table. The number of rows in the truth table is 2 n, where n is the number of variables in the function. The binar combinations for the truth table are obtained from the binar numbers b counting from through 2 n -. Table 2.2 shows the truth table for the function F. There are eight possible binar combinations for assigning bits to the three variables,, and. The column labeled F contains either or for each of these combinations. The table shows that the function is equal to when = or when = and is equal to otherwise. A Boolean function can be transformed from an algebraic epression into a circuit diagram composed of logic gates connected in a particular structure. The logic circuit diagram (also called a schematic) for F is shown in Fig. 2.. There is an inverter for input to generate its complement. There is an AND gate for the term and an OR gate Boolean Functions A Boolean function described b an algebraic epression consists of binar variables and the logic operation smbols For a given value of the binar variables, the function can be equal to either or F = + Boolean function with n variables can be represented in a truth table Number of rows in the Table truth 2.2 table: 2 n Truth Tables for F and F 2 F F 2 Prof. Wangrok Oh(CNU) Boolean Functions 2 / 5

13 Boolean Functions Boolean function can be transformed from an algebraic epression into a circuit diagram composed of logic gates connected in a particular structure Logic circuit diagram (also called a Section schematic) 2.5 for Boolean F = Functions + 47 F FIGURE 2. There is onl one wa that a Boolean function can be represented in Gate implementation of F a truth table When the function is in algebraic form, it can be epressed in a that combines variet of with was. In logic circuit diagrams, the variables of the function are taken as the inputs of the circuit and the binar variable F is taken as the output of the circuit. The schematic epresses the relationship between the output of the circuit and its inputs. Rather than listing each combination of inputs and outputs, it indicates how to compute the logic value of each output from the logic values of the inputs. Prof. Wangrok Oh(CNU) Boolean Functions 3 / 5

14 Boolean Functions B manipulating a Boolean epression according to the rules of Boolean algebra, it is sometimes possible to obtain a simpler epression and thus reduce the number of gates and the number of inputs to the gate F 2 = Chapter 2 Boolean Algebra and Logic Gates F 2 (a) F 2 Prof. Wangrok Oh(CNU) Boolean Functions 4 / 5

15 Boolean Functions F 2 = + + = ( + ) + = + (a) F 2 F 2 F 2 (b) F 2 In general, FIGURE 2.2 there are man equivalent representations of a logic function Implementation of Boolean function F 2 with gates Finding the most economic representation of the logic is an important design task produce the same truth table, the are equivalent. Therefore, the two circuits have the same outputs for all possible binar combinations of inputs of the three variables. Each circuit implements the same identical function, but the one with fewer gates and fewer inputs to gates is preferable because it requires fewer wires and components. In general, there are man equivalent representations of a logic function. Finding the most economic representation of the logic is an important design task. Prof. Wangrok Oh(CNU) Boolean Functions 5 / 5

16 Boolean Functions Algebraic Manipulation When a Boolean epression is implemented with logic gates, each term requires a gate and each variable within the term designates an input to the gate literal: a single variable within a term in complemented or uncomplemented form F 2 has 3 terms and 8 literals F 2 = + + F 2 = + Simplified F 2 has 2 terms and 4 literals B reducing the number of terms, the number of literals or both, it is often possible to obtain a simpler circuit The manipulation of Boolean algebra consists mostl of reducing an epression for the purpose of obtaining a simpler circuit Functions of up to five variables can be simplified b the map method described in the net chapter: Karnaugh Map Prof. Wangrok Oh(CNU) Boolean Functions 6 / 5

17 Boolean Functions Eample (Simplif the Boolean functions) ( + ) = + = + = 2 + = ( + )( + ) = ( + ) = + 3 ( + )( + ) = = ( + + ) = = + + ( + ) = = ( + ) + ( + ) = + 5 ( + )( + )( + ) = ( + )( + ) b dualit of (4) () and (2) are the dual of each other (4) illustrates the fact that an increase in the number of literals sometimes leads to a simpler final epression (5) is not minimied directl, but can be derived from the dual of the steps used to derive (4) (4) and (5) are together known as the consensus theorem Prof. Wangrok Oh(CNU) Boolean Functions 7 / 5

18 Boolean Functions Complement of a Function The complement of a function F is F and is obtained from an interchange of s for s and s for s in the value of F The complement of a function ma be derived algebraicall through DeMorgan s theorems DeMorgan s Theorem (A + B + C) = (A + ) Let B + C = = A B Theorem 5(a) (DeMorgan) = A (B + C) = A (B C ) = A B C DeMorgans theorems for an number of variables resemble the two variable case (A + B + C + + F ) = A B C F (ABC F ) = A + B + C + + F The complement of a function is obtained b interchanging AND and OR operators and complementing each literal Prof. Wangrok Oh(CNU) Boolean Functions 8 / 5

19 Boolean Functions Eample (Find the complement of the functions) Let F = + and F 2 = ( + ) F = ( + ) = ( ) ( ) = ( + + )( + + ) F 2 = [ ( + ) ] = + ( + ) = + ( ) () = + ( + )( + ) = + + A simpler procedure for deriving the complement of a function is to take the dual of the function and complement each literal This method follows from the generalied forms of DeMorgans theorems Remember that the dual of a function is obtained from the interchange of AND and OR operators and s and s Prof. Wangrok Oh(CNU) Boolean Functions 9 / 5

20 Boolean Functions Eample (Find the complement b taking their duals) F = + The dual of F is ( + + )( + + ) Complement each literal: ( + + )( + + ) = F 2 F 2 = ( + ) The dual of F 2 is + ( + )( + ) Complement each literal: + ( + )( + ) = F 2 Prof. Wangrok Oh(CNU) Boolean Functions 2 / 5

21 In a similar fashion, n variables forming an OR term, with each variable being primed or unprimed, provide 2 n possible combinations, called materms, or standard sums. The eight materms for three variables, together with their smbolic designations, are listed in Table 2.3. An 2 n materms for n variables ma be determined similarl. It is important to note that () each materm is obtained from an OR term of the n variables, with each variable being unprimed if the corresponding bit is a and primed if a, and (2) Canonical and Standard Forms Minterms and Materms each materm is the complement of its corresponding minterm and vice versa. Consider two binar variables and combined with an AND operation Four possible combinations:,,, Each of these four AND terms is called a minterm or a standard respectivel. Since each one of these minterms results in f product =, we have n variables can be f = combined + to form + 2= n mminterms + m 4 + m 7 n variables forming an OR term provide 2 n possible combinations Table 2.3 called materms or standard sums A Boolean function can be epressed algebraicall from a given truth table b forming a minterm for each combination of the variables that produces a in the function and then taking the OR of all those terms. For eample, the function f in Table 2.4 is determined b epressing the combinations,, and as,, and, Minterms and Materms for Three Binar Variables Minterms Materms Term Designation Term Designation m + + M m + + M m M 2 m M 3 m M 4 m M 5 m M 6 m M 7 Prof. Wangrok Oh(CNU) Canonical and Standard Forms 2 / 5

22 Canonical and Standard Forms Each materm is the complement of its corresponding midterm and vice versa 52 Chapter A Boolean 2 Boolean function Algebra canand belogic epressed Gatesb forming a minterm for each combination of the variables that produces a in the function and then taking Table the2.4 OR of all those terms Functions of Three Variables Function f Function f 2 Similarl, it ma be easil verified that f = f 2 = = m= + m 3 m+ 4 m+ 5 m+ 7 m 6 + m 7 These eamples f 2 = demonstrate + an important + + propert = of m 3 Boolean + m 5 + algebra: m 6 + An m 7 Boolean function can be epressed as a sum of minterms (with sum meaning the ORing of terms). Now consider the complement of a Boolean function. It ma be read from the truth Prof. Wangrok Oh(CNU) Canonical and Standard Forms 22 / 5

23 Canonical and Standard Forms An Boolean function can be epressed as a sum of minterms Now consider the complement of a Boolean function Forming a minterm for each combination that produces a 2 Summing the terms f = We can obtain the function f b taking the complement of f f = ( + + )( + + )( + + )( + + )( + + ) = M M 2 M 3 M 5 M 6 An Boolean function can be epressed as a product of materms The procedure for obtaining the product of materms directl from the truth table is as follows: Form a materm for each combination of the variables that produces a in the function 2 Form the AND of all those materms Boolean functions epressed as a sum of minterms or product of materms are said to be in canonical form Prof. Wangrok Oh(CNU) Canonical and Standard Forms 23 / 5

24 Canonical and Standard Forms Sum of Minterms For n binar variables, one can obtain 2 n distinct minterms An Boolean function can be epressed as a sum of minterms The minterms whose sum defines the Boolean function are those which give the s of the function in a truth table # of functions formed b n variables: 2 2n It is sometimes convenient to epress a Boolean function in its sum-of-minterms form If the function is not in the sum-of-minterms form, it can be made so: Epanding the epression into a sum of AND terms 2 Inspecting each term to see if it contains all the variables 3 If it misses one or more variables, ANDing with an epression ( + ) where is one of the missing variables Prof. Wangrok Oh(CNU) Canonical and Standard Forms 24 / 5

25 Canonical and Standard Forms Eample (Epress F = A + B C as a SUM of Minterms) The first term A is missing two variables, B and C A = A(B + B ) = AB + AB = AB(C + C ) + AB (C + C ) = ABC + ABC + AB C + AB C 2 The second term B C is missing one variable A 3 Combining all terms F = A + B C B C = B C(A + A ) = AB C + A B C = ABC + ABC + AB C + AB C + AB C + A B C 4 The term AB C appears twice Since ( + ) =, we can remove one of those occurrences F = A B C + AB C + AB C + ABC + ABC = m + m 4 + m 5 + m 6 + m 7 Prof. Wangrok Oh(CNU) Canonical and Standard Forms 25 / 5

26 Canonical and Standard Forms When a Boolean function is in its sum-of-minterms form, it is sometimes convenient to epress the function in the following brief notation: F (A, B, C) = (, 4, 5, 6, 7) Alternative procedure: Obtaining the truth table of the function directl from the algebraic epression Truth table for F = A + B C: A B C F F = m + m 4 + m 5 + m 6 + m 7 Prof. Wangrok Oh(CNU) Canonical and Standard Forms 26 / 5

27 Canonical and Standard Forms Product of Materms Each functions can be also epressed as a product of materms Epress each term with an OR form Using the distributive law 2 An missing variable in each OR term is ORed with Eample (Epress F = + as a Product of Materms) Convert the function into OR terms b using the distributive law F = + = ( + )( + ) = ( + )( + )( + )( + ) = ( + )( + )( + ) 2 Each OR term is missing one variable + = + + = ( + + )( + + ) + = + + = ( + + )( + + ) + = + + = ( + + )( + + ) 3 Combining all terms and removing terms appear more than once F = ( + + )( + + )( + + )( + + ) = M M 2 M 4 M 5 Prof. Wangrok Oh(CNU) Canonical and Standard Forms 27 / 5

28 Canonical and Standard Forms A convenient wa to epress product of materms F (,, ) = (, 2, 4, 5) The product smbol denotes the ANDing of materms The numbers are the indices of the materms of the function Conversion between Canonical Forms The complement of a function epressed as the sum of minterms equals the sum of minterms missing from the original function Original function is epressed b those minterms which make the function equal to Complement is a for those minterms for which the function is a F (A, B, C) = (, 4, 5, 6, 7) F (A, B, C) = (, 2, 3) = m + m 2 + m 3 Prof. Wangrok Oh(CNU) Canonical and Standard Forms 28 / 5

29 Canonical and Standard Forms If we take the complement of F b Demorgan s theorem, we obtain F in a different form F = (m + m 2 + m 3) = m m 2 m 3 = M M 2M 3 = (, 2, 3) Materm with subscript j is a complement of the minterm with the same subscript j and vice versa m j = M j To convert from one canonical form to another: Interchange the smbols and 2 List those numbers missing from the original form 3 Total number of minterms or materms is 2 n Prof. Wangrok Oh(CNU) Canonical and Standard Forms 29 / 5

30 Canonical and Standard Forms 56 Chapter 2 Boolean Algebra and Logic Gates Boolean epression Table 2.6 F = + Truth Table for F F Minterms Materms F (,, ) = (, 3, 6, 7) Since there is a total of eight minterms or materms in a function of three variables, we determine the missing terms to F be (,,, 2, ) 4, and = 5. (, The 2, function 4, 5) epressed as a product of materms is F(,, ) = (, 2, 4, 5) the same answer as obtained in Eample 2.5. Prof. Wangrok Oh(CNU) Canonical and Standard Forms 3 / 5

31 Canonical and Standard Forms Standard Forms Canonical forms of Boolean algebra: Sum of minterms/product of materms Each minterm or materm must contain all the variables Another wa to epress Boolean functions is standard form In standard form, the terms ma contain an number of literals There are two tpes of standard forms Sum of products 2 Products of sums Sum of products: F = + + The epression has three product terms with one, two, and three literals Section 2.6 Canonical an Their sum is an OR operation (a) Sum of Products (b) P This circuit configuration is referred to as a two-level implementation FIGURE 2.3 Prof. Wangrok Oh(CNU) Two level Canonical andimplementation Standard Forms 3 / 5 F

32 Canonical and Standard Forms Product of Sums A product of sums is a Boolean epression containing OR terms (sum terms) Each term ma have an number of literals The product denotes the ANDing of these terms F 2 = ( + )( + + ) This epression has three sum terms, with one, two, and three literals Section 2.6 Canonical and Standard Forms 57 The product is an AND operation (a) Sum of Products.3 l implementation F F 2 (b) Product of Sums This standard tpe of epression results in a two level structure of gates A B Prof. Wangrok Oh(CNU) Canonical and Standard Forms 32 / 5

33 F Canonical and Standard Forms A Boolean function ma be epressed in a nonstandard form (a) Sum of Products FIGURE 2.3 Two level implementation F 3 = AB + C(D + E) This function is neither in sum-of-product nor in product-of-sum form (b) Product of Sums F 2 A B C D E (a) AB C(D E) F 3 (b) AB CD CE FIGURE 2.4 Three Implementation and two level implementation requires two AND gates and two OR gates There are three levels of gating in this circuit It can be changed to a standard form b using the distributive law A product of sums is a Boolean epression containing OR terms, called sum terms. Each term ma have an number of literals. The product denotes the ANDing of these terms. An F 3 eample = AB of + a C(D function + epressed E) = AB as a + product CD + of CE sums is Two-level implementation is preferred F 2 = ( + because )( + it+ produces ) the least amount This of epression dela has three sum terms, with one, two, and three literals. The product is an AND operation. The use of the words product and sum stems from the similarit of the However, the number of inputs to a given gate might not be practical AND operation to the arithmetic product (multiplication) and the similarit of the OR operation to the arithmetic sum (addition). The gate structure of the product of sums Prof. Wangrok Oh(CNU) Canonical and Standard Forms 33 / 5 A B C D C E F 3

34 Although each function can be epressed in terms of the Boolean operators AND, OR, and NOT, there is no reason one cannot assign special operator smbols for epressing the other functions. Such operator smbols are listed in the second column of Ta b l e H o w e v e r, o f a l l t h e n e w s m b o l s s h o w n, o n l t h e e c l u s i v e OR smbol,, is in common use b digital designers. Each of the functions in Table 2.8 is listed with an accompaning name and a comment that eplains the function in some wa. The 6 functions listed can be subdivided into three categories: Other Logic Operations. Two functions that produce a constant or. 2. Four functions with unar operations: complement and transfer. 3. Ten functions with binar operators that define eight different operations: AND, OR, NAND, NOR, eclusive OR, equivalence, inhibition, and implication. There are 2 2n functions for n binar variables For n = 2, the number of possible Boolean functions is 6 Therefore, AND and OR are onl 2 of a total of 6 possible functions What is the other 4 functions? Table 2.7 Truth Tables for the 6 Functions of Two Binar Variables F F F 2 F 3 F 4 F 5 F 6 F 7 F 8 F 9 F F F 2 F 3 F 4 F 5 The smbol ˆ is also used to indicate the eclusive or operator, e.g., ˆ. The smbol for the AND function is sometimes omitted from the product of two variables, e.g.,. Prof. Wangrok Oh(CNU) Other Logic Operations 34 / 5

35 Other Logic Operations Table 2.8 Boolean Epressions for the 6 Functions of Two Variables Boolean Functions Section 2.7 Other Logic Operations 59 Operator Smbol Name Comments F = Null Binar constant F = # AND and F 2 = / Inhibition, but not F 3 = Transfer F 4 = / Inhibition, but not F 5 = Transfer F 6 = + Eclusive OR or, but not both F 7 = + + OR or F 8 = ( + ) T NOR Not OR F 9 = + ( ) Equivalence equals F = Complement Not F = + Implication If, then F 2 = Complement Not F 3 = + Implication If, then F 4 = () c NAND Not AND F 5 = Identit Binar constant Constants for binar functions can be equal to onl or. The complement function Prof. Wangrok Oh(CNU) Other Logic Operations 35 / 5

36 Other Logic Operations The 6 functions listed can be subdivided into three categories 2 functions that produce a constant or 2 4 functions with unar operations: complement and transfer 3 functions with binar operators: AND, OR, NAND, NOR, eclusive-or, equivalence, inhibition and implication A function that is equal to an input variable has been given the name transfer Inhibition and implication are used b logicians, but are seldom used in computer logic NOR is the complement of the OR (Not-OR) NAND is the complement of AND (Not-AND) Eclusive-OR (XOR) is similar to OR but ecludes = and = It holds onl when and differ in value It is sometimes referred to as the binar difference operator Equivalence is a function that is when the two binar variables are equal Eclusive-OR and equivalence functions are the complements of each other Equivalence function is called eclusive-nor (XNOR) Prof. Wangrok Oh(CNU) Other Logic Operations 36 / 5

37 Digital Logic Gates Section 2.8 Digital Logic Gates 6 Name Graphic smbol Algebraic function Truth table F AND F F OR Inverter Buffer NAND F F F F F F F F () F F F F Prof. Wangrok Oh(CNU) Digital Logic Gates 37 / 5

38 Digital Logic Buffer Gates F F F F NAND F F () F NOR F F ( ) F Eclusive-OR (XOR) F F F Eclusive-NOR or equivalence F F ( ) FIGURE 2.5 Digital logic gates Prof. Wangrok Oh(CNU) Digital Logic Gates 38 / 5

39 Digital Logic Gates Etension to Multiple Inputs The gates ecept for the inverter and buffer can be etended to have more than two inputs A gate can be etended to have multiple inputs if the binar operation it represents is commutative and associative The AND and OR operations possess these two properties + = + Commutative ( + ) + = + ( + ) = + + Associative inputs can be interchanged and that the OR function can be etended to three or more variables NAND and NOR functions are commutative and their gates can be etended to have more than two inputs We have to modif the definition of the operation slightl NAND and NOR operators are not associative ( ) = [ ( + ) + ] = ( + ) = + ( ) = [ + ( + ) ] = ( + ) = + Prof. Wangrok Oh(CNU) Digital Logic Gates 39 / 5

40 Digital Logic Gates Section 2.8 Digital Logic Gates 63 Section 2.8 Digital Logic Gates 63 ( ) ( ) ( ) ( ) ( ) ( ) FIGURE 2.6 To overcome this difficult, we define the multiple NOR (or NAND) Demonstrating the nonassociativit of the NOR operator: ( T ) T T ( T ) gate as a complemented OR (or AND) gate = ( + + ) FIGURE 2.6 ( ) () Demonstrating the nonassociativit = of the () NOR operator: ( T ) T T ( T ) (a) 3-input NOR gate ( ) ( ) ( ) (b) 3-input NAND gate A B (a) 3-input NOR gate (b) 3-input NAND gate C Prof. Wangrok Oh(CNU) Digital Logic Gates 4 / 5 ()

41 Digital Logic Gates ( ) ( ) FIGURE 2.6 Demonstrating the nonassociativit of the NOR operator: ( T ) T T ( T ) In writing cascaded NOR and NAND operations, one must use the correct parentheses to signif the proper sequence of the gates ( ) [ F = (ABC) (DE) ] = ABC + DE (a) 3-input NOR gate () (b) 3-input NAND gate A B C D E (c) Cascaded NAND gates F [(ABC) (DE) ] ABC DE FIGURE The 2.7second epression is obtained from one of DeMorgan s theorems Multiple input An epression and cascaded in sum-of-products NOR and NAND form gates can be implemented with NAND gates of a three input eclusive OR function is shown in Fig This function is normall implemented b cascading two input gates, as shown in (a). Graphicall, it can be represented with a single three input gate, as shown in (b). The truth table in (c) clearl indicates that the output F is equal to if onl one input is equal to or if all three inputs are equal to (i.e., when the total number of s in the input variables is odd). (Eclusive OR gates are discussed further in Section 3.9.) Prof. Wangrok Oh(CNU) Digital Logic Gates 4 / 5

42 Digital Logic Gates The eclusive-or and equivalence gates are both commutative and associative and can be etended to more than two inputs However, multiple-input eclusive-or gates are uncommon from the hardware standpoint In fact, even a two-input function is usuall constructed with other tpes of gates The definition of the function must be modified when etended to more than two variables 64 Chapter 2 Boolean Eclusive-OR Algebra is an and odd Logic function: Gates It is equal to if the input variables have an odd number of s (a) Using 2-input gates (b) 3-input gate F F F (c) Truth table FIGURE 2.8 Three input eclusive OR gate Prof. Wangrok Oh(CNU) Digital Logic Gates 42 / 5

43 Digital Logic Gates (a) Using 2-input gates Positive and Negative Logic The binarsignal at the inputs and outputs of an gate has one of (c) Truth table two values ecept during transition FIGURE One signal 2.8 value represents logic and the other logic Three input Since twoeclusive OR signal values gate are assigned to two logic values, there eist two different assignments of signal level to logic value (b) 3-input gate F F Logic value Signal value H Logic value Signal value H (a) Positive logic L L (b) Negative logic FIGURE 2.9 The higher signal level is designated b H and the lower signal level Signal assignment and logic polarit b L Positive logic: Choosing H to represent logic Negative logic: Choosing L to represent logic signal level to logic value, as shown in Fig The higher signal level is designated b H and the lower signal level b L. Choosing the high level H to represent logic defines a positive logic sstem. Choosing the low level L to represent logic defines a negative logic sstem. The terms positive and negative are somewhat misleading, since both sig- Prof. Wangrok Oh(CNU) Digital Logic Gates 43 / 5

44 Digital Logic Gates H L L H H H (a) L Truth L table L Lwith HH and LL H L L H H H (a) LTruth L tablel Lwith HH and LL H L L H H H (a) Truth table with H and L (c) Truth table for positive logic (c) Truth table for positive logic (c) Truth table for positive logic (b) Gate block diagram Section 2.8 Digital Digital Logic Gates 65 gate (b) Gate block diagram Digital gate (b) Gate block diagram (d) Positive logic AND gate (d) Positive logic AND gate (e) Truth table for (f) Negative logic OR gate negative logic FIGURE 2. The small triangles in the inputs and output: Polarit indicator Demonstration of positive and negative logic Positive-logic (e) Truth AND table gate for = Negative-logic (f) Negative OR gate logic OR gate negative logic d e sfigure i g n a t e a 2. polarit indicator, the presence of which along a terminal signifies that Prof. Wangrok Oh(CNU) Digital Logic Gates 44 / 5 gate (d) Positive logic AND gate

45 Digital Logic Gates The conversion from positive logic to negative logic and vice versa is essentiall an operation that changes s to s and s to s in both inputs and output This operation produces the dual of a function Prof. Wangrok Oh(CNU) Digital Logic Gates 45 / 5

46 Integrated Circuits An integrated circuit (IC) is fabricated on a die of a silicon semiconductor crstal called a chip containing the electronic components for constructing digital gates The various gates are interconnected inside the chip to form the required circuit The chip is mounted in a ceramic or plastic container and connections are welded to eternal pins to form the integrated circuit Each IC has a numeric designation printed on the surface of the package for identification Vendors provide data books, catalogs, and Internet websites that contain descriptions and information about the ICs that the manufacture Prof. Wangrok Oh(CNU) Integrated Circuits 46 / 5

47 Integrated Circuits Levels of Integration Small-scale integration (SSI) devices Contain several independent gates in a single package The number of gates is usuall fewer than Medium-scale integration (MSI) devices Have a compleit of approimatel to, gates The usuall perform specific elementar digital operations Eamples: Decoders, adders, and multipleers, registers and counters Large-scale integration (LSI) devices Contain thousands of gates in a single package The include digital sstems such as processors, memor chips, and programmable logic devices Ver large-scale integration (VLSI) devices Contain millions of gates within a single package Eamples are large memor arras and comple microcomputer chips Because of their small sie and low cost, VLSI devices have revolutionied the computer sstem design technolog Prof. Wangrok Oh(CNU) Integrated Circuits 47 / 5

48 Integrated Circuits Digital Logic Families Integrated circuits are classified b the specific circuit technolog The circuit technolog is referred to as a digital logic famil Basic circuit in each technolog is a NAND, NOR or inverter gate The most popular logic families TTL: Transistor-transistor logic 2 ECL: Emitter-coupled logic 3 MOS: Metal-oide semiconductor 4 CMOS: Complementar metal-oide semiconductor TTL is a logic famil that has been in use for 5 ears and is considered to be standard ECL has an advantage in sstems requiring high speed operation MOS is suitable for circuits that need high component densit CMOS is preferable in sstems requiring low power consumption Prof. Wangrok Oh(CNU) Integrated Circuits 48 / 5

49 Integrated Circuits The most important parameters distinguishing logic families Fan-out: Number of standard loads that the output of a tpical gate can drive without impairing its normal operation Fan-in: number of inputs available in a gate Power dissipation: power consumed b the gate that must be available from the power suppl Propagation dela: average transition dela time for a signal to propagate from input to output Noise margin: maimum eternal noise voltage added to an input signal that does not cause an undesirable change in the circuit output Prof. Wangrok Oh(CNU) Integrated Circuits 49 / 5

50 Integrated Circuits Computer Aided Design of VLSI Circuits The design of digital sstems with VLSI circuits containing millions of transistors and gates is an enormous and formidable task Sstems of this compleit are usuall impossible to develop and verif without the assistance of computeraided design (CAD) tools Electronic design automation (EDA) covers all phases of the design of integrated circuits Phsical realiation of a digital circuits Application-specific integrated circuit (ASIC) 2 Field-programmable gate arra (FPGA) 3 Programmable logic device (PLD) 4 Full-custom IC An important development in the design of digital sstems is the use of a hardware description language (HDL) Computer programming language specificall oriented to describing digital hardware Verilog and VHDL Prof. Wangrok Oh(CNU) Integrated Circuits 5 / 5