Combinatorial Logic Design Principles

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1 Combinatorial Logic Design Principles ECGR2181 Chapter 4 Notes Logic System Design I 4-1

2 Boolean algebra a.k.a. switching algebra deals with boolean values -- 0, 1 Positive-logic convention analog voltages LOW, HIGH --> 0, 1 Negative logic -- seldom used Signal values denoted by variables (X, Y, FRED, etc.) Logic System Design I 4-2

3 Boolean operators Complement:X (opposite of X) AND: X Y OR: X + Y binary operators, described functionally by truth table. Axiomatic definition: A1-A5, A1 -A5 Logic System Design I 4-3

4 More definitions Literal: a variable or its complement X, X, FRED, CS_L Expression: literals combined by AND, OR, parentheses, complementation X+Y P Q R A + B C ((FRED Z ) + CS_L A B C + Q5) RESET Equation: Variable = expression P = ((FRED Z ) + CS_L A B C + Q5) RESET Logic System Design I 4-4

5 Logic symbols Logic System Design I 4-5

6 Theorems Proofs by perfect induction Logic System Design I 4-6

7 More Theorems Logic System Design I 4-7

8 N-variable Theorems Prove using finite induction Logic System Design I 4-8

9 DeMorgan Symbol Equivalence Logic System Design I 4-9

10 Likewise for OR Logic System Design I 4-10

11 DeMorgan Symbols Logic System Design I 4-11

12 Even more definitions (Sec ) Product term Sum-of-products expression Sum term Product-of-sums expression Normal term Minterm (n variables) Maxterm (n variables) Logic System Design I 4-12

13 Truth table vs. minterms & maxterms Logic System Design I 4-13

14 Combinational analysis Logic System Design I 4-14

15 Signal expressions Multiply out: F = ((X + Y ) Z) + (X Y Z ) = (X Z) + (Y Z) + (X Y Z ) Logic System Design I 4-15

16 New circuit, same function Logic System Design I 4-16

17 Add out logic function Circuit: Logic System Design I 4-17

18 Shortcut: Symbol substitution Logic System Design I 4-18

19 Different circuit, same function Logic System Design I 4-19

20 Another example Logic System Design I 4-20

21 Combinational-Circuit Analysis Combinational circuits -- outputs depend only on current inputs (not on history). Kinds of combinational analysis: exhaustive (truth table) algebraic (expressions) simulation / test bench Write functional description in HDL Define test conditions / test vecors Compare circuit output with functional description (or knowngood realization) Logic System Design I 4-21

22 Combinational-Circuit Design Sometimes you can write an equation or equations directly. Example (alarm circuit): Corresponding circuit: Logic System Design I 4-22

23 Alarm-circuit transformation Sum-of-products form Useful for programmable logic devices Multiply out : Logic System Design I 4-23

24 Sum-of-products form AND-OR NAND-NAND Logic System Design I 4-24

25 Product-of-sums form OR-AND NOR-NOR Logic System Design I 4-25

26 Brute-force design Truth table --> canonical sum (sum of minterms) Example: prime-number detector 4-bit input, N 3 N 2 N 1 N 0 F = Σ Ν3Ν2Ν1Ν0 (1,2,3,5,7,11,13) row N 3 N 2 N 1 N 0 F Logic System Design I 4-26

27 Minterm list --> canonical sum Logic System Design I 4-27

28 Algebraic simplification Theorem T8, Reduce number of gates and gate inputs Logic System Design I 4-28

29 Resulting circuit Logic System Design I 4-29

30 3-variable Karnaugh map Logic System Design I 4-30

31 3-variable Karnaugh map X Y Z X YZ XYZ XY Z X Y Z X YZ XYZ XY Z Logic System Design I 4-31

32 Visualizing T10 -- Karnaugh maps Logic System Design I 4-32

33 Visualizing T10 -- Karnaugh maps Logic System Design I 4-33

34 Example: F = Σ(1,2,5,7) Logic System Design I 4-34

35 Karnaugh-map usage Plot 1s corresponding to minterms of function. Circle largest possible rectangular sets of 1s. # of 1s in set must be power of 2 OK to cross edges Read off product terms, one per circled set. Variable is 1 ==> include variable Variable is 0 ==> include complement of variable Variable is both 0 and 1 ==> variable not included Circled sets and corresponding product terms are called prime implicants Minimum number of gates and gate inputs Logic System Design I 4-35

36 Prime-number detector Logic System Design I 4-36

37 Resulting Circuit. Logic System Design I 4-37

38 Another example Logic System Design I 4-38

39 Yet another example Distinguished 1 cells Essential prime implicants Logic System Design I 4-39

40 Another Example F(W,X,Y,Z) = Σm(0,1,2,4,5,6,8,9,12,13,14) Logic System Design I 4-40

41 Another Example F(W,X,Y,Z) = Σm(0,1,2,3,6,8,9,10,11,14) Logic System Design I 4-41

42 Another Example Logic System Design I 4-42

43 Don t Cares Copyright 2000 by Prentice Hall, Inc. Digital Design Principles and Practices, 3/e (a) N 3 N 2 N N d N d d 14 d N d d N 0 (b) N 3 N 3 N 2 N 1 N N 00 d 3 N d N d d 10 1 d d N 0 N 2 N 0 N 2 F = Σ N3,N2,N1,N0 (1,2,3,5,7) + d(10,11,12,13,14,15) N 2 N 1 N 2 F = N 3 N 0 + N 2 N 1 Logic System Design I 4-43

44 Another Example F(W,X,Y,Z) = Σm(0,1,2,3,6,8,9,10,11,14) + d(7,15) Logic System Design I 4-44

45 Current Logic Design Lots more than 6 inputs -- can t use Karnaugh maps Use software to synthesize logic expressions and minimize logic Hardware Description Languages -- VHDL and Verilog Logic System Design I 4-45

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