# Learning Objectives 10/7/2010. CE 411 Digital System Design. Fundamental of Logic Design. Review the basic concepts of logic circuits. Dr.

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1 /7/ CE 4 Digital ystem Design Dr. Arshad Aziz Fundamental of ogic Design earning Objectives Review the basic concepts of logic circuits Variables and functions Boolean algebra Minterms and materms ogic gates ynthesis Create CMO logic gates = = Battery ight (a) Two states of a switch (a) imple connection to a battery (b) ymbol for a switch (b) Using a ground connection as the return path Figure.. A binary switch. Figure.. A light controlled by a switch. ight (a) The logical AND function (series connection) ight ight (b) The logical OR function (parallel connection) Figure.. Two basic functions. Figure.4. A series-parallel connection.

2 /7/ R Figure.5. An inverting circuit. Figure.6. A truth table for AND and OR. Basic Gates AND, OR, NOT n n (a) AND gates + n n (b) OR gates Figure.7. Three-input AND and OR. (c) NOT gate Basic Gates NAND, NOR n n (a) NAND gates f = n n (b) NOR gates Figure.9. An OR-AND function.

3 /7/ DeMorgan s Theorem and other symbols for NAND, NOR A B f Time (a) = + (c) Timing diagram g (d) Network that implements g = + (b) + = Figure.b. ogic network. Basic Gates XOR f = f = (a) Truth table (b) Graphical symbol f = Figure.. Proof of DeMorgan s theorem. (c) um-of-products implementation Basic Gates XNOR f = f = =. Variables and Functions n Function y=f(,...n) y (a) Truth table (b) Graphical symbol f = A function is defined as the dependency of output y on the n inputs (,, n) The n inputs (,, n) are variables The function of a combinational logic circuit can be epressed by a Boolean logic function For a Boolean logic function, output and inputs are binary, and the basic operators include AND, OR, NOT. (c) um-of-products implementation Eample f (,, )

4 /7/ Basic functions ummary of basic logic functions Inversion, AND, OR Can be used to implement logic function of any compleity ogic gates The basic logic function (operation) can be implemented electronically with transistors, which is called a logic gate A logic gate has one or more inputs and one output schematics + NOT Truth Table Karnaugh Map f (,, ) y Representations of a logic function: -- mathematic Algebra epression -- Truth Table -- Karnaugh map (net page) Observations for an n-variable function: n ) rows in truth table ( ) n ) different n-variable functions totally 4 different -variable functions: f()=, f()=, f()=, f()= 6 different -variable functions 56 different -variable functions m m m m m 4 m 5 m 6 m 7 (a) Truth table m m m m m 6 m 7 (b) Karnaugh map m 4 m 5 f = = 5 = Boolean Algebra Aioms of Boolean Algebra =, =, =, = +=, +=, +=, += If =, then =; if =, then = ingle-variable theorems X =, =, +=, +=, +=, = Multiple-Variable Properties Commutative, associative, distributive, absorption, combining, DeMorgan s theorem f =

5 /7/ Commutative Associative Distributive Absorption Combining Properties y y ( y z) ( y) z DeMorgan s theorem y z y z y y y y y ynthesis using basic logic gates ynthesis: begin with a description of the desired behavior, and then generate a circuit that realizes this behavior. Eample of synthesis, ) f (, ) f ( um-of-products Minterm: any function can be epressed as the sum of some minterms. For a function of n variables, a product term in which each of the n variables appears once Variables either in uncomplemented or complemented form For a given row of a truth table, i of i=, i if i = Materm: any function can be epressed as the product of some materms. For a function of n variables, a sum term in which each of the n variables appears once Variables either in uncomplemented or complemented form For a given row of a truth table, i of =, i i if i = Three-variable minterms and materms um-of-products, Product-of-sums Transistor as a switch Concept of switch ignals are assumed to have only possible values(, and ) The basic element is a switch which has two states The switch state is controlled by an input variable witch is open if =; closed if = OP PO f (,, ) m(,4,5,6 ) f,, ) (,,,7) ( M 5

6 /7/ Implementation of ogic gates () Transistor switches Implementation of ogic gates () CMO logic gates (as networks of transistors) PUN T T T V V T T T T T 4 f T V T 4 PDN on on off off on off off on off on on off off off on on (a) Circuit (b) Truth table and transistor states Implementation of ogic gates () PUN: PMO PDN: NMO Output Vf is selectively connected either to Vdd through PUN or to Gnd through PDN, depending on inputs VDD=5V witch network GND V V n y Pull-up network (PUN) Pull-down network (PDN) Comple CMO logic gate Eample. f f ( ) For f= For f= V V V Procedures for comple logic gates Epress a function so that all variables appear in their complemented form e.g. f (,, ) Derive the PUN based on f (,, ) Products transistors (or branches) in series ums transistors (or branches) in parallel Derive a complemented function so that all variables appear in their uncomplemented form e. g. f (,, ) Derive the PDN based on f (,, ) Products transistors (or branches) in series ums transistors (or branches) in parallel Eercise? Create CMO gate for function f ( ) 4 6

7 /7/ Analysis of comple CMO gate Derive epression from circuit based on PUN Branches in parallel sums Branches in series products All variables in complemented form Derive PDN from PUN, or derive PUN from PDN For branches in parallel in PDN, there are branches in series in PUN; vice versa. For branches in series in PDN, there are branches in parallel in PUN; vice versa. Problem.6 to. Problem.7 to. Homework 7

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