AOD452 N-Channel Enhancement Mode Field Effect Transistor
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- Marilynn Curtis
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1 OD452 N-Channel Enhancement Mode Field Effect Transistor General Description The OD452 uses advanced trench technology and design to provide excellent R DS(ON) with low gate charge. This device is suitable for use in PWM, load switching and general purpose applications. Standard product OD452 is Pb-free (meets ROHS & Sony 9 specifications). OD452L is a Green Product ordering option. OD452 and OD452L are electrically identical. Features V DS (V) =V I D = 55 (VGS = V) R DS(ON) < 8.5 mω (V GS = V) R DS(ON) < 4 mω (V GS = 4.5V) TO-2 D-PK D Top View Drain Connected to Tab G S G D S bsolute Maximum Ratings T = C unless otherwise noted Parameter Drain-Source Voltage Gate-Source Voltage Symbol V DS V GS Maximum ± Continuous Drain T C = C 55 Current G T C = C I D 55 Pulsed Drain Current C valanche Current C I DM I R Repetitive avalanche energy L=.mH C E R 35 T C = C Power Dissipation B T C = C T = C 3 Power Dissipation SM T =7 C 2. Junction and Storage Temperature Range T J, T STG -55 to 75 Units V V mj W W C Thermal Characteristics Parameter Symbol Typ Max Units Maximum Junction-to-mbient t s 4.2 R Maximum Junction-to-mbient θj Steady-State 39 Maximum Junction-to-Case B Steady-State R θjc lpha & Omega Semiconductor, Ltd.
2 OD452, OD452L Electrical Characteristics (T J = C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units STTIC PRMETERS BV DSS Drain-Source Breakdown Voltage I D =u, V GS =V V I DSS Zero Gate Voltage Drain Current V DS =V, V GS =V T J =55 C 5 µ I GSS Gate-Body leakage current V DS =V, V GS =±V n V GS(th) Gate Threshold Voltage V DS =V GS, I D =µ.8 3 V I D(ON) On state drain current V GS =V, V DS =5V V GS =V, I D = R DS(ON) Static Drain-Source On-Resistance T J = C mω V GS =4.5V, I D =.5 4 mω g FS Forward Transconductance V DS =5V, I D = 35 S V SD Diode Forward Voltage I S =, V GS =V.72 V I S Maximum Body-Diode Continuous Current 55 DYNMIC PRMETERS C iss Input Capacitance pf C oss Output Capacitance V GS =V, V DS =2.5V, f=mhz 35 pf C rss Reverse Transfer Capacitance 9 pf R g Gate resistance V GS =V, V DS =V, f=mhz.2 2 Ω SWITCHING PRMETERS Q g (V) Total Gate Charge nc Q g (4.5V) Total Gate Charge 3.5 nc V GS =V, V DS =2.5V, I D = Q gs Gate Source Charge 3.9 nc Q gd Gate Drain Charge 7.75 nc t D(on) Turn-On DelayTime 6.5 ns t r Turn-On Rise Time V GS =V, V DS =2.5V, R L =.6Ω, ns t D(off) Turn-Off DelayTime R GEN =3Ω 22.7 ns t f Turn-Off Fall Time 6.2 ns t rr Body Diode Reverse Recovery Time I F =, di/dt=/µs ns Q rr Body Diode Reverse Recovery Charge I F =, di/dt=/µs 5. nc : The value of R θj is measured with the device mounted on in 2 FR-4 board with 2oz. Copper, in a still air environment with T = C. The Power dissipation SM is based on R θj and the maximum allowed junction temperature of C. The value in any given application depends on the user's specific board design, and the maximum temperature of 75 C may be used if the PCB allows it. B. The power dissipation is based on T J(MX) =75 C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C: Repetitive rating, pulse width limited by junction temperature T J(MX) =75 C. D. The R θj is the sum of the thermal impedence from junction to case R θjc and case to ambient. E. The static characteristics in Figures to 6 are obtained using < µs pulses, duty cycle.5% max. F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of T J(MX) =75 C. G. The maximum current rating is limited by bond-wires. H. These tests are performed with the device mounted on in 2 FR-4 board with 2oz. Copper, in a still air environment with T = C. The SO curve provides a single pulse rating. THIS PRODUCT HS BEEN DESIGNED ND QULIFIED FOR THE CONSUMER MRKET. PPLICTIONS OR USES S CRITICL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS RE NOT UTHORIZED. OS DOES NOT SSUME NY LIBILITY RISING OUT OF SUCH PPLICTIONS OR USES OF ITS PRODUCTS. OS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS ND RELIBILITY WITHOUT NOTICE. Rev3:July 5 lpha & Omega Semiconductor, Ltd.
3 OD452, OD452L TYPICL ELECTRICL ND THERML CHRCTERISTICS I D () 8 V 6V 7V 5V 4.5V V GS =4V 3.5V Fig : On-Region Characteristics 3V I D () V DS =5V C C Figure 2: Transfer Characteristics R DS(ON) (mω) V GS =4.5V V GS =V I D () Figure 3: On-Resistance vs. Drain Current and Gate Voltage Normalized On-Resistance V GS =V, V GS =4.5V, Temperature ( C) Figure 4: On-Resistance vs. Junction Temperature I D =.E+2.E+ R DS(ON) (mω) 5 C I S ().E+.E-.E-2.E-3 C C 5 C.E Figure 5: On-Resistance vs. Gate-Source Voltage.E V SD (Volts) Figure 6: Body-Diode Characteristics lpha & Omega Semiconductor, Ltd.
4 OD452, OD452L TYPICL ELECTRICL ND THERML CHRCTERISTICS 8 V DS =2.5V I D = 8 C iss 6 4 Capacitance (pf) 8 C oss Q g (nc) Figure 7: Gate-Charge Characteristics C rss 5 5 Figure 8: Capacitance Characteristics I D (mps)... R DS(ON) limited T J(Max) =75 C, T = C µs ms µs ms Power (W) 8 T J(Max) =75 C T = C. DC.. Figure 9: Maximum Forward Biased Safe Operating rea (Note F).... Figure : Single Pulse Power Rating Junction-to- Case (Note F) Z θjc Normalized Transient Thermal Resistance. D=T on /T T J,PK =T C +M.Z θjc.r θjc R θjc =3 In descending order D=.5,.3,.,.5,.2,., single pulse T Single Pulse Figure : Normalized Maximum Transient Thermal Impedance (Note F) T on lpha & Omega Semiconductor, Ltd.
5 OD452, OD452L TYPICL ELECTRICL ND THERML CHRCTERISTICS I D (), Peak valanche Current T = C t = L I D BV V DD Power Dissipation (W)... Time in avalanche, t (s) Figure 2: Single Pulse valanche capability T CSE ( C) Figure 3: Power De-rating (Note B) Current rating I D () Power (W) T = C T CSE ( C) Figure 4: Current De-rating (Note B)... Figure 5: Single Pulse Power Rating Junction-to- mbient (Note H) Z θj Normalized Transient Thermal Resistance.. D=T on /T T J,PK =T +M.Z θj.r θj R θj = Single Pulse In descending order D=.5,.3,.,.5,.2,., single pulse T Figure 6: Normalized Maximum Transient Thermal Impedance (Note H) T on lpha & Omega Semiconductor, Ltd.
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OptiMOS 3 Power-Transistor Features N-channel, normal level Excellent gate charge x R DS(on) product (FOM) Product Summary V DS 1 V R DS(on),max 7.2 mω I D 8 A Very low on-resistance R DS(on) 175 C operating
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OptiMOS 3 Power-Transistor Features N-channel, normal level Excellent gate charge x R DS(on) product (FOM) Product Summary V DS 8 V R DS(on),max 2.8 mω I D 1 A Very low on-resistance R DS(on) 175 C operating
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SPB8N6SL-7 OptiMOS =Power-Transistor Features N-Channel Enhancement mode valanche rated Logic Level dv/dt rated =175 C operating temperature Product Summary Drain source voltage V DS 55 V Drain-source
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IPI3N3LA, IPP3N3LA OptiMOS 2 Power-Transistor Features Ideal for high-frequency dc/dc converters Qualified according to JEDEC ) for target applications N-channel - Logic level Product Summary V DS 25 V
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BSO15N3MD G OptiMOS 3 M-Series Power-MOSFET Features Dual N-channel Optimized for 5V driver application (Notebook, VGA, POL) Low FOM SW for High Frequency SMPS 1% Avalanche tested Product Summary V DS
More informationFinal data. Maximum Ratings, at T C = 25 C, unless otherwise specified Parameter Symbol Value Unit Continuous drain current
Cool MOS Power Transistor Feature New revolutionary high voltage technology Worldwide best R DS(on) in TO 47 Ultra low gate charge Periodic avalanche rated Extreme dv/dt rated Ultra low effective capacitances
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IPB12CN1N G OptiMOS 2 Power-Transistor Features N-channel, normal level Excellent gate charge x R DS(on) product (FOM) Very low on-resistance R DS(on) Product Summary V DS 1 V R DS(on),max (TO252) 12.4
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SPNN6C3 Cool MOS Power Transistor V DS @ T jmax 65 V Feature New revolutionary high voltage technology Ultra low gate charge Extreme dv/dt rated Ultra low effective capacitances Improved transconductance
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Type IPD135N3L G OptiMOS 3 Power-Transistor Features Fast switching MOSFET for SMPS Optimized technology for DC/DC converters Qualified according to JEDEC 1) for target applications Product Summary V DS
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OptiMOS 2 Power-Transistor Features Ideal for high-frequency dc/dc converters Qualified according to JEDEC 1) for target application N-channel, logic level Product Summary V DS 25 V R DS(on),max (SMD version)
More informationMaximum Ratings Parameter Symbol Value Unit Continuous drain current T C = 25 C T C = 100 C
SPU7N6S5 SPD7N6S5 Cool MOS Power Transistor V DS 6 V Feature New revolutionary high voltage technology Worldwide best R DS(on) in TO5 and TO5 Ultra low gate charge Periodic avalanche rated Extreme dv/dt
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1 Description These N-Channel enhancement mode power field effect transistors are produced using planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state
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OptiMOS PowerTransistor Feature NChannel Enhancement mode Excellent Gate Charge x R DS(on) product (FOM) Superior thermal resistance 175 C operating temperature valanche rated dv/dt rated Product Summary
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Type BSZ123N8NS3 G OptiMOS (TM) 3 Power-Transistor Package Optimized technology for DC/DC converters Excellent gate charge x R DS(on) product (FOM) Superior thermal resistance Product Summary V DS 8 V
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BSC32N3S G OptiMOS 2 Power-Transistor Features Fast switching MOSFET for SMPS Optimized technology for notebook DC/DC converters Qualified according to JEDEC 1 for target applications Product Summary V
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TSP10N60M / TSF10N60M 600V N-Channel MOSFET General Description This Power MOSFET is produced using Truesemi s advanced planar stripe DMOS technology. This advanced technology has been especially tailored
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BSZ86P3NS3E G OptiMOS TM P3 Power-Transistor Features single P-Channel in S3O8 Qualified according JEDEC ) for target applications 5 C operating temperature V GS =25 V, specially suited for notebook applications
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Main Product Characteristics V DSS @T J max R DS (on) 700V 0.52Ω (typ.) 8.0A TO-220F Schematic Diagram Features and Benefits Low R DS(on) and FOM Extremely low switching loss Excellent stability and uniformity
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