Low-Cost, µp Supervisory Circuits MAX705 MAX708/MAX813L

Transcription

1 9; Rev. ; 9/9 LowCost, µp Supervisory Circuits General Description The MAX0MAX0/MAXL microprocessor (µp) supervisory circuits reduce the complexity and number of components required to monitor powersupply and battery functions in µp systems. These devices significantly improve system reliability and accuracy compared to separate ICs or discrete components. The MAX0/MAX0/MAXL provide four functions: ) A reset output during powerup, powerdown, and brownout conditions. ) An independent watchdog output that goes low if the watchdog input has not been toggled within. seconds. ) A. threshold detector for powerfail warning, lowbattery detection, or for monitoring a power supply other than. ) An activelow manualreset input. The MAX0/MAX0 are the same as the MAX0/ MAX0, except an activehigh reset is substituted for the watchdog timer. The MAXL is the same as the MAX0, except is provided instead of. Two supplyvoltage monitor levels are available: The MAX0/MAX0/MAXL generate a reset pulse when the supply voltage drops below., while the MAX0/MAX0 generate a reset pulse below.. All four parts are available in pin DIP, SO and µmax packages. Applications Computers Controllers Intelligent Instruments Automotive Systems Critical µp Power Monitoring Typical Operating Circuit Features µmax Package: Smallest Pin SO Guaranteed alid at = Precision Supplyoltage Monitor. in MAX0/MAX0/MAXL. in MAX0/MAX0 00ms Reset Pulse Width Debounced TTL/CMOSCompatible ManualReset Input Independent Watchdog Timer.sec Timeout (MAX0/MAX0) ActiveHigh Reset Output (MAX0/MAX0/MAXL) oltage Monitor for PowerFail or LowBattery Warning Ordering Information PART TEMP. RANGE PINPACKAGE MAX0CPA Plastic DIP MAX0CSA SO MAX0CUA µmax MAX0C/D Dice* Ordering Information continued at end of data sheet. * Dice are specified at T A = + C. **Contact factory for availability and processing to MILSTD. Pin Configurations TOP IEW MAX0 MAX0 MAXL WDO () WDI MAX0 MAX0/MAXL UNREGULATED DC PUSHBUTTON SWITCH MAX DC LINEAR REGULATOR MAX0 WDO MAX0 MAXL µp I/O LINE NMI INTERRUPT DIP/SO MAX0 MAX0 DIP/SO ( ) ARE FOR MAXL ONLY. Pin Configurations continued at end of data sheet. N.C. Maxim Integrated Products Call toll free for free samples or literature.

2 LowCost, µp Supervisory Circuits MAX0 MAX0/MAXL ABSOLUTE MAXIMUM RATINGS Terminal oltage (with respect to ) to. All Other Inputs (Note ) to ( + 0.) Input Current... 0mA... 0mA Output Current (all outputs)... 0mA Continuous Power Dissipation Plastic DIP (derate 9.09mW/ C above +0 C)... mw SO (derate.mw/ C above +0 C)... mw µmax (derate.0mw/ C above +0 C)... 0mW CERDIP (derate.00mw/ C above +0 C)... 0mW Operating Temperature Ranges MAX0_C, MAXLC... MAX0_E, MAXLE... 0 C to + C MAX0_MJA... C to + C Storage Temperature Range... C to +0 C Lead Temperature (soldering, 0sec) C Note : The input voltage limits on and can be exceeded if the input current is less than 0mA. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS ( =. to. for MAX0/MAX0/MAXL, =. to. for MAX0/MAX0, T A = T MIN to T MAX, unless otherwise noted.) Operating oltage Range PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS MAXLC.. MAX0_C.0. MAX0_E/M, MAXLE/M.. MAX0C, MAX0C, MAXLC 0 0 Supply Current I SUPPLY MAX0E/M, MAX0E/M, MAXLE/M 0 00 MAX0C, MAX0C 0 0 µa MAX0E/M, MAX0E/M 0 00 MAX0, MAX0, MAXL.0.. Reset Threshold (Note ) RT MAX0, MAX Reset Threshold Hysteresis (Note ) 0 m Reset Pulse Width (Note ) t RS ms I SOURCE = 00µA. Output oltage Output oltage I SINK =.ma 0. MAX0, MAX0, I SOURCE = 00µA MAX0, MAX0, I SINK =.ma 0. MAXL Watchdog Timeout Period t WD MAX0, MAX0, MAXL sec WDI Pulse Width t WP IL = 0., IH = ( ) (0.) 0 ns WDI Input Threshold WDI Input Current WDO Output oltage Low High MAX0_C, =, I SINK = 0µA MAX0_E/M, =., I SINK = 00µA MAXLC, I SOURCE = µa, =. MAXLE/M, I SOURCE = µa, =. I SOURCE = 00µA I SINK =.ma MAX0, MAX0, MAXL, = MAX0, MAX0, MAXL, WDI = 0 0. MAX0, MAX0, MAXL, WDI = 0 0 MAX0, MAX0, MAXL, I SOURCE = 00µA. MAX0, MAX0, MAXL, I SINK =.ma µa

3 LowCost, µp Supervisory Circuits ELECTRICAL CHARACTERISTICS (continued) ( =. to. for MAX0/MAX0/MAXL, =. to. for MAX0/MAX0, T A = T MIN to T MAX, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS PullUp Current = µa Pulse Width t 0 ns Input Threshold Low 0. High.0 to Reset Out Delay (Note ) t MD 0 ns Input Threshold =.0..0 Input Current na Output oltage I SOURCE = 00µA. I SINK =.ma 0. Note : Applies to both in the MAX0MAX0 and in the MAX0/MAX0/MAXL. MAX0 MAX0/MAXL

4 LowCost, µp Supervisory Circuits MAX0 MAX0/MAXL Typical Operating Characteristics +. MAX0/MAX0 OUTPUT OLTAGE vs. SUPPLY OLTAGE T A = + C 00ms/div k 0pF POWERFAIL COMPARATOR ASSERTION RESPONSE TIME 0pF +. k = T A = + C /div /div /div 0m/div +. MAX0/MAX0 RESPONSE TIME 0k 0pF µs/div T A = + C MAX0, ASSERTION = RT T A = + C 0k 0k 0pF 0pF + /div /div +. POWERFAIL COMPARATOR DEASSERTION RESPONSE TIME 0pF +. 00ns/div k = T A = + C MAX0, DEASSERTION CC = RT T A = + C 0k 0k 0pF 0pF + +. /div 00ns/div 00ns/div 00ns/div MAX0/MAX0/MAXL OUTPUT OLTAGE vs. SUPPLY OLTAGE T A = + C MAXL RESPONSE TIME 0k 0pF /div /div 0k 0pF ms/div µs/div

5 LowCost, µp Supervisory Circuits Pin Description MAX0/MAX0 DIP/SO µmax PIN MAX0/MAX0 DIP/SO µmax MAXL DIP/SO µmax NAME WDI Supply Input FUNCTION ManualReset Input triggers a reset pulse when pulled below 0.. This activelow input has an internal 0µA pullup current. It can be driven from a TTL or CMOS logic line as well as shorted to ground with a switch. Ground Reference for all signals PowerFail oltage Monitor Input. When is less than., goes low. Connect to or when not used. PowerFail Output goes low and sinks current when is less than.; otherwise stays high. Watchdog Input. If WDI remains high or low for.sec, the internal watchdog timer runs out and WDO goes low (Figure ). Floating WDI or connecting WDI to a highimpedance threestate buffer disables the watchdog feature. The internal watchdog timer clears whenever reset is asserted, WDI is threestated, or WDI sees a rising or falling edge. MAX0 MAX0/MAXL N.C. No Connect ActiveLow Reset Output pulses low for 00ms when triggered, and stays low whenever is below the reset threshold (. in the MAX0 and. in the MAX0). It remains low for 00ms after rises above the reset threshold or goes from low to high (Figure ). A watchdog timeout will not trigger unless WDO is connected to. WDO Watchdog Output pulls low when the internal watchdog timer finishes its.sec count and does not go high again until the watchdog is cleared. WDO also goes low during lowline conditions. Whenever is below the reset threshold, WDO stays low; however, unlike, WDO does not have a minimum pulse width. As soon as rises above the reset threshold, WDO goes high with no delay. ActiveHigh Reset Output is the inverse of. Whenever is high, is low, and vice versa (Figure ). The MAXL has a output only.

6 LowCost, µp Supervisory Circuits MAX0 MAX0/MAXL WDI WATCHDOG TRANSITION DETECTOR 0µA.*. *. FOR MAXO. ( ) ARE FOR MAXL ONLY. WATCHDOG TIMER TIMEBASE FOR AND WATCHDOG GENERATOR MAX0 MAX0 MAXL Detailed Description Reset Output A microprocessor s (µp s) reset input starts the µp in a known state. Whenever the µp is in an unknown state, it should be held in reset. The MAX0MAX0/MAXL assert reset during powerup and prevent code execution errors during powerdown or brownout conditions. On powerup, once reaches, is a guaranteed logic low of 0. or less. As rises, stays low. When rises above the reset threshold, an internal timer releases after about 00ms. pulses low whenever dips below the reset threshold, i.e. brownout condition. If brownout occurs in the middle of a previously initiated reset pulse, the pulse continues for at least another 0ms. On powerdown, once falls below the reset threshold, stays low and is guaranteed to be 0. or less until drops below. The MAX0/MAX0/MAXL activehigh output is simply the complement of the output, and is guaranteed to be valid with down to.. Some µps, such as Intel s 0C, require an activehigh reset pulse. Watchdog Timer The MAX0/MAX0/MAXL watchdog circuit monitors the µp s activity. If the µp does not toggle the watchdog input (WDI) within.sec and WDI is not threestated, WDO goes low. As long as is asserted or the Figure. MAX0/MAX0/MAXL Block Diagram WDO () 0µA.*. *. FOR MAXO. GENERATOR MAX0 MAX0 WDI input is threestated, the watchdog timer will stay cleared and will not count. As soon as reset is released and WDI is driven high or low, the timer will start counting. Pulses as short as 0ns can be detected. Typically, WDO will be connected to the nonmaskable interrupt input (NMI) of a µp. When drops below the reset threshold, WDO will go low whether or not the watchdog timer has timed out yet. Normally this would trigger an NMI interrupt, but goes low simultaneously, and thus overrides the NMI interrupt. If WDI is left unconnected, WDO can be used as a lowline output. Since floating WDI disables the internal timer, WDO goes low only when falls below the reset threshold, thus functioning as a lowline output. The MAX0/MAX0 have a watchdog timer and a output. The MAX0/MAX0 have both activehigh and activelow reset outputs. The MAXL has both an activehigh reset output and a watchdog timer. Manual Reset The manualreset input () allows reset to be triggered by a pushbutton switch. The switch is effectively debounced by the 0ms minimum reset pulse width. is TTL/CMOS logic compatible, so it can be driven by an external logic line. can be used to force a watchdog timeout to generate a reset pulse in the MAX0/MAX0/MAXL. Simply connect WDO to. Figure. MAX0/MAX0 Block Diagram

7 LowCost, µp Supervisory Circuits PowerFail Comparator The powerfail comparator can be used for various purposes because its output and noninverting input are not internally connected. The inverting input is internally connected to a. reference. WDI WDO () t WP t WD t WD t WD ( ) ARE FOR MAXL ONLY. EXTERNALLY TRIGGERED BY Figure. MAX0/MAX0/MAXL Watchdog TIming WDO RT RT Figure. MAX0/MAX0,, and WDO Timing with WDI ThreeStated. The MAX0/MAX0/MAXL output is the inverse of shown. t RS t RS t RS t MD t EXTERNALLY DRIEN LOW To build an earlywarning circuit for power failure, connect the pin to a voltage divider (see Typical Operating Circuit). Choose the voltage divider ratio so that the voltage at falls below. just before the regulator drops out. Use to interrupt the µp so it can prepare for an orderly powerdown. Applications Information Ensuring a alid Output Down to = When falls below, the MAX0MAX0 output no longer sinks current it becomes an open circuit. Highimpedance CMOS logic inputs can drift to undetermined voltages if left undriven. If a pulldown resistor is added to the pin as shown in Figure, any stray charge or leakage currents will be drained to ground, holding low. Resistor value (R) is not critical. It should be about 00kΩ, large enough not to load and small enough to pull to ground. Monitoring oltages Other Than the Unregulated DC Input Monitor voltages other than the unregulated DC by connecting a voltage divider to and adjusting the ratio appropriately. If required, add hysteresis by connecting a resistor (with a value approximately 0 times the sum of the two resistors in the potential divider network) between and. A capacitor between and will reduce the powerfail circuit s sensitivity to highfrequency noise on the line being monitored. can be asserted on other voltages in addition to the line. Connect to to initiate a pulse when drops below.. Figure shows the MAX0MAX0 configured to assert when the supply falls below the reset threshold, or when the + supply falls below approximately. Monitoring a Negative oltage The powerfail comparator can also monitor a negative supply rail (Figure ). When the negative rail is good (a negative voltage of large magnitude), is low, and when the negative rail is degraded (a negative voltage of lesser magnitude), is high. By adding the resistors and transistor as shown, a high triggers reset. As long as remains high, the MAX0 MAX0/MAXL will keep reset asserted ( = low, = high). Note that this circuit s accuracy depends on the threshold tolerance, the line, and the resistors. MAX0 MAX0/MAXL

8 LowCost, µp Supervisory Circuits MAX0 MAX0/MAXL MAX0_ R Figure. alid to Ground Circuit R 00k M % 0k % + MAX0_ PARAMETER MIN TYP MAX UNIT + Reset Threshold at + C Figure. Monitoring Both and + BUFFERED TO OTHER SYSTEM COMPONENTS TO µp MAX0_ 00k N90 R TO µp MAX0_.k µp TRIP Figure. Interfacing to µps with Bidirectional Reset I/O.. TRIP =, TRIP < 0 R R Figure. Monitoring a Negative oltage Interfacing to µps with Bidirectional Reset Pins µps with bidirectional reset pins, such as the Motorola HC series, can contend with the MAX0MAX0 output. If, for example, the output is driven high and the µp wants to pull it low, indeterminate logic levels may result. To correct this, connect a.kω resistor between the output and the µp reset I/O, as in Figure. Buffer the output to other system components.

9 LowCost, µp Supervisory Circuits Ordering Information (continued) PART MAX0EPA MAX0ESA MAX0MJA MAX0CPA MAX0CSA MAX0CUA MAX0C/D MAX0EPA MAX0ESA MAX0MJA MAX0CPA MAX0CSA MAX0CUA MAX0C/D MAX0EPA MAX0ESA MAX0MJA MAX0CPA MAX0CSA MAX0CUA MAX0C/D MAX0EPA MAX0ESA MAX0MJA MAXLCPA MAXLCSA MAXLCUA MAXLC/D MAXLEPA MAXLESA MAXLMJA TEMP. RANGE 0 C to + C 0 C to + C C to + C 0 C to + C 0 C to + C C to + C 0 C to + C 0 C to + C C to + C 0 C to + C 0 C to + C C to + C 0 C to + C 0 C to + C C to + C PINPACKAGE Plastic DIP SO CERDIP** Plastic DIP SO µmax Dice* Plastic DIP SO CERDIP** Plastic DIP SO µmax Dice* Plastic DIP SO CERDIP** Plastic DIP SO µmax Dice* Plastic DIP SO CERDIP** Plastic DIP SO µmax Dice* Plastic DIP SO CERDIP** * Dice are specified at T A = + C. **Contact factory for availability and processing to MILSTD. Pin Configuration (continued) TOP IEW () WDO ( ) ARE FOR MAXL ONLY. MAX0 MAX0 MAXL µmax MAX0 MAX0 µmax WDI N.C. Chip Topography WDO/ 0.0" (.mm) ( ) ARE FOR MAXL ONLY. TRANSISTOR COUNT: SUBSTRATE MUST BE LEFT UNCONNECTED. () WDI/N.C. 0.0" (.0mm) MAX0 MAX0/MAXL 9

10 MAX0 MAX0/MAXL LowCost, µp Supervisory Circuits 0 Package Information L α C A B DIM A A B C D E e H L α MIN MAX MIN MAX INCHES MILLIMETERS PIN µmax MICROMAX SMALLOUTLINE PACKAGE A e E H D 0.0mm 0.00 in 00D

11 LowCost, µp Supervisory Circuits µp Supervisory Circuits Part Number Nominal Reset Threshold () Minimum Reset Pulse Width (ms) ActiveLow Reset ActiveHigh Reset R E S E T alid to CC = Nominal Watchdog Timeout Period (sec), if Available Separate Watchdog Output BackupBattery Switch CCtoOUT On Resistance Max (Ω) BATTtoOUT On Resistance Max (Ω) C E Write Protect PowerFail Comparator ManualReset Input LowLine Output BatteryOn Output ISUPPLY Operating Mode ma max (typ) ISUPPLY Backup Mode µa max (typ) Pins Price 000up ($) MAX./. 0 0./0./. 0.(0.0). MAX90A/9A./ (0.) (0.0). MAX90R/S/T./.9/ (0.) (0.). MAX9A/9A./.0 0/adj../adj.. /0ns 0.(0.0) (0.0). MAX9 The MAX9 is a module with the MAX9A and a mah lithium battery MAX9 Adj. /adj../adj.. MAX9 Adj. /adj../adj.. MAX00./adj (0.). MAX0/0./ (0.) (0.0).* MAX0R/S/T./.9/ (0.) (0.).9 MAX0/0./ (0.).0* MAX0P (0.). MAX0R/S/T./.9/ (0.). MAX0/0./ (0.) 0.* MAX0R/S/T./.9/ (0.). MAX9. 0. /0ns 0.(0.0) (0.0).90 MAX9L/M/R/S/T./.0/ 0 /0ns 0.(0.0)../.9/.0 MAX9R/S/U/T./.9/.0/.0 0. TBD TBD TBD TBD MAX9 Adj. 0. TBD TBD TBD TBD MAX9R/S/U/T./.9/.0/.0 0 TBD TBD TBD TBD MAX00L/M.0/.0 0./adj.. /0ns /±% 0.(0.0) (0.0). MAX0L/N/M././. 0 /±.%. TBD TBD TBD TBD MAX0L/M/R/S/T.0/.0/ /±% 0.(0.) (0.0).9./.9/.0 MAX0R/S/T./.9/ /±% 0.(0.) (0.). MAX0L/M/R/S/T./.0/ (0.) (0.0)../.9/.0 MAX0R/S/T./.9/ /±% 0.(0.) (0.).90 MAX0L/N/M././. 0 /±.% /±.%. TBD TBD TBD TBD MAX0L/N/M././. 0 /±.% TBD TBD TBD TBD MAX09L/M/R/S/T./.0/ 0 0.0(0.0)./.9/.0 MAX0L/M/R/S/T./.0/ 0 0.0(0.0)./.9/.0 MAXL. 0. /±% 0.(0.).0* MAXK/L/N/T.0/.0/./.0 0 /±% /±% /±% TBD TBD MAXK/L/N/T.0/.0/./.0 0 /±%. /±% TBD TBD MAX Adj./±% 0 /±% TBD TBD MAX0L/M/R/S/T./.0/ 0 /0ns /±% 0.(0.0)../.9/.0 MXD0./.. 0.(0.) 0.(0.00). Prices provided are for design guidance and are FOB USA (unless otherwise noted). International prices will differ due to local duties, taxes, and exchange rates. Future product contact factory for pricing and availability. Specifications are preliminary. *,000 pc. price, factory direct MAX0 MAX0/MAXL

12 LowCost, µp Supervisory Circuits MAX0 MAX0/MAXL Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 0 San Gabriel Drive, Sunnyvale, CA 90 (0) Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.