Digital Integrated CircuitDesign
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1 Dgal Inegraed CrcuDesgn Lecure 6 BJT Inverer Swchng Tmes µ s Adb Abrshamfar EE Deparmen IUST
2 Cnens BJT Inverer Cuff Regn ( 1 ) Acve Regn ( 1 2 ) Sauran Regn ( 3 4 ) Acve Regn ( 4 ) Recvery Regn ( 6 ) Prpagan Delay Tme Defnn f a parameer Pwer Delay Prduc Summary IUST: Dgal IC Desgn 2/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
3 BJT Inverer C Φ RB BE(n) BE(sa) CE(sa) je e e =10K =0.7 =0.8 =0.1 =0.3PF =0.9 m =0. + τ τ τ RC F BF s C Φ jc c c =1K =0.2nsec =14nsec =20nsec =0.1PF =0.7 m = 0.33 = = 1 d = = 2 1 f Delay Tme Fall Tme = = Sauran Tme 4 3 = = 4 = = 6 s r fr µ s Rse Tme 3 4 Fnal Recvery Tme 6 IUST: Dgal IC Desgn 3/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
4 BJT Inverer Swchng Tme BJT Inverer Cuff Regn ( 1) Acve Regn (1 2) Sauran Regn (3 4) Acve Regn (4 ) Recvery Regn ( 6) Prpagan Delay Tme Defnn f a parameer Pwer Delay Prduc Summary IUST: Dgal IC Desgn 4/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
5 Cuff Regn ( 1 ) d Q,Q F R B()= (Q E +Q C) d ( )=0 BE BE 1 BC ( )=0.7 ( )=0-=- ( )=0.7-=-4.3 BC 1 B QC Q E C E IUST: Dgal IC Desgn /30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
6 Cuff Regn ( 1 ) -0 B( )= = 0.mA 10K -0.7 B( 1)= = 0.43mA 10K B = = 0.46mA 2 d B()= ( QE + QC ) d 1 B E 1 E C 1 C [ ] + [ ] ()d = Q ( ) Q ( ) Q ( ) Q ( ) RB =10K + RC =1K IUST: Dgal IC Desgn 6/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
7 Cuff Regn ( 1 ) Q = Q ( ) Q ( ) = C. C eq E E 1 E eq BE 1 me 1 me Φ e BE ( ) BE( ) 1 = Cje 1 1 BE( 1 me) Φe Φe 1/2 1/ = PF ( 0.7-0)( 12) ΔQ =0.408PF 0.7 =0.28PC E RB =10K + RC =1K IUST: Dgal IC Desgn 7/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
8 Cuff Regn ( 1 ) Q = C. 2/3 2/ C eq = PF (-4.3+)( 23) ΔQ =0.076PF 0.7=0.03PC 1 C eq BC C ( ) 0.46mA d = =0.338PC - = = 1 d 0.338PC 0.46mA =0.73nsec µs IUST: Dgal IC Desgn 8/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
9 BJT Inverer Swchng Tme BJT Inverer Cuff Regn ( 1) Acve Regn (1 2) Sauran Regn (3 4) Acve Regn (4 ) Recvery Regn ( 6) Prpagan Delay Tme Defnn f a parameer Pwer Delay Prduc Summary IUST: Dgal IC Desgn 9/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
10 Acve Regn ( 1 2 ) Q d ()= + (Q +Q +Q ) F B F C E τbf d BE(n) BE(sa) CE CC CE CEsa BE 2 BC 2 = = ( )=0.8 ( )= =0.7 B Q C C Q F τ f BE Q F Q E E IUST: Dgal IC Desgn 10/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
11 Acve Regn ( 1 2 ) -0.7 B( 1) = = 0.43mA 10K -0.8 B( 2) = = 0.42mA 10K B = = 0.42mA 2 Q d ()= + (Q +Q +Q ) F B F C E τbf d RB =10K + RC =1K B()d = Q()d F + Q + Q + Q τ BF Q = Q ( ) Q ( ) F F 2 F F 2 C F 1 1 ( )( ) Q ( ) = I τ = 4.9mA 0.2nsec = 0.98PC Q ( ) = 0, F I C 1 F E C ( ) = 0 Q = 0.98PC 1 F IUST: Dgal IC Desgn 11/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
12 Acve Regn ( 1 2 ) Q = Q ( ) Q ( ) = C. E E 1 E eq BE 1/2 1/ = 1-1- = 0.74PF ( )( 12) ΔQ =0.74PF 0.1=0.07PC E Q = C. C eq BC C eq = 1 1+ ( )( 23) ΔQ =0.1176PF.0 =0.84PC 2 1 C By neglecng he recmbnan erm: ( ) 2/3 2/3 0.42mA d = = 1.64PC 1.64PC 2 1 = f = = 3.9nsec 0.42mA = 0.117PF 2 IUST: Dgal IC Desgn 12/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar µs 3 4 6
13 Acve Regn ( 1 2 ) Nw nclude he recmbnan erm, we assume a lnear ncrease n Q F frm ( ) 0.42mA d ( ) ( 0.98PC)( ) 1 14nsec = PC 2 1 = f = = 4.2nsec ma 1.64PC Q F Ne: The lss f carrer by recmbnan resuls n an ncrease n he fall me IUST: Dgal IC Desgn 13/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
14 BJT Inverer Swchng Tme BJT Inverer Cuff Regn ( 1) Acve Regn (1 2) Sauran Regn (3 4) Acve Regn (4 ) Recvery Regn ( 6) Prpagan Delay Tme Defnn f a parameer Pwer Delay Prduc Summary IUST: Dgal IC Desgn 14/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
15 Sauran Regn ( 3 4 ) Inpu pulse s wde and d + f = 4.9ns hen ranssr reaches seady sae sauran BF BR I β C = F Sep n 3 : ( I) I C Qs = τs( BR ) + Ke β C s 3 s BF s BR βf 3 I IC ( I) Q ( ) = τ ( ) = τ ( ) + K β K = τ ( ) s s C s s F Q τ I Q dq = + β τ d s s BF BR F τ s F BF BR 08. IUST: Dgal IC Desgn 1/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
16 Sauran Regn ( 3 4 ) IC Qs = τs ( BR ) + ( BF BR ) e βf = Q s BF BR 4 3 s sln ( I C βf ) BR β BF BR = = τ F = = 0.42mA 10K = = 0.08mA 10K τbf 14 = = = 70 τ 0.2 F s = 20Ln = 24nsec ( ) τ s µs IUST: Dgal IC Desgn 16/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
17 BJT Inverer Swchng Tme BJT Inverer Cuff Regn ( 1) Acve Regn (1 2) Sauran Regn (3 4) Acve Regn (4 ) Recvery Regn ( 6) Prpagan Delay Tme Defnn f a parameer Pwer Delay Prduc Summary IUST: Dgal IC Desgn 17/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
18 Acve Regn ( 4 ) Q d ()= + (Q +Q +Q ) F B F C E τbf d 4 B 1 B()d = Q()d F + Q + Q + Q τ BF 4 Durng Turn Off Q = Q (Durng Turn-n) B( 4) = = 0.08mA 10K B( ) = = 0.07mA 10K = 0.07mA F E C IUST: Dgal IC Desgn 18/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
19 Acve Regn ( 4 ) By neglecng recmbnan erm: 4 (-0.07mA)d = 1.64PC 1.64PC 4 = r = = 22nsec 0.07mA Includng he recmbnan erm and assumng a lnear decrease f Q : 1.64PC 4 = r = = 1nsec ( ) ma Ne ha he recmbnan can be a subsanal ad n he remval f charge frm he base. IUST: Dgal IC Desgn 19/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008 R µs 3 4 6
20 BJT Inverer Swchng Tme BJT Inverer Cuff Regn ( 1) Acve Regn (1 2) Sauran Regn (3 4) Acve Regn (4 ) Recvery Regn ( 6) Prpagan Delay Tme Defnn f a parameer Pwer Delay Prduc Summary IUST: Dgal IC Desgn 20/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
21 Recvery Regn ( 6 ) Ths suan s smlar he nal delay me prr urn n B( ) = = 0.07mA 10K ( ) = 0mA B 6 B = 0.03mA Q + Q = 0.338PC C E PC 6- = fr = = 9.7nsec -0.03mA µs IUST: Dgal IC Desgn 21/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
22 BJT Inverer Swchng Tme BJT Inverer Cuff Regn ( 1) Acve Regn (1 2) Sauran Regn (3 4) Acve Regn (4 ) Recvery Regn ( 6) Prpagan Delay Tme Defnn f a parameer Pwer Delay Prduc Summary IUST: Dgal IC Desgn 22/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
23 Prpagan Delay Tme = + /2= /2= 2.8nsec PHL d f = + /2= 24+ 1/2= 31.nsec>> PLH s r PHL P PHL PLH = = = 17.1n sec n Ths ndcaes ha he sauran me s a very large fracn f he al me 0% phl plh u 90% 0% 10% f r IUST: Dgal IC Desgn 23/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
24 BJT Inverer Swchng Tme BJT Inverer Cuff Regn ( 1) Acve Regn (1 2) Sauran Regn (3 4) Acve Regn (4 ) Recvery Regn ( 6) Prpagan Delay Tme Defnn f a parameer Pwer Delay Prduc Summary IUST: Dgal IC Desgn 24/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
25 Defnn f a parameer τ s =? (Befre) Q = I τ, Q = I I = I + I, I = Excess base curren dqa = 0 (In sauran) d Q Q Q dq C = τ τ τ d Qs I BS = + τ F CF F R ER R B Bsa BS BS (Nw) Q = I τ, Q = I τ a Csa F s BS s F R R R F R BR s dq d s By manpulang hese equans: τ = s αf( τf + ατ R R ) 1 αα F R τ α = 0.98, α = 0., τ = 0.2nsec, τ = 20nsec τ 20nsec F R F R s E 0 Q F B Q R w Frward Reverse C E 0 Q acve Q S B w Frward Reverse C IUST: Dgal IC Desgn 2/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
26 BJT Inverer Swchng Tme BJT Inverer Cuff Regn ( 1) Acve Regn (1 2) Sauran Regn (3 4) Acve Regn (4 ) Recvery Regn ( 6) Prpagan Delay Tme Defnn f a parameer Pwer Delay Prduc Summary IUST: Dgal IC Desgn 26/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
27 Pwer Delay Prduc 1 1 Pd = ( PHL + PLH ) = ( ) = 17.1nsec 2 2 P = P = 0 dl d n= P = I + I dh cc Csa IH IH IH = Calculaed fr cnnecng he upu nly ne npu 0.8 K IH = = K K IUST: Dgal IC Desgn 27/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
28 Pwer Delay Prduc I I P Csa IH dsh d 0.2 = = 4.8mA K 1 IH 0.8 = = mA K 10 = P = dsh ma ma 2.76mW = mW ( ) P = 12 P + P P d dl dh Ths s very hgh. IUST: Dgal IC Desgn 28/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
29 BJT Inverer Swchng Tme BJT Inverer Cuff Regn ( 1) Acve Regn (1 2) Sauran Regn (3 4) Acve Regn (4 ) Recvery Regn ( 6) Prpagan Delay Tme Defnn f a parameer Pwer Delay Prduc Summary IUST: Dgal IC Desgn 29/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
30 Summary In hs lecure he swchng mes f he bplar ranssr were frs descrbed Delays n all f mde were calculaed Sauran me s very large fracn f al mes Prpagan delay me was calculaed Fnally pwer delay prduc was calculaed whch was very hgh IUST: Dgal IC Desgn 30/30 LECTURE 6 : BJT Inverer Swchng Tmes Adb Abrshamfar 2008
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