Revelation of Soft-Switching Operation for Isolated DC to Single-phase AC Converter with Power Decoupling

Transcription

1 Revelain f Sf-Swiching Operain fr Islaed DC Single-phase AC Cnverer wih wer Decupling Nagisa Takaka, Jun-ichi Ih Dep. f Elecrical Engineering Nagaka Universiy f Technlgy Nagaka, Niigaa, Japan nakaka@sn.nagakau.ac.jp, ih@vs.nagakau.ac.jp Absrac This paper discuses sf-swiching range in an islaed single-phase marix cnverer wih a cener-apped ransfrmer fr HVDC (high vlage direc curren) pwer feeding sysems. The prpsed cnverer cnsis f a full bridge inverer, a high frequency ransfrmer and a marix cnverer which i des n require a bulky elecrlyic capacir. The pwer decupling perain is accmplished by he cener-apped ransfrmer and a small LC fer. In cmparisn wih a cnveninal DC single-phase AC cnverer wihu pwer decupling perain, he prpsed circui parly achieve he Zer Vlage Swiching () perain f he full bridge inverer n he primary side f he ransfrmer. In his paper, a principle f using he LC fer circui is described. Frm a simulain resul, he sf-swiching perain is cnfirmed a lw lad curren regin by using he LC fer. Meanwhile i is experimenally cnfirmed ha he prpsed pwer decupling mehd reduces he DC bus curren ripple by 85.%. In addiin, he perain n he primary side f he prpsed DC single-phase AC cnverer is cnfirmed in experimen. Keywrds marix cnverer; pwer decupling; Zer vlage swiching; I. INTRODUCTION Recenly, pwer cnsumpin f ICT (infrmain and cmmunicain echnlgy) equipmen in buildings and facries has been drasically increased. As a sluin fr energy saving, a High Vlage Direc Curren (HVDC) pwer feeding sysem has been develped previusly [-]. In he HVDC pwer feeding sysem, a DC bus f 38 V is applied in rder bain high efficiency and lw cs due he reducin f cnverers and cables, cmpared cnveninal AC r DC 48 V pwer feeding sysem. A DC single-phase AC cnverer is required because he HVDC pwer feeding sysem is cnsidered n be able replace enirely he cnveninal AC pwer feeding sysem in he near fuure. In addiin, he DC single-phase AC cnverer requires islain capabiliy beween he DC bus and he AC upu side fr safey. One f he ms significan prblems, a pwer ripple which is generaed by a single-phase lad becmes a wice f a cmmercial frequency. In pas wrks, sme circui plgies wih pwer decupling capabiliy h been sudied [3-5]. Hwever, hese circuis resric he dwn-sizing because he circuis emply n nly passive cmpnens bu als addiinal swiching devices fr he pwer decupling. In rder vercme his prblem, he auhrs h already prpsed he pwer decupling mehd fr he islaed DC single-phase AC cnverer in [6-7]. The prpsed sysem cnsiss f a full bridge inverer, a cener- apped ransfrmer, a small LC fer and a marix cnverer. The prpsed cnverer des n require exra swiching devices fr he pwer decupling. In addiin, smaller size cmpared he cnveninal sysem is als expeced because he bulky elecrlyic capacir is n required. The mdulain mehd f he marix cnverer used in [7] is applied wih DM (ulse Densiy Mdulain)which is (Zer Vlage Swiching) is achieved by synchrnizain f he gae pulses f he marix cnverer wih zer vlage erm f he secndary vlage f he ransfrmer. Therefre, he DM can drasically reduce he swiching lss in he secndary side. Hwever, in rder achieve higher efficiency, he swiching lss in he primary side is als necessary be reduced in he prpsed cnverer. This paper discusses he achievemen f he cndiin a he primary side f he islaed DC single-phase AC cnverer using marix cnverer. The primary cnverer can parly achieve even when a differenial curren which delivers he pwer he secndary side f ransfrmer is belw he lwer limi value. Mrever, when he marix cnverer upu vlage is zer, he prpsed cnverer can parly achieve. These reasn is ha here is he cnsan cmmn curren f he fer circui is verlapping he ransfrmer curren. This paper is rganized as fllws; firs, he circui cnfigurain f he prpsed DC single-phase AC cnverer and he principle f he pwer decupling are described; secnd, he cndiin a he primary inverer are mehd; finally, he fundamenal perain wfrms f he prpsed sysem when he cndiin is achieved a he primary side is evaluaed by simulains and experimens.

2 II. CIRCUIT TOOLOGY Fig. shws a cnveninal islaed DC single-phase AC cnverer. The cnveninal circui cmprises a full bridge inverer, a high frequency ransfrmer and a recifier-inverer sysem. The full bridge inverer upus square vlage a high frequency in rder reduce he ransfrmer vlume. The secndary recifier cnvers he high frequency vlage DC vlage and he WM inverer cnrls he upu filer capacir vlage by feedback cnrl. When he lad curren is sinusidal wfrm and achieves he uniy pwer facr, he insananeus upu pwer p u is expressed by (). I bus Full bridge Inverer N N C dc Dide recifier v u L u i u C u WM inverer R lad Fig.. A Cnveninal islaed DC single-phase AC cnverer. The cnveninal cnverer uses a bulky elecrlyic capacir C dc absrb a pwer ripple caused by single-phase lad. L dc i lad v lad p u V V lad lad I lad Ilad sin cs cs sin u i bus A- phase B- phase where, V lad is he lad vlage (RMS), I lad is he lad curren (RMS), u is he upu mean pwer and ω is he upu angular frequency. A ripple cmpnen shwn in he secnd erm f () shuld be bypassed in rder bain a cnsan DC curren in he DC bus. Hence, his sysem has adp a bulky elecrlyic capacir C dc absrb he pwer ripple. Fig. shws he islaed DC single-phase AC cnverer using a marix cnverer and a small LC fer which is prpsed in his paper. The marix cnverer is emplyed as a secndary cnverer in rder eliminae he DC-link capacir which is used in Fig.. In addiin, a cener-apped ransfrmer links he full bridge inverer he marix cnverer fr islain and he pwer decupling which resuls in reducing he DC bus curren ripple. A fer circui including a fer capacir C and a fer inducr L is used absrb he pwer ripple. I shuld be ned ha a charge and a discharge cmpensae he pwer ripple is implemened a C. Fig. 3 shws he principle f he pwer decupling wih C. In rder yield he DC bus curren wihu he ripple, he relainship amng he upu pwer p u, a DC bus pwer p bus and he charged pwer p is defined as (). p cs u where, he plariy f p is defined as psiive when C is charged. I shuld be ned ha he capaciance f he fer capacir is smaller han ne in he cnveninal cnverer because he pwer ripple is cmpensaed by varying he fer capacir vlage v C n by he large capaciance. On he her hand, he inducr in he fer circui is used fr he curren cnrl in he pwer decupling, which is equivalen cnrl f p. The fer curren cnrl is carried u by he full bridge inverer. The full bridge inverer can upus independenly a differenial mde vlage excie he ransfrmer and a cmmn mde vlage cmpensae he pwer ripple wih he LC fer, wing he cener-apped ransfrmer. Therefre, he prpsed cnverer des n require addiinal swiching devices fr he pwer decupling and number f devices in he prpsed cnverer is as same as ne f he cnveninal circui. v ap v an S ap S an S bp iinv v inv S bn Full bridge Inverer v bp i a v bn III. i b i L C v Buffer circui CONTROL STRATEGY A. Full Bridge Inverer Fig. 4 shws he mdulain mehd f he full bridge inverer. As menined abve, he full bridge inverer upus a i s v s S ap S an S bp v u S bn i u L u Marix cnverer C u i lad R lad Fig.. A rpsed islaed DC single-phase AC cnverer. The secndary cnverer is replaced wih a marix cnverer in rder eliminae a DC-link smhing capacir. In addiin, a cener-apped ransfrmer and a small LC fer are emplyed achieve a pwer decupling wihu addiinal swiching devices. I bus p bus Inpu pwer p bus [W] V Cmax V Cmin v C i p discharge charge discharge charge Buffer pwer p [W] v lad v p u lad i lad i lad V I lad lad sin sin Oupu pwer p u [W] v lad Fig. 3. A principle f he pwer decupling wih he fer capacir. A fer pwer cmpensae he pwer ripple is charged r discharged a C. As a resul, he DC bus curren wihu he ripple cmpnen is bained.

3 differenial mde vlage excie he ransfrmer and a cmmn mde vlage v cm cmpensae he pwer ripple. Therefre, a differenial mde vlage reference and a cmmn mde vlage reference v cm are se as inpu parameers in Fig. 4. I shuld be ned ha he gain f.5 is insered nly he pah f because he reference penial f is differen frm ne f v cm. In rder bain he maximum secndary vlage f he ransfrmer, is se p.u.. On he her hand, v cm is calculaed by a I cnrller in he fer curren cnrl cmpensae he pwer ripple as menined in chaper IV Fig. 5 shws he perain mdes f he full bridge inverer. The hached gray line indicaes he urned ff swich and he black slid line shws he curren pahway. Fig. 5 (a) and (b) illusrae he differenial mde when he DC bus pwer is ransferred. In his mde, he ransfrmer is excied. In addiin, he fer circui vlage, which is equivalen v cm, is cnsan a V ba/. On he her hand, Fig. 5 (c) and (d) shw he cmmn mde cnrl he fer curren i in rder cmpensae he pwer ripple. In he cmmn mde, he ransfrmer is n excied because becmes zer. By his mehd, he full bridge inverer can cnrl and v cm independenly because nly ne f he differenial mde and he cmmn mde v cm is varied a ne ime. This resuls in ha he prpsed cnverer des n require addiinal swiches fr he pwer decupling. B. wer Decupling Mehd In rder absrb he pwer ripple caused by he singlephase lad, he fer curren reference i is calculaed frm p u and he chargeable energy f C. Firs f all, he fer capacir energy W C is presened by (3). W C p d u cs d (3) where, is he sar ime f perain. If is zer, v C which need cmpensae he pwer ripple is calculaed as fllwing by using (3). V (4) 4 C bus u v sin C where, V C is he iniial vlage f C and V C is /. Finally, i is derived by using he upu pwer reference u. i dvc u cs C (5) d Vbus u sin 4 C I shuld be ned ha u is calculaed by a lad resisance. Therefre, he pwer ripple is cmpensaed by using he fer curren cnrl wih he curren reference i as shwn (5). v cm / Carrier C. Marix Cnverer - (a) Blck diagram The marix cnverer used as a secndary cnverer in he prpsed sysem is applied wih he DM f [7]. The DM is suiable fr he direc AC AC cnverer which prvides a sinusidal vlage a cmmercial frequency frm a high frequency vlage, such as he prpsed sysem. The DM reas he high-frequency inpu vlage as pulses and synhesize he upu vlage wih a densiy f he inpu vlage pulses. A half cycle f he inpu vlage pulses are used as he minimum uni v cm - - L C (b) Definiin f and v cm Fig. 4. A mdulain mehd f a full bridge inverer. A differenial mde vlage reference excies he ransfrmer and a cmmn mde vlage reference v cm is used cmpensae he pwer ripple wih he LC fer. v cm ( V ba, v cm V ba /) v cm ( -V ba, v cm V ba /) (a) Differenial mde. (b) Differenial mde. v cm (, v cm V ba ) v cm (, v cm ) (c) Cmmn mde. (d) Cmmn mde. Fig. 5. Operain mdes f he full bridge inverer a he primary side. The primary side f he prpsed sysem has w mde; a differencial mde which delivers he pwer he secndary side f ransfrmer and a cmmn mde which reduce he he pwer ripple.

4 f he upu vlage wfrm. The marix cnverer swiches are urned n in zer vlage perid f he inpu vlage wfrm. In cnsequence, he marix cnverer achieves (zer vlage swiching) which resuls in decreasing a swiching lss. This is he reasn ha he DM is applied he marix cnverer in his paper. IV. OERATION OF RIMARY CONVERTER The basic perain f fr he prpsed cnverer is explained in his chaper. In he prpsed circui, if he ransfrmer curren discharges in he drain--surce capaciance during dead ime, he swiching becmes. I shuld be ned ha if he fer curren which flws pwer decupling circui as shwn in chaper III discharges in during dead ime, he swiching als becmes. A. Cnducin Mde a Secndary Side f Transfrmer The effecs f parasiic elemens in he ransfrmer and he lad inducance L lad are negleced fr he simpliciy. In his cndiin mde, he marix cnverer des n upu zer vlage and he lad curren flws he secndary ransfrmer. In rder achieve in primary side, he relainship amng he fer curren, he upu curren f MC and he curren in each her arm f he full-bridge curren is required. In he cnveninal DC AC cnverer wihu he pwer decupling circui in reference [8], he lad curren equals he ransfrmer curren by assuming ha he exciing curren is small enugh be negleced. Therefre, he swiching devices which achieve are deermined by he ple f he ransfrmer curren. The relainship beween he ple f he ransfrmer curren and he -achieving swiching devices is as fllws. ) i a > : S an, S bp ) i a < : S ap, S bn On he her hand, in he prpsed cnverer, he ransfrmer curren verlaps wih he cmmn curren. Thus, he currens i a, i b in each arm are presened by (6)-(7). ia ( ) idif ( ) i ( ) ib ( ) idif ( ) i ( ) where, i bif () is he ransfrmer curren and changes accrding he upu curren f MC, i () is he fer curren in he pwer decupling circui and changes accrding he upu pwer. If he maximum upu curren is I m, (6)-(7) are rewrien as (8)-(9). ia ( ) I m sin( ) Vbus 4 cs C (6) (7) sin ib ( ) I m sin( ) Vbus 4 cs C sin As abve saed, he phase curren in primary inverer is he sum f he fer curren and he upu curren. Therefre, bh he -achieving swiching devices and he range are deermined by he ple f ransfrmer curren, he fer curren and phase ϴω. In rder achieve in he primary inverer, he curren i a, i b in each phase are required be higher han he lwer limi value i lim. If he curren i a, i b in each phase is belw i lim he charges in he drain--surce capaciance cann be discharged cmpleely during dead ime. The lwer limi value i lim which achieves in he primary side is presened by (). i lim CdsV T dead bus B. Zer Vlage Mde a Secndary Side f Transfrmer Fig. 6 shws he curren pah-way f he prpsed circui when he marix cnverer upus zer vlage. When DM is applied fr he secndary cnverer, he cnverer upuing zer vlage makes p-n line becme pen. In he cnveninal circui wihu he pwer decupling circui, he secndary ransfrmer curren becmes zer. Therefre, he primary inverer des n h he ransfrmer curren mee he cndiin fr () achieve. On he her hand, in he prpsed circui, by applying he cener-apped ransfrmer and he pwer decupling circui as shwn in chaper 3 cmpensae he ripple cmpnen, he fer curren becmes he sinusidal w a Hz. Hence, in he prpsed cnverer, he ransfrmer curren flws accrding he fer curren even when he marix cnverer upus zer vlage. The ple f he ransfrmer curren is decided by he ple f he fer curren. Thus, he -achieving swiching devices are decided by he lad curren and phase because he fer curren are decided by he lad curren i u (). In his paper, he cndiin f he -achieving swiching devices which varies depending n he lad curren i u () and he phase are discussed using simulain. The curren discharge cmpleely he drain--surce capaciance has mee (). Therefre, he bundary cndiin f he fer curren i () achieve a primary side is presened by (). i 4CdsV T dead bus As shwn abve, his prpsed cnverer can achieve bh in he primary inverer and he pwer decupling whereas

5 he in reducin f he DC bus curren ripple is als accmplished. In addiin, because can be achieved in he primary inverer, he prpsed cnverer is expeced achieve a dwnsizing and lwer lss. V. SIMULATION AND EXERIMENTAL RESULTS A. Simulain Resuls in Seady Sae In rder verify he prpsed mehd f he primary inverer described in chaper IV, achievable range in he inverer a primary side is discussed using simulain. Table shws he simulain cndiin fr he islaed single-phase marix cnverer wih he prpsed pwer decupling mehd as drawn in Fig.. I shuld be ned ha he upu vlage f MC is V rms, he upu pwer is kw, he upu frequency is 5 Hz, and he pwer facr f he upu curren is. Fig. 7 shws he relainship beween he abslue value f he upu curren i u and he phase ϴω. In Fig. 7, in he dmain arund he highes value f he upu curren, bh legs achieve, because he curren which discharges cmpleely he drain--surce capacir is high enugh. On he her hand, in he dmain arund he leas value f he upu curren, he fer curren appraches he maximum value. Therefre, he primary inverer achieves nly if he fer curren mees he crierin shwn in (). In cnras, he red area in Fig. 7 shws he perid in which he p arm a he primary inverer d n achieve during he zer vlage perid f he marix cnverer, and he her area shws he perid in which he bm arm a he primary inverer d n achieve during he zer vlage perid f he marix cnverer. I shuld be ned ha he red area and her area is he regin which can ge he curren achieve if he marix cnverer d n upu zer vlage. In he zer vlage perid f he marix cnverer, he reasn why he -achieving swiching devices change is ha he ple f he fer curren changes accrding he phase f he upu curren. As he resul, in he prpsed cnverer, he ransfrmer curren achieve sill flws hrugh he fer circui even during he zer vlage perid f he marix cnverer shwn in secin IV-A. Finally, in he A viciniy f he fer curren, his prpsed cnverer des n achieve a he primary inverer because he fer curren d n mee (). Fig. 8 shws he gae-surce vlage and he drain-surce vlage a raed lad. Fig. 8 (a), (b), and (c) shws he wfrm f dmain A, B, and C in Fig.7, respecively. In Fig. 8, he gaesurce vlage rises afer he drain-surce vlage drps zer due he resnance beween he drain-surce capaciance and he leakage inducance f he ransfrmer. Therefre, he f he inverer a primary side is achieved. I is cnfirmed frm Fig. 8, he swiching devices which achieve agree wih he dmain shwn in Fig. 7. As a resul, each swiches f he primary inverer achieve in crrespnding dmain. Thus, i is pssible reduce he swiching lss f he inverer a primary side. i bus S ap S an S bp S bn B. Experimenal Resuls in Seady Sae i b i i a Fig. 6. A relainship beween a swiching perain and curren pah-way in he prpsed circui when he marix cnverer upus zer vlage. Curren [A] TABLE I. Raed pwer Buffer L (L ) Buffer C (C ) Lad curren Carrier frequency f full bridge inverer A Fig. 9 (a) and (b) shws he wfrm wih and wihu he pwer decupling mehd. In Fig. 8(a), he fer capacir vlage des n change because he full bridge inverer des n upu he cmmn mde AC vlage. As a resul, he DC bus i s v s S pu S nu S pv S nv i u v u SIMULATION CONDITION OF ROOSED SYSTEM.. kw.5 mh 4 mf A rms khz Oupu curren B DC bus vlage Turn rai N /N Drain surce capaciance Carrier frequency f marix cnverer Burrer curren π π π 3 π The phase f he upu curren ω C 38 V dc.5nf khz regin A. Cnducin Mde f MC S ap S an S bn S bp B. V Mde f MC : S an S bn : S ap Fig.7. A characerisic f he upu curren, he fer curren and he phase f he upu curren. The area which achieve a primary side is decided he ple f he fer curren Inverer vlage v inv [V] 4-4 Transfrmer curren i inv [A] - Gae signal f S ap a he inverer Terminal vlage v ap [V].. 4 Gae signal f S bn a he inverer.. Terminal vlage v bn [V] 4 Gae signal f S up a he marix cnverer.. Gae signal f S vp a he marix cnverer Buffer curren i [A]. 6. [µs].. - Oupu curren i u [A] S bp (a) Range f lw (b) Zer vlage (c) Range f high lad curren is upued erm lad curren Fig.8. Exended wfrm f a swiching paern fr each perids f upu curren. Fig. 8(a), (b), and (c) shws he wfrm f dmain A, B, and C in Fig.7. [µs]

6 curren has a pwer ripple cmpnen a Hz. In cnras, he prpsed pwer decupling mehd prvides he cmmn mde AC vlage flucuae he fer capacir vlage. As a resul, he pwer ripple cmpnen in he DC bus curren is decreased. Fig. shws a harmnic analysis f he DC bus curren. I shuld be ned ha he fundamenal frequency is he upu frequency a 5 Hz. Frm he resul, i is undersd ha wihu he pwer decupling mehd, he pwer ripple cmpnen a Hz is 6.6% cmpared an rage curren. In cnras, he prpsed mehd reduces he Hz cmpnen 9.3% because he fer capacir vlage flucuain absrbs he pwer ripple a Hz. As a resul, he ripple f he DC bus curren is suppressed by 85.%. Fig. shws experimenal wfrms f he prpsed cnverer wih f 35 V, v grid f V peak, T dead f 5 ns and an R-L lad f 5 W. Frm Fig., he gae-surce vlage in S bn rises afer he drain-surce vlage drps in S bn zer due he resnance beween he drain-surce capaciance f S bn and he fer inducance. In addiin, i is cnfirmed frm Fig. ha he swiching devices achieve when he cndiin f he upu curren value calculaed by () is saisfied. VI. CONCLUSION In his paper, in rder achieve high efficiency wihu any addiinal passive cmpnens, achievable range and he cndiin fr he inverer a primary side f he ransfrmer using he prpsed pwer decupling circui are discussed. In his prpsed sysem, even when he ransfrmer s differenial curren which delivers he pwer he secndary side f ransfrmer is belw he lwer limi value achieve r when he marix cnverer upus zer vlage, he prpsed cnverer sill achieves, because here is he fer curren verlapping he ransfrmer curren. In addiin, bh he perain and he pwer decupling are achieved which resuls in reducing he DC bus curren ripple a he same ime. As a resul, he ripple f he DC bus curren is suppressed by 85.% by experimens. Mrever, in experimenal resuls, he perain n he primary side f he ransfrmer is cnfirmed. REFERENCES [] T. Babasaki, T. Tanaka, Y. Nzaki, T. Tanaka, T. Aki, F. Kurkawa: Develping f Higher Vlage Direc-Curren werfeeding rype Sysem, rc. 3s INTELEC 9, (9) [] S. Jung, Y. Bae, S. Chi, H. Kim: A lw cs uiliy ineracive inverer fr Residenial Fuel Cell Generain, IEEE Trans. wer Elecrn., Vl., N. 6, pp (7) [3] T. Shimizu, S. Suzuki: A single-phase grid-cnneced inverer wih pwer decupling funcin, rc. IEC, pp () [4] K. H. Cha,. T. Cheng: wer Decupling Mehds fr singlephase hree-ples AC/DC cnverers, rc. ECCE9, pp (9) [5] J. Ih, F. Hayashi : Ripple Curren Reducin f a Fuel Cell fr a Single-hase Islaed Cnverer Using a DC Acive Filer wih a Cener Tap, IEEE Trans. wer Elecrn., Vl. 5, N. 3, pp () [6] H.Takahashi, N.Takaka, R.R.Rdriguez, J.Ih: wer Decupling Mehd fr Islaed DC Single-phase AC Cnverer using Marix Cnverer,IECON4, pp (4) Harmnic cmpnen [%] (%: DC cmpnen) DC bus curren I bus 5 A/div Buffer curren i 5 A/div Buffer capacir vlage V C V/div Oupu vlage (LF) v u V/div 4 ms/div (a) Wihu he pwer (b) Wih he pwer decupling mehd. decupling mehd Fig.9. Inpu and upu wfrms in a seady sae. Fig.. Harmnic analysis f he DC bus curren. The pwer decupling mehd reduces he DC bus curren ripple by 85.% cmpared when he pwer decupling is n applied Gae-surce vlage f S bn V/div Inverer vlage V inv 5 V/div Oupu curren i u A/div Wihu he pwer decupling mehd Reduced by 85.% Wih he pwer decupling mehd Harmnic number Drain-surce vlage f S bn 5 V/div 4 ns/div Fig.. Experimenal wfrm a 5% raed pwer. The gae-surce vlage in S bn rises afer he drain-surce vlage drps in S bn zer due he resnance beween he drain-surce capaciance f S bn and he fer inducance. [7] N. Takaka, H. Takahashi, J. Ih: "Vlage errr cmpensain mehd fr DM in pwer decupling cnduced by islaed singlephase marix cnverer and cener-apped ransfrmer.",no.sc- 5-55,MD-5-55 (5) [8] R. Oshima, H. Takahashi, J. Ih: "Zer vlage swiching mehd fr an islaed DC - 3 phase AC cnverer using AC - 3 phase AC direc cnverer a secndary side f ransfrmer"no.sc-5-6,md-5-6 (5)