PHILIPS 74LVT transparent D-type latch datasheet

Transcription

1 PIIPS transparent -type latch datasheet The is a high-performance BiCMOS product designed for VCC operation at 3.3 V. Manualib.com collects and classifies the global product instrunction manuals to help users access anytime and anywhere, helping users make better use of products.

2 INTGRAT CIRCUITS 1999 Sep 23 IC23 ata andbook

3 FATURS 16-bit transparent latch 3-State buffers Output capability: +12 ma / 12 ma TT input and output switching levels Input and output interface capability to systems at 5 V supply Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs ive insertion/extraction permitted Outputs include series resistance of 30 Ω making external resistors unnecessary Power-up reset Power-up 3-State No bus current loading when output is tied to 5 V bus atch-up protection exceeds 500 ma per JC Std 17 S protection exceeds 2000 V per MI ST 883 Method 3015 and 200 V per Machine Model SCRIPTION The is a high-performance BiCMOS product designed for V CC operation at 3.3 V. This device is a 16-bit transparent -type latch with non-inverting 3-State bus compatible outputs. The device can be used as two 8-bit latches or one 16-bit latch. When atch nable () input is igh, the outputs follow the data () inputs. When atch nable is taken ow, the outputs are latched at the levels of the inputs one setup time prior to the igh-to-ow transition. The is designed with 30 Ω series resistance in both the igh and ow states of the output. This design reduces the noise in applications such as memory address drivers, clock drivers, and bus receivers/transmitters. UICK RFRNC ATA SYMBO t P t P Propagation delay nx to nx PARAMTR C = 50 pf; V CC = 3.3 V CONITIONS T amb = 25 C TYPICA UNIT 3.0 ns C IN Input capacitance V I = 0 V or 3.0 V 3 pf C OUT Output capacitance Outputs disabled; V O = 0 V or 3.0 V 9 pf I CCZ Total supply current Outputs disabled; V CC = 3.6 V 70 µa ORRING INFORMATION PACKAGS TMPRATUR RANG ORRING CO WG NUMBR 48-Pin Plastic SSOP Type III 40 C to +85 C SOT Pin Plastic TSSOP Type II 40 C to +85 C GG SOT Sep

4 PIN CONFIGURATION OGIC SYMBO 1O O V CC 7 42 V CC O V CC V CC SA OGIC SYMBO (I/IC) O SA O 1 2O N C3 2N C4 PIN SCRIPTION PIN NUMBR SYMBO FUNCTION 47, 46, 44, 43, 41, 40, 38, 37, 36, 35, 33, 32, 30, 29, 27, 26 2, 3, 5, 6, 8, 9, 11, 12, 13, 14, 16, 17, 19, 20, 22, , 24 1O, 2O 48, 25 1, 2 4, 10, 15, 21, 28, 34, 39, 45 ata inputs ata outputs Output nable inputs (active-ow) atch nable inputs (active-igh) Ground () 7, 18, 31, 42 V CC Positive supply voltage SW Sep 23 3

5 OGIC IAGRAM n0 n1 n2 n3 n4 n5 n6 n7 n no n0 n1 n2 n3 n4 n5 n6 n7 SA00046 FUNCTION TAB INPUTS INTRNA OUTPUTS no n nx l h RGISTR n0 n7 X NC NC old X nx NC nx = igh voltage level h = igh voltage level one set-up time prior to the igh-to-ow transition = ow voltage level l = ow voltage level one set-up time prior to the igh-to-ow transition NC= No change X = on t care Z = igh impedance off state = igh-to-ow transition SCMATIC OF AC OUTPUT Z Z nable and read register atch and read register isable outputs OPRATING MO V CC 27 Ω 27 Ω OUTPUT SW Sep 23 4

6 ABSOUT MAXIMUM RATINGS 1, 2 SYMBO PARAMTR CONITIONS RATING UNIT V CC C supply voltage 0.5 to +4.6 V I IK C input diode current V I < 0 50 ma V I C input voltage to +7.0 V I OK C output diode current V O < 0 50 ma V OUT C output voltage 3 Output in Off or igh state 0.5 to +7.0 V Output in ow state 128 I OUT C output current Output in igh state 64 ma T stg Storage temperature range 65 to +150 C NOTS: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. xposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150 C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. RCOMMN OPRATING CONITIONS IMITS SYMBO PARAMTR MIN MAX UNIT V CC C supply voltage V V I Input voltage V V I igh-level input voltage 2.0 V V I Input voltage 0.8 V I O igh-level output current 12 ma I O ow-level output current 12 ma t/ v Input transition rise or fall rate; Outputs enabled 10 ns/v T amb Operating free-air temperature range C 1999 Sep 23 5

7 C CTRICA CARACTRISTICS IMITS SYMBO PARAMTR TST CONITIONS Temp = 40 C to +85 C UNIT MIN TYP 1 MAX V IK Input clamp voltage V CC = 2.7V; I IK = 18mA V V O igh-level output voltage V CC = 3.; I O = 12mA 2.0 V O ow level output voltage V CC = 3.; I O = 16mA 0.8 V V RST Power-up output ow voltage 5 V CC = 3.6V; I O = 1mA; V I = or V CC V I I Input leakage current V CC = 3.6V; V I = V CC or Control pins 0.1 ±1 V CC = 0 or 3.6V; V I = 5.5V V CC = 3.6V; V I = V CC ata pins 4 V CC = 3.6V; V I = I OFF Output off current V CC = ; V I or V O = 0 to 4.5V 0.1 ±100 µa V CC = 3V; V I = 0.8V I O Bus old current inputs 7 V CC = 3V; V I = µa I X I PU/P V CC = to 3.6V; V CC = 3.6V ±500 Current into an output in the igh state when V O > V CC V O = 5.5V; V CC = µa Power up/down 3-State output V CC 1.2V; V O = 0.5V to V CC ; V I = or V CC ; current 3 O/O = on t care µa 1 ±100 µa I OZ 3-State output igh current V CC = 3.6V; V O = 3.; V I = V I or V I I OZ 3-State output ow current V CC = 3.6V; V O = 0.5V; V I = V I or V I I CC V CC = 3.6V; Outputs igh, V I = or V CC, I O = I CC uiescent supply current V CC = 3.6V; Outputs ow, V I = or V CC, I O = ma I CCZ V CC = 3.6V; Outputs isabled; V I = or V CC, I O = I CC Additional supply current per input pin 2 V CC = 3V to 3.6V; One input at V CC -0.6V, Other inputs at V CC or µa ma NOTS: 1. All typical values are at V CC = 3.3V and T amb = 25 C. 2. This is the increase in supply current for each input at the specified voltage level other than V CC or. 3. This parameter is valid for any V CC between and 1.2V with a transition time of up to 10msec. From V CC = 1.2V to V CC = 3.3V ± 0.3V a transition time of 100µsec is permitted. This parameter is valid for T amb = 25 C only. 4. Unused pins at V CC or. 5. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power. 6. I CCZ is measured with outputs pulled to V CC or. 7. This is the bus hold overdrive current required to force the input to the opposite logic state Sep 23 6

8 AC CARACTRISTICS = ; t R = t F = 2.5ns; C = 50pF; R = 500Ω; T amb = 40 C to +85 C. IMITS SYMBO PARAMTR WAVFORM V CC = 3.3V ±0.3V V CC = 2.7V UNIT t P t P t P t P t PZ t PZ t PZ t PZ Propagation delay nx to nx Propagation delay n to nx Output enable time to igh and ow level Output disable time from igh and ow evel NOT: 1. All typical values are at V CC = 3.3V and T amb = 25 C. AC STUP RUIRMNTS = ; t R = t F = 2.5ns; C = 50pF; R = 500Ω; T amb = 40 C to +85 C MIN TYP 1 MAX MAX IMITS SYMBO PARAMTR WAVFORM V CC = 3.3V ±0.3V V CC = 2.7V UNIT t S () t S () t h () t h () t W () Setup time nx to n old time nx to n n pulse width igh MIN TYP MIN ns ns ns ns ns ns ns AC WAVFORMS For all waveforms, = 1.5V. n 2.7V nx ÉÉÉ ÉÉ 2.7V ÉÉÉÉÉ ÉÉÉ ÉÉÉÉÉÉ ÉÉÉÉ nx t w () t P t P V O n t s () t h () t s () t h () 2.7V V O SW00011 Waveform 1. Propagation elay, atch nable to Output, and atch nable Pulse Width NOT: The shaded areas indicate when the input is permitted to change for predictable output performance. Waveform 3. ata Setup and old Times SW V 2.7V nx t P t P no t PZ t PZ nx V O nx V O V O -0.3V V O SW00012 Waveform 2. Propagation elay for ata to Outputs SW00014 Waveform 4. 3-State Output nable time to igh evel and Output isable Time from igh evel 1999 Sep 23 7

9 2.7V no t PZ t PZ 3V nx V O +0.3V V O SW00015 Waveform 5. 3-State Output nable Time to ow evel and Output isable Time from ow evel TST CIRCUIT AN WAVFORMS V CC 6V t W 90% 90% AMP (V) PUS GNRATOR V IN.U.T. V OUT R OPN NGATIV PUS 10% 10% t T (t F ) t T (t R ) R T C Test Circuit for 3-State Outputs SWITC POSITION TST SWITC t PZ /t PZ t PZ /t PZ 6V t P /t P open R POSITIV PUS 90% 90% t T (t R ) t T (t F ) 10% t 10% W = 1.5V Input Pulse efinition AMP (V) FINITIONS R = oad resistor; see AC CARACTRISTICS for value. C = oad capacitance includes jig and probe capacitance; see AC CARACTRISTICS for value. R T = Termination resistance should be equal to Z OUT of pulse generators. INPUT PUS RUIRMNTS FAMIY Amplitude Rep. Rate t W t R t F 74VT16 2.7V 10Mz 500ns 2.5ns 2.5ns SW Sep 23 8

10 SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm SOT Sep 23 9

11 TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1mm SOT Sep 23 10

12 NOTS 1999 Sep 23 11

13 ata sheet status ata sheet status Product status efinition [1] Objective specification Preliminary specification Product specification evelopment ualification Production This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. efinitions Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. imiting values definition imiting values given are in accordance with the Absolute Maximum Rating System (IC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. xposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. isclaimers ife support These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 ast Arques Avenue P.O. Box 3409 Sunnyvale, California Telephone Copyright Philips lectronics North America Corporation 1999 All rights reserved. Printed in U.S.A. ate of release: ocument order number: Sep 23 12