74ABT16373B 74ABTH16373B 16-bit transparent latch (3-State)

Transcription

1 INTGRAT CIRCUITS Supersedes data of 1995 Aug 03 IC23 ata andbook 1998 Feb 27

2 FATURS 16-bit traparent latch Multiple V CC and GN pi minimize switching noise Power-up 3-State ive iertion/extraction permitted Power-up reset 3-State output buffers incorporates bus-hold data inputs which eliminate the need for external pull-up resistors to hold unused inputs Output capability: +64mA/ 32mA I CC 19 ma maximum atch-up protection exceeds 500mA per JC Std 17 S protection exceeds 2000V per MI ST 883 Method 3015 and 200V per Machine Model SCRIPTION The high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The device is a dual octal traparent latch coupled to two sets of eight 3-State output buffers. The two sectio of the device are controlled independently by nable (n) and Output nable (no) control gates. The data on each set of inputs are traferred to the latch outputs when the atch nable (n) input is igh. The latch remai traparent to the data inputs while n is igh, and stores the data that is present one setup time before the igh-to-ow enable traition. The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. ach active-ow Output nable (no) controls eight 3-State buffers independent of the latch operation. When no is ow, the latched or traparent data appears at the outputs. When no is igh, the outputs are in the igh-impedance OFF state, which mea they will neither drive nor load the bus. Two optio are available, which does not have the bus-hold feature and which incorporates the bus-hold feature. PIN CONFIGURATION 1O GN V CC GN GN V CC GN O GN V CC GN GN V CC GN SA00379 UICK RFRNC ATA SYMBO t P t P Propagation delay n to n PARAMTR CONITIONS T amb = 25 C; GN = 0V C = 50pF; V CC = 5V TYPICA C IN Input capacitance V I = 0V or V CC 4 pf C OUT Output capacitance V O = 0V or V CC ; 3-State 7 pf I CCZ Outputs disabled; V CC = 5.5V 500 µa uiescent supply current I CC Outputs low; V CC = 5.5V 8 ma ORRING INFORMATION PACKAGS TMPRATUR RANG OUTSI NORT AMRICA NORT AMRICA WG NUMBR 48-Pin SSOP type III 40 C to +85 C BT16373B SOT Pin TSSOP type II 40 C to +85 C GG BT16373B GG SOT Pin SSOP type III 40 C to +85 C B16373B SOT Pin TSSOP type II 40 C to +85 C GG B16373B GG SOT UNIT 1998 Feb

3 PIN SCRIPTION OGIC SYMBO (I/IC) PIN NUMBR SYMBO FUNCTION 47, 46, 44, 43, 41, 40, 38, 37, 36, 35, 33, 32, 30, 29, 27, 26 2, 3, 5, 6, 8, 9, 11, 12, 13, 14, 16, 17, 19, 20, 22, , 24 1O, 2O 48, 25 1, 2 4, 10, 15, 21, 28, 34, 39, 45 GN ata inputs ata outputs Output enable inputs (active-ow) nable inputs (active-igh) Ground (0V) 7, 18, 31, 42 V CC Positive supply voltage OGIC SYMBO O O 1 2O N C3 2N C SA O SA00044 OGIC IAGRAM n0 n1 n2 n3 n4 n5 n6 n7 n no n0 n1 n2 n3 n4 n5 n6 n7 SA Feb 27 3

4 FUNCTION TAB INPUTS INTRNA OUTPUTS no n nx RGISTR n0 n7 i h X NC NC old X n NC n = igh voltage level h = igh voltage level one set-up time prior to the igh-to-ow traition = ow voltage level l = ow voltage level one set-up time prior to the igh-to-ow traition NC= No change X = on t care Z = igh impedance off state = igh-to-ow traition Z Z nable and read register atch and read register isable outputs OPRATING MO ABSOUT MAXIMUM RATINGS 1, 2 SYMBO PARAMTR CONITIONS RATING UNIT V CC C supply voltage 0.5 to +7.0 V I IK C input diode current V I < 0 18 ma V I C input voltage to +7.0 V I OK C output diode current V O < 0 50 ma V OUT C output voltage 3 output in Off or igh state 0.5 to +5.5 V I OUT C output current output in ow state 128 output in igh state 64 ma T stg Storage temperature range 65 to 150 C NOTS: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditio beyond those indicated under recommended operating conditio is not implied. xposure to absolute-maximum-rated conditio for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150 C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RCOMMN OPRATING CONITIONS IMITS SYMBO PARAMTR MIN MAX UNIT V CC C supply voltage V V I Input voltage 0 V CC V V I igh-level input voltage 2.0 V V I ow-level Input voltage 0.8 V I O igh-level output current 32 ma I O ow-level output current 64 ma t/ v Input traition rise or fall rate 0 10 /V T amb Operating free-air temperature range C 1998 Feb 27 4

5 C CTRICA CARACTRISTICS SYMBO PARAMTR TST CONITIONS T amb = +25 C IMITS T amb = 40 C to +85 C MIN TYP MAX MIN MAX V IK Input clamp voltage V CC = 4.5V; I IK = 18mA V V CC = 4.5V; I O = 3mA; V I = V I or V I V V O igh-level output voltage V CC = 5.0V; I O = 3mA; V I = V I or V I V V CC = 4.5V; I O = 32mA; V I = V I or V I V V O ow-level output voltage V CC = 4.5V; I O = 64mA; V I = V I or V I V V RST Power-up output voltage 3 V CC = 5.5V; I O = 1mA; V I = GN or V CC V I I I I Input leakage current Input leakage current I Bus old current A inputs 6 O V CC = 5.5V; 5V; V I = V CC or GN ± ±1 ±1 µa V CC = 5.5V; V I = V CC or GN Control pi ±0.01 ±1 ±1 µa V CC = 5.5V; V I = V CC µa ata pi 5 V CC = 5.5V; V I = µa V CC = 4.5V; V I = 0.8V V CC = 4.5V; V I = 2.0V µa V CC = 5.5V; V I = 0 to 5.5V ±800 I OFF Power-off leakage current V CC = 0.0V; V O or V I 4.5V ±5.0 ±100 ±100 µa I PU /I P Power-up/down 3-State V CC = 2.1V; V O = 0.5V; V I = GN or V CC ; output current 4 V O = GN UNIT ±5.0 ±50 ±50 µa I OZ 3-State output igh current V CC = 5.5V; V O = 5.5V; V I = V I or V I µa I OZ 3-State output ow current V CC = 5.5V; V O = 0.0V; V I = V I or V I µa I O Output current 1 V CC = 5.5V; V O = 2.5V ma I CX Output igh leakage current V CC = 5.5V; V O = 5.5V; V I = GN or V CC µa I CC V CC = 5.5V; Outputs igh, V I = GN or V CC ma I CC uiescent supply current V CC = 5.5V; Outputs ow, V I = GN or V CC ma I CCZ I CC I CC Additional supply current per input pin 2 Additional supply current per input pin 2 V CC = 5.5V; Outputs 3-State; V I = GN or V CC ma V CC = 5.5V; one input at 3.4V, other inputs at V CC or GN V CC = 5.5V; one input at 3.4V, other inputs at V CC or GN µa ma NOTS: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power. 4. This parameter is valid for any V CC between 0V and 2.1V, with a traition time of up to 10msec. From V CC = 2.1 to V CC = 5V ± 10% a traition time of up to 100µsec is permitted. 5. Unused pi at V CC or GN. 6. This is the bus hold overdrive current required to force the input to the opposite logic state Feb 27 5

6 AC CARACTRISTICS GN = 0V, t R = t F = 2.5, C = 50pF, R = 500Ω IMITS SYMBO PARAMTR WAVFORM T amb = +25 C V CC = +5.0V T amb = 40 to +85 C V CC = +5.0V ±0.5V UNIT MIN TYP MAX MIN MAX t P t P Propagation delay nx to nx t P t P Propagation delay n to nx t PZ t PZ Output enable time to igh and ow level t PZ t PZ Output disable time from igh and ow level AC STUP RUIRMNTS GN = 0V, t R = t F = 2.5, C = 50pF, R = 500Ω IMITS SYMBO PARAMTR WAVFORM T amb = +25 C V CC = +5.0V T amb = 40 to +85 C V CC = +5.0V ±0.5V UNIT MIN TYP MIN t s () t s () Setup time, igh or ow nx to n t h () t h () old time, igh or ow nx to n t w () nable pulse width igh AC WAVFORMS For all waveforms, = 1.5V. n nx t w () t P t P t P t P nx nx SA00047 Waveform 1. Propagation elay, nable to Output, and nable Pulse Width Waveform 2. SA00048 Propagation elay for ata to Outputs 1998 Feb 27 6

7 nx ÉÉÉ V ÉÉ M ÉÉÉÉÉ ÉÉÉÉ ÉÉÉ ÉÉÉ no t s () t h () t s () t h () t PZ t PZ n nx V O + 0.3V NOT: The shaded areas indicate when the input is permitted to change for predictable output performance. V O Waveform 3. ata Setup and old Times SA00049 SA00051 Waveform 5. 3-State Output nable Time to ow evel and Output isable Time from ow evel no t PZ t PZ nx V O V O 0.3V 0V SA00050 Waveform 4. 3-State Output nable Time to igh evel and Output isable Time from igh evel TST CIRCUIT AN WAVFORM V CC t W 90% 90% AMP (V) PUS GNRATOR V IN.U.T. V OUT R 7.0V NGATIV PUS 10% 10% t T (t F ) 0V t T (t R ) R T Test Circuit for 3-State Outputs SWITC POSITION TST SWITC t PZ closed t PZ closed All other open C R POSITIV PUS 90% 90% t T (t R ) t T (t F ) 10% t 10% W = 1.5V Input Pulse efinition AMP (V) 0V FINITIONS R = oad resistor; see AC CARACTRISTICS for value. C = oad capacitance includes jig and probe capacitance; see AC CARACTRISTICS for value. R T = Termination resistance should be equal to Z OUT of pulse generators. INPUT PUS RUIRMNTS FAMIY Amplitude Rep. Rate t W t R t F 74ABT/16 3.0V 1Mz SA Feb 27 7

8 SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm SOT Feb 27 8

9 TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1mm SOT Feb 27 9

10 ata sheet status ata sheet status Product status efinition [1] Objective specification Preliminary specification Product specification evelopment ualification Production This data sheet contai the design target or goal specificatio for product development. Specification may change in any manner without notice. This data sheet contai preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contai final specificatio. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please coult the most recently issued datasheet before initiating or completing a design. efinitio Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. imiting values definition imiting values given are in accordance with the Absolute Maximum Rating System (IC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditio above those given in the Characteristics sectio of the specification is not implied. xposure to limiting values for extended periods may affect device reliability. Application information Applicatio that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applicatio will be suitable for the specified use without further testing or modification. isclaimers ife support These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applicatio do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no respoibility or liability for the use of any of these products, conveys no licee or title under any patent, copyright, or mask work right to these products, and makes no representatio or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 ast Arques Avenue P.O. Box 3409 Sunnyvale, California Telephone Copyright Philips lectronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code ate of release: ocument order number: yyyy mmm dd 10