QUAD/DUAL N-CHANNEL ENHANCEMENT MODE EPAD PRECISION MATCHED PAIR MOSFET ARRAY

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1 TM DVNCD INR DVICS, INC. QUD/DU N-CHNN NHNCMNT MOD PD PRCISION MTCHD PIR MOSFT RRY PD D8/D9 N B D VGS(th)= +.V GNR DSCRIPTION D8/D9 ar high prcision monolithic quad/dual nhancmnt mod N-Channl MOSFTS matchd at th factory using D s provn PD CMOS tchnology. Ths dvics ar intndd for low voltag, small signal applications. Th D8/D9 MOSFTS ar dsignd and uilt for xcptional dvic lctrical charactristics matching. Sinc ths dvics ar on th sam monolithic chip, thy also xhiit xcllnt tmpco tracking charactristics. Thy ar vrsatil circuit lmnts usful as dsign componnts for a road rang of analog applications, such as asic uilding locks for currnt sourcs, diffrntial amplifir input stags, transmission gats, and multiplxr applications. For most applications, connct th V+ pin to th most positiv voltag and th V- and IC pins to th most ngativ voltag in th systm. ll othr pins must hav voltags within ths voltag limits at all tims. Th D8/D9 dvics ar uilt for minimum offst voltag and diffrntial thrmal rspons, and thy ar suitd for switching and amplifying applications in <+.V to +V systms whr low input ias currnt, low input capacitanc and fast switching spd ar dsird, as ths dvics xhiit wll controlld turn-off and su-thrshold charactristics and can iasd and opratd in th su-thrshold rgion. Sinc ths ar MOSFT dvics, thy fatur vry larg (almost infinit) currnt gain in a low frquncy, or nar DC, oprating nvironmnt. Th D8/D9 ar suital for us in vry low oprating voltag or vry low powr (nanowatt), prcision applications which rquir vry high currnt gain, ta, such as currnt mirrors and currnt sourcs. Th high input impdanc and th high DC currnt gain of th Fild ffct Transistors rsult from xtrmly low currnt loss through th control gat. Th DC currnt gain is limitd y th gat input lakag currnt, which is spcifid at 3p at room tmpratur. For xampl, DC ta of th dvic at a drain currnt of 3m, input lakag currnt of 3p, and 5 C is 3m/3p =,,. FTURS nhancmnt-mod (normally off) Prcision Gat Thrshold Voltag of +.V Matchd MOSFT-to-MOSFT charactristics Tight lot-to-lot paramtric control ow input capacitanc V GS(th) match (V OS ) to mv High input impdanc Ω typical Positiv, zro, and ngativ V GS(th) tmpratur cofficint DC currnt gain > 8 ow input and output lakag currnts ORDRING INFORMTION ( suffix dnots lad-fr (RoHS)) Oprating Tmpratur Rang* C to +7 C C to +7 C 6-Pin 6-Pin 8-Pin 8-Pin SOIC Plastic Dip SOIC Plastic Dip Packag Packag Packag Packag D8SC D8PC D9S D9P PPICTIONS Ultra low powr (nanowatt) analog and digital circuits Ultra low oprating voltag (<.V) circuits Su-thrshold iasd and opratd circuits Prcision currnt mirrors and currnt sourcs Nano-mp currnt sourcs High impdanc rsistor simulators Capacitiv pros and snsor intrfacs Diffrntial amplifir input stags Discrt Voltag comparators and lvl shiftrs Voltag ias circuits Sampl and Hold circuits nalog and digital invrtrs Charg dtctors and charg intgrators Sourc followrs and High Impdanc uffrs Currnt multiplirs Discrt nalog switchs / multiplxrs PIN CONFIGURTION IC* D8 SC, PC PCKGS D9 S, P PCKGS *IC pins ar intrnally connctd. Connct to V- 6 G N D N 3 M M 5 S V + 3 V - 5 V - D N 6 M M 3 G N 7 IC* 8 V - V - 9 IC* G N D N S V - V- V - V- 7 3 M M 6 V- 5 8 IC* G N D N V + S 3 D N3 G N3 IC* IC* G N D N V- * Contact factory for industrial tmp. rang or usr-spcifid thrshold voltag valus. 6 dvancd inar Dvics, Inc., Vrs..3 of

2 BSOUT MXIMUM RTINGS Drain-Sourc voltag, VDS.6V Gat-Sourc voltag, VGS.6V Powr dissipation 5 mw Oprating tmpratur rang SC, PC, S, P C to +7 C Storag tmpratur rang -65 C to +5 C ad tmpratur, sconds +6 C CUTION: SD Snsitiv Dvic. Us static control procdurs in SD controlld nvironmnt. OPRTING CTRIC CHRCTRISTICS V+ = +5V V- = GND T = 5 C unlss othrwis spcifid D8/D9 Paramtr Symol Min Typ Max Unit Tst Conditions Gat Thrshold Voltag VGS(th).8.. V IDS = µ, VDS =.V Offst Voltag VOS mv VGS(th)-VGS(th) Offst VoltagTmpco TCVOS 5 µv/ C VDS = VDS Gat Thrshold Voltag TCVGS(th) -.7 mv/ C IDS = µ, VDS =.V Tmpco. IDS = µ, VDS =.V +.6 IDS = µ, VDS =.V Drain Sourc On Currnt IDS(ON). m VGS = +9.7V, VDS = +5V 3. VGS = +.V, VDS = +5V Forward Transconductanc GFS. mmho VGS = +.V VDS = +9.V Transconductanc Mismatch GFS.8 % Output Conductanc GOS 68 µmho VGS = +.V VDS = +9.V Drain Sourc On Rsistanc RDS(ON) 5 Ω VGS = +.V VDS = +.V Drain Sourc On Rsistanc RDS(ON).5 % Mismatch Drain Sourc Brakdown BVDSX V V- = VGS = -.8V Voltag IDS =.µ Drain Sourc akag Currnt IDS(OFF) p VGS = -.8V, VDS =+5V V- = -5V n T = 5 C Gat akag Currnt IGSS 3 p VGS = +5V, VDS = V n T =5 C Input Capacitanc CISS.5 pf Transfr Rvrs Capacitanc CRSS. pf Turn-on Dlay Tim ton ns V+ = 5V, R= 5KΩ Turn-off Dlay Tim toff ns V+ = 5V, R= 5KΩ Crosstalk 6 db f = KHz Nots: Consists of junction lakag currnts D8/D9, Vrs..3 dvancd inar Dvics of

3 PRFORMNC CHRCTRISTICS OF PD PRCISION MTCHD PIR MOSFT FMIY D8xx/D9xx/D8xx/D9xx ar monolithic quad/dual N-Channl MOSFTs matchd at th factory using D s provn PD CMOS tchnology. Ths dvics ar intndd for low voltag, small signal applications. D s lctrically Programmal nalog Dvic (PD) tchnology provids a family of matchd transistors with a rang of prcision thrshold valus. ll mmrs of this family ar dsignd and activly programmd for xcptional matching of dvic lctrical charactristics. Thrshold valus rang from -3.5V Dpltion to +3.5V nhancmnt dvics, including standard products spcifid at -3.5V, -.3V, -.V, +.V, +.V, +.V, +.8V, +.V, and +3.3V. D can also provid any customr dsird valu twn -3.5V and +3.5V. For all ths dvics, vn th dpltion and zro thrshold transistors, D PD tchnology nals th sam wll controlld turn-off, suthrshold, and low lakag charactristics as standard nhancmnt mod MOSFTs. With th dsign and activ programming, vn units from diffrnt atchs and diffrnt dats of manufactur hav wll matchd charactristics. s ths dvics ar on th sam monolithic chip, thy also xhiit xcllnt tmpco tracking. This PD MOSFT rray product family (PD MOSFT) is availal in th thr sparat catgoris, ach providing a distinctly diffrnt st of lctrical spcifications and charactristics. Th first catgory is th D8/D9 Zro-Thrshold mod PD MOSFTs. Th scond catgory is th D8xx/ D9xx nhancmnt mod PD MOSFTs. Th third catgory is th D8xx/D9xx dpltion mod PD MOSFTs. (Th suffix xx dnots thrshold voltag in.v stps, for xampl, xx = 8 dnots.8v). Th D8/D9 (quad/dual) ar PD MOSFTs in which th individual thrshold voltag of ach MOSFT is fixd at zro. Th thrshold voltag is dfind as I DS = V DS =.V whn th gat voltag V GS =.V. Zro thrshold dvics oprat in th nhancmnt rgion whn opratd aov thrshold voltag and currnt lvl (V GS >.V and I DS > µ) and suthrshold rgion whn opratd at or low thrshold voltag and currnt lvl (V GS <=.V and I DS < µ). This dvic, along with othr vry low thrshold voltag mmrs of th product family, constitut a class of PD MOSFTs that nal ultra low supply voltag opration and nanopowr typ of circuit dsigns, applical in ithr analog or digital circuits. Th D8xx/D9xx (quad/dual) product family faturs prcision matchd nhancmnt mod PD MOSFT dvics, which rquir a positiv ias voltag to turn on. Prcision thrshold valus such as +.V, +.8V, +.V ar offrd. No conductiv channl xists twn th sourc and drain at zro applid gat voltag for ths dvics, xcpt that th +.V vrsion has a suthrshold currnt at aout n. Th D8xx/D9xx (quad/dual) faturs dpltion mod PD MOSFTs, which ar normally-on dvics whn th gat ias voltag is at zro volts. Th dpltion mod thrshold voltag is at a ngativ voltag lvl at which th PD MOSFT turns off. Without a supply voltag and/or with V GS =.V th PD MOSFT dvic is alrady turnd on and xhiits a dfind and controlld on-rsistanc twn th sourc and drain trminals. Th D8xx/D9xx dpltion mod PD MOSFTs ar diffrnt from most othr typs of dpltion mod MOSFTs and crtain typs of JFTs in that thy do not xhiit high gat lakag currnts and channl/junction lakag currnts. Whn ngativ signal voltags ar applid to th gat trminal, th dsignr/usr can dpnd on th PD MOSFT dvic to controlld, modulatd and turnd off prcisly. Th dvic can modulatd and turnd-off undr th control of th gat voltag in th sam mannr as th nhancmnt mod PD MOSFT and th sam dvic quations apply. PD MOSFTs ar idal for minimum offst voltag and diffrntial thrmal rspons, and thy ar usd for switching and amplifying applications in low voltag (V to V or +/-.5V to +/-5V) or ultra low voltag (lss than V or +/-.5V) systms. Thy fatur low input ias currnt (lss than 3p max.), ultra low powr (microwatt) or Nanopowr (powr masurd in nanowatt) opration, low input capacitanc and fast switching spd. Ths dvics can usd whr a comination of ths charactristics ar dsird. KY PPICTION NVIRONMNT PD MOSFT rray products ar for circuit applications in on or mor of th following oprating nvironmnts: * ow voltag: V to V or +/-.5V to +/-5V * Ultra low voltag: lss than V or +/-.5V * ow powr: voltag x currnt = powr masurd in microwatt * Nanopowr: voltag x currnt = powr masurd in nanowatt * Prcision matching and tracking of two or mor MOSFTs CTRIC CHRCTRISTICS Th turn-on and turn-off lctrical charactristics of th PD MOSFT products ar shown in th Drain-Sourc On Currnt vs Drain-Sourc On Voltag and Drain-Sourc On Currnt vs Gat- Sourc Voltag graphs. ach graph shows th Drain-Sourc On Currnt vrsus Drain-Sourc On Voltag charactristics as a function of Gat-Sourc voltag in a diffrnt oprating rgion undr diffrnt ias conditions. s th thrshold voltag is tightly spcifid, th Drain-Sourc On Currnt at a givn gat input voltag is ttr controlld and mor prdictal whn compard to many othr typs of MOSFTs. PD MOSFTs hav similarly to a standard MOSFT, thrfor classic quations for a n-channl MOSFT applis to PD MOSFT as wll. Th Drain currnt in th linar rgion (V DS < V GS - V GS(th) ) is givn y: I DS = u. C OX. W/. [V GS - V GS(th) - V DS /]. V DS whr: u = Moility C OX = Capacitanc / unit ara of Gat lctrod V GS = Gat to Sourc voltag V GS(th) = Turn-on thrshold voltag V DS = Drain to Sourc voltag W = Channl width = Channl lngth In this rgion of opration th I DS valu is proportional to V DS valu and th dvic can usd as a gat-voltag controlld rsistor. For highr valus of V DS whr V DS >= V GS - V GS(th), th saturation currnt I DS is now givn y (approx.): I DS = u. C OX. W/. [V GS - V GS(th) ] D8/D9, Vrs..3 dvancd inar Dvics 3 of

4 SUB-THRSHOD RGION OF OPRTION PRFORMNC CHRCTRISTICS OF PD PRCISION MTCHD PIR MOSFT FMIY (cont.) ZRO TMPRTUR COFFICINT (ZTC) OPRTION ow voltag systms, namly thos oprating at 5V, 3.3V or lss, typically rquir MOSFTs that hav thrshold voltag of V or lss. Th thrshold, or turn-on, voltag of th MOSFT is a voltag low which th MOSFT conduction channl rapidly turns off. For analog dsigns, this thrshold voltag dirctly affcts th oprating signal voltag rang and th oprating ias currnt lvls. t or low thrshold voltag, an PD MOSFT xhiits a turnoff charactristic in an oprating rgion calld th suthrshold rgion. This is whn th PD MOSFT conduction channl rapidly turns off as a function of dcrasing applid gat voltag. Th conduction channl inducd y th gat voltag on th gat lctrod dcrass xponntially and causs th drain currnt to dcras xponntially. Howvr, th conduction channl dos not shut off aruptly with dcrasing gat voltag. Rathr, it dcrass at a fixd rat of approximatly 6mV pr dcad of drain currnt dcras. Thus, if th thrshold voltag is +.V, for xampl, th drain currnt is µ at V GS = +.V. t V GS = +.9V, th drain currnt would dcras to.µ. xtrapolating from this, th drain currnt is.µ (n) at V GS = -.3V, n at V GS = -.V, and so forth. This suthrshold charactristic xtnds all th way down to currnt lvls low n and is limitd y othr currnts such as junction lakag currnts. t a drain currnt to dclard zro currnt y th usr, th V GS voltag at that zro currnt can now stimatd. Not that using th aov xampl, with V GS(th) = +.V, th drain currnt still hovrs around n whn th gat is at zro volts, or ground. OW POWR ND NNOPOWR Whn supply voltags dcras, th powr consumption of a givn load rsistor dcrass as th squar of th supply voltag. So on of th nfits in rducing supply voltag is to rduc powr consumption. Whil dcrasing powr supply voltags and powr consumption go hand-in-hand with dcrasing usful C andwidth and at th sam tim incrass nois ffcts in th circuit, a circuit dsignr can mak th ncssary tradoffs and adjustmnts in any givn circuit dsign and ias th circuit accordingly. With PD MOSFTs, a circuit that prforms a spcific function can dsignd so that powr consumption can minimizd. In som cass, ths circuits oprat in low powr mod whr th powr consumd is masur in micro-watts. In othr cass, powr dissipation can rducd to th nano-watt rgion and still provid a usful and controlld circuit function opration. For an PD MOSFT in this product family, thr xist oprating points whr th various factors that caus th currnt to incras as a function of tmpratur alanc out thos that caus th currnt to dcras, thry cancling ach othr, and rsulting in nt tmpratur cofficint of nar zro. On of ths tmpratur stal oprating points is otaind y a ZTC voltag ias condition, which is.55v aov a thrshold voltag whn V GS = V DS, rsulting in a tmpratur stal currnt lvl of aout 68µ. For othr ZTC oprating points, s ZTC charactristics. PRFORMNC CHRCTRISTICS Prformanc charactristics of th PD MOSFT product family ar shown in th following graphs. In gnral, th thrshold voltag shift for ach mmr of th product family causs othr affctd lctrical charactristics to shift with an quivalnt linar shift in V GS(th) ias voltag. This linar shift in V GS causs th suthrshold I-V curvs to shift linarly as wll. ccordingly, th suthrshold oprating currnt can dtrmind y calculating th gat voltag drop rlativ to its thrshold voltag, V GS(th). R DS(ON) T V GS = GROUND Svral of th PD MOSFTs produc a fixd rsistanc whn thir gat is groundd. For D8, th drain currnt is µ at V DS =.V and V GS =.V. Thus, just y grounding th gat of th D8, a rsistor with R DS(ON) = ~KΩ is producd. Whn an D8 gat is groundd, th drain currnt I DS = V DS =.V, producing R DS(ON) = 5.KΩ. Similarly, D83 and D835 produc drain currnts of 77µ and 85µ, rspctivly, at V GS =.V, and R DS(ON) valus of.3kω and 5Ω, rspctivly. MTCHING CHRCTRISTICS ky nfit of using a matchd pair PD MOSFT is to maintain tmpratur tracking. In gnral, for PD MOSFT matchd pair dvics, on dvic of th matchd pair has gat lakag currnts, junction tmpratur ffcts, and drain currnt tmpratur cofficint as a function of ias voltag that cancl out similar ffcts of th othr dvic, rsulting in a tmpratur stal circuit. s mntiond arlir, this tmpratur staility can furthr nhancd y iasing th matchd-pairs at Zro Tmpco (ZTC) point, vn though that could rquir spcial circuit configuration and powr consumption dsign considration. D8/D9, Vrs..3 dvancd inar Dvics of

5 TYPIC PRFORMNC CHRCTRISTICS (m) 5 3 OUTPUT CHRCTRISTICS T = +5 C VGS - VGS(th) = +5V VGS - VGS(th) = +V VGS - VGS(th) = +3V VGS - VGS(th) = +V VGS - VGS(th) = +V DRIN-SOURC ON RSISTNC (Ω) DRIN-SOURC ON RSISTNC vs. T = +5 C VGS = VGS(th) + V VGS = VGS(th) + 6V 6 8 DRIN-SOURC ON VOTG (V) (µ) (m) 5 5 FORWRD TRNSFR CHRCTRISTICS T = +5 C V DS = +V V GS(th) = -.V V GS(th) =.V V GS(th) = +.V V GS(th) = -.3V V GS(th) = -3.5V V GS(th) = +.8V V GS(th) = +.V TRNSCONDUCTNC (m/v) TRNSCONDUCTNC vs. MBINT TMPRTUR GT-SOURC VOTG (V) MBINT TMPRTUR ( C) (n).. SUBTHRSHOD FORWRD TRNSFR CHRCTRISTICS - V GS(th) = -3.5V -3 T = +5 C V DS = +.V - V GS(th) = -.3V V GS(th) = -.V - V GS(th) =.V V GS(th) = +.V V GS(th) = +.8V V GS(th) = +.V (n).. SUBTHRSHOD FORWRD TRNSFR CHRCTRISTICS V DS = +.V Slop = ~ mv/dcad V GS(th) -.5 V GS(th) -. V GS(th) -.3 V GS(th) -. V GS(th) -. V GS(th) GT-SOURC VOTG (V) GT-SOURC VOTG (V) D8/D9, Vrs..3 dvancd inar Dvics 5 of

6 TYPIC PRFORMNC CHRCTRISTICS (cont.) (m) 5 3, BIS CURRNT vs. MBINT TMPRTUR -55 C -5 C C +7 C +5 C (µ) 5, BIS CURRNT vs. MBINT TMPRTUR Zro Tmpratur Cofficint (ZTC) +5 C -5 C VGS(th)- VGS(th) VGS(th)+ VGS(th)+ VGS(th)+3 VGS(th)+ V GS(th) V GS(th) +. V GS(th) +. V GS(th) +.6 V GS(th) +.8 V GS(th) +. GT- ND DRIN-SOURC VOTG (V GS = V DS ) (V) GT- ND DRIN-SOURC VOTG (V GS = V DS ) (V) (µ).. vs. DRIN-SOURC ON RSISTNC T = +5 C V GS = -.V to +5.V VDS = +.V VDS = +5V VDS = +V. VDS = +V DRIN-SOURC ON RSISTNC (KΩ) GT-SOURC VOTG (V) V GS(th) + V GS(th) +3 V GS(th) + V GS(th) + V GS(th) V GS(th) - GT-SOURC VOTG vs. V DS = R ON I DS(ON) D VGS S VDS IDS(ON) VDS = +.5V T = +5 C VDS = +.5V T = +5 C VDS = +5V T = +5 C VDS = +5V T = +5 C. (µ) 5 vs. OUTPUT VOTG OFFST VOTG vs. MBINT TMPRTUR (m) 3 T = +5 C VDS = +V VDS = +5V VDS = +V OFFST VOTG (mv) RPRSNTTIV UNITS V GS(th) V GS(th) + V GS(th) + V GS(th) +3 V GS(th) + V GS(th) OUTPUT VOTG (V) MBINT TMPRTUR ( C) D8/D9, Vrs..3 dvancd inar Dvics 6 of

7 TYPIC PRFORMNC CHRCTRISTICS (cont.) GT KG CURRNT vs. MBINT TMPRTUR GT SOURC VOTG vs. DRIN-SOURC ON RSISTNC GT KG CURRNT (p). IGSS GT-SOURC VOTG (V) VGS(th)+ VGS(th)+3 VGS(th)+ VGS(th)+ VGS(th) +5 C +5 C.V V DS 5.V VGS 6 D S VDS IDS(ON) 8 MBINT TMPRTUR ( C) DRIN-SOURC ON RSISTNC (KΩ) DRIN-GT DIOD CONNCTD VOTG TMPCO (mv/ C) DRIN-GT DIOD CONNCTD VOTG TMPCO vs C T +5 C (µ) TRNSCONDUCTNC (mω - ) TRNSFR CHRCTRISTICS T = +5 C V DS = +V V GS(th) = -.V GT-SOURC VOTG (V) V GS(th) = -3.5V V GS(th) = -.3V V GS(th) =.V V GS(th) = +.V V GS(th) = +.8V V GS(th) = +.V ZRO TMPRTUR COFFICINT CHRCTRISTICS SUBTHRSHOD CHRCTRISTICS GT-SOURC VOTG (V) V GS(th) = -3.5V V GS(th) = -.3V, -.V,.V, +.V, +.8V, +.V..5.. DRIN-SOURC ON VOTG (V) 5. GT-SOURC VOTG (V) VGS(th) = +.V T = +5 C VGS(th) = +.V T = +55 C. VGS(th) = +.V T = +5 C VGS(th) = +.V -.5 T = +55 C. (n) D8/D9, Vrs..3 dvancd inar Dvics 7 of

8 TYPIC PRFORMNC CHRCTRISTICS (cont.) TRNCONDUCTNC (mω - ) TRNCONDUCTNC vs. T = +5 C V DS = +V THRSHOD VOTG (V) V t =.V THRSHOD VOTG vs. MBINT TMPRTUR I DS = +µ V DS = +.V V t = +.V V t = +.V V t = +.8V V t = +.V (m) MBINT TMPRTUR ( C).3 NORMIZD SUBTHRSHOD CHRCTRISTICS RTIV TO GT THRSHOD VOTG. SUBTHRSHOD FORWRD TRNSFR CHRCTRISTICS GT-SOURC VOTG VGS - VGS(th) (V) C V DS = +.V +5 C THRSHOD VOTG (V) I DS = +µ V DS = +.V VGS(th) =.V VGS(th) = -.V VGS(th) = -.3V VGS(th) = -3.5V -.. (n) MBINT TMPRTUR ( C) D8/D9, Vrs..3 dvancd inar Dvics 8 of

9 SOIC-6 PCKG DRWING 6 Pin Plastic SOIC Packag Millimtrs Inchs Dim Min Max Min Max S (5 ) C D D BSC.5 BSC H S S (5 ) H C D8/D9, Vrs..3 dvancd inar Dvics 9 of

10 PDIP-6 PCKG DRWING 6 Pin Plastic DIP Packag Millimtrs Inchs Dim Min Max Min Max S D c D S c D8/D9, Vrs..3 dvancd inar Dvics of

11 SOIC-8 PCKG DRWING 8 Pin Plastic SOIC Packag Millimtrs Inchs S (5 ) D Dim C D-8 Min Max Min Max BSC.5 BSC H S S (5 ) H C D8/D9, Vrs..3 dvancd inar Dvics of

12 PDIP-8 PCKG DRWING 8 Pin Plastic DIP Packag Millimtrs Inchs Dim Min Max Min Max S D c D S c D8/D9, Vrs..3 dvancd inar Dvics of

DUAL P-CHANNEL MATCHED MOSFET PAIR

DUAL P-CHANNEL MATCHED MOSFET PAIR DVNCD INR DVICS, INC. D1102/D1102B D1102 DU P-CHNN MTCHD MOSFT PIR GNR DSCRIPTION Th D1102 is a monolithic dual P-channl matchd transistor pair intndd for a road rang of analog applications. Ths nhancmntmod