Experiment #9 BJT Dynamic Circuits

Transcription

1 Exprimnt #9 BJT Dynamic Circuits Jonathan Rodrick Hakan Durmus Scott Kilpatrick Burgss Introduction: In th last la, w larnd th point of iasing an analog circuit corrctly is so th activ dvics within th circuit oprat in a dsiral fashion (linarly) on signals that ntr th circuit. Ths signals ar prturations aout th ias point (or quiscnt point, a.k.a. Q-point); for instanc, you might ias your input port at 2, and thn add a 100 m pak-to-pak sin wav to this ias voltag. Idally, you would lik amplifirs to prfct linar dvics, maning th output signal is som multipl of th input signal, indpndnt of th input amplitud. Transistors ar normally non-linar dvics (rcall thir I- charactristics), so th output amplitud dos dpnd upon th input amplitud. Howvr, y suitaly rstricting th amplitud of th input swing (using a small signal ) and corrctly iasing th circuit (Q point), th rsultant output will show vry littl curvatur, maning that th non-linar circuit acts approximatly linar for small-signal dviations aout th ias point. In this la, dynamic circuits using BJTs will introducd. Onc a BJT is iasd in such a way that it oprats in a linar rgion, thn th small-signal BJT modl may usd for analysis and dsign of circuits that contain th transistor. This modl forms th asis for undrstanding th dynamic prformanc of svral commonly ncountrd circuits. Thory: Small-Signal Modl for th Bipolar Transistor Th small-signal modl for an NPN ipolar transistor is shown in figur 9.1. For th purposs of this la, th modls and thory prsntd will focus on th NPN Bipolar Junction Transistor. Th following modls also apply for th PNP transistor with th slight modification of: rvrsing th dirction of all controlld currnt sourcs and ranch currnts, and a rvrsal in polarity of all port and ranch voltags. r c µ r c c π + v _ i rπ βig m v r o r Figur 9.1 Small-signal modl for th ipolar transistor. 1

2 Not: Th small signal modl is just a tool that is usd to hlp circuit dsignrs analyz circuits utilizing BJTs. This tool is only valid if th transistor is oprating in its linar rang. Thrfor it should undrstood that whn using th small signal modl, that significant ffort has n mad to nsur that th signal ing procssd in th amplifir is not too larg, thus validating th small signal modl accuracy. A larg nough signal may caus th transistor to lav its linar opration if its signal chang has a magnitud larg nough to offst th st Q (iasing) point, thus causing signal distortion. Th ky lmnt in th small signal modl is th controlld currnt sourc, which can shown as dpnding on th intrnal as currnt i (or th intrnal as-mittr voltag v ). Th quantity g m is dfind as g m i v c 1 signifying how rsponsiv th collctor currnt is to changs in th driving voltag v. Th small signal modl accounts th various intrnal rsistancs associatd with ach trminal. Rsistor r is th small rsistanc associatd with th highly dopd mittr. Rsistor r is a distriutd, non-linar rsistanc, and thus hard to charactriz with a singl valu, ut it corrsponds to th rsistanc twn th as contact and that rgion of th as matrial lying undrnath th mittr. Likwis, rsistor r c is hard to charactriz with a singl valu, ut rprsnts th nt rsistanc twn th collctor contact and th ottom portion of th as matrial. Rsistor r π, known as th mittr-as junction diffusion rsistanc, is not a physical rsistanc (it is a mathmatical modl concivd from a Taylor sris xpansion of th as-mittr currnt, I BE, aout th Q-point) lik th prcding thr, ut rathr a dynamic quantity dfind as (9.1) r π i v 1 (9.2) It rprsnts how rsistant th input as currnt is to changs in th intrnal as-mittr voltag (i.., th voltag not including th voltag drop across r, rprsntd as v in th small signal modl). Th controlld sourc indicats how much th collctor currnt changs for a chang in as currnt (or quivalntly, as-mittr voltag). Lik r π, rsistor r o is a dynamic rsistanc and it is know as th forward Early rsistanc. It rprsnts th influnc of changs in collctor-mittr voltag on collctor currnt, and thus is calculatd y r o c 1 i v c (9.3) For high Early voltags, A E, this rsistanc is ngligil, and thus th collctor voltag has a ngligil impact on th currnt flowing out of th collctor contact. Th intrnal rsistanc dos hav profound ffcts on ovrall circuit prformanc. Larg as, collctor, and mittr rsistancs rduc circuit gain, diminish gain-andwidth product, and incras lctrical nois. Howvr, r, r, and r c ar invrsly proportional to th mittr-as junction injction ara and a pric is paid for incrasing th ara to lowr rsistancs. Incrasing th ara of th dvic rsults in largr parasitic capacitancs, so incrasing th siz of th transistor to rduc intrnal rsistanc rducs th circuit rspons spd. Powr consumption is also a trad-off. All intrnal rsistanc, particularly r, dcras monotonically with incrasing th as and collctor ias currnts, I B and I C rspctivly. In th world of wirlss and moil lctronics, w want th attris in our cll phon to last longr, so larg powr consumption in wirlss lctronics is avoidd. Wlcom to th wondrful world of circuit dsign, whr hindring constraints ar invrsly proportional to ach othr. Your jo as a circuit dsignr is to find a happy mdian that allows you to mt all th spcifications for your dsign. 2

3 Th small signal modl also accounts for intrnal parasitic capacitancs found with in th BJT. C µ rprsnts th dpltion capacitanc of th as-collctor junction. C π is composd of two parts: 1) a diffusion capacitanc givn y C π q v i c τ F τ F v and 2) a dpltion capacitanc, which is usually ngligil compard to th diffusion capacitanc whn th as-mittr junction is forward-iasd. To dvlop numrical valus for th symols in th small-signals modl, th dfining drivativs must valuatd symolically, thn valuatd aout th Q-point. With th ias quantitis spcifid, numrical valus may assignd to ach small-signal paramtr. Th small signal modl dos giv a circuit dsignr a good fl on how parasitic capacitanc affcts th prformanc of th circuit. A maturd circuit dsignr can y inspction s th limitations of any topology. For instanc, if andwidth is ing considrd a good circuit dsignr would avoid xposing any larg parasitic capacitanc to any larg impdancs (Rmmr th tim constant, in trms of frquncy, is invrsly proportional to RC). Canonic Clls of Linar BJT Tchnology. Th BJT Transistor has four asic topologis that ar uilding locks for mor complicatd circuit architctur. A singl BJT transistor may connctd in a diod, common mittr, common collctor, or common as configuration. A quick and simpl way to dtrmin th diffrnc twn th common as, collctor, or mittr is: First, dtrmin what trminals whr th input and output ar connctd. Thn, th particular canonic cll rcivs its nam from th trminal that is lftovr. For xampl, if you ar looking at th ac BJT configuration in figur 9.2, you will notic that th input is at th as, whil th output is locatd at th collctor. Hnc, th lftovr trminal is th mittr and this canonic cll is dmd a common mittr amplifir. g m (9.4) R l o R in R out R s s R Figur 9.2 An AC schmatic diagram of a common mittr amplifir. 3

4 Diod -Connctd Transistor. Th simplst canonic cll for th BJT is th diod-connctd transistor. Th collctor is tid to th as of th transistor, so it xhiits I- havior of a convntional PN junction diod. Figur 9.3 dpicts a transistor connctd this way and its small-signal quivalnt circuit. This modl assums th transistor is iasd in th linar rgion and lavs out th Q-point currnts. Th diod-connctd transistor rducs th numr of trminals of a typical BJT to two (th as and collctor ar now th sam trminal). This two trminal dvic may modld as a two trminal rsistor sn in figur 9.3. Using th low-frquncy small-signal modl of BJT (nglcting all capacitanc), th quivalnt rsistanc of th diod-connctd can found to qual R d. R d ( ro + rc ) ( r + rπ ) r + ro β 1+ r + r + r + r o c π (9.5) If r o >>r c +r +r π, thn quation 9.5 rducs to R d r r + r + 1+ β π (9.9) Figur 9.3(a) Diod-Connctd BJT and () its small-signal low frquncy quivalnt modl. Common Emittr Canonic Cll. Th common mittr amplifir was shown in figur 9.2. Rplacing th schmatic symol of a BJT in figur 9.2 with th small signal modl, on can calculat th gain, input impdanc and th output 4

5 impdanc. Figur 9.4 shows a common mittr amplifir utilizing th small signal modl. Assuming that r c is ngligil and ignoring th arly ffct (r o ) th gain, input rsistanc (R in ) and output rsistanc (R out ) may calculatd. r out r s r i r c o s rin r π βi r o r L R r x r Figur 9.4 A low frquncy common mittr canonic cll using th small signal modl. r r + r + β + 1)( r + r ) in ( x π (9.7) whr r x is th rsistanc sn y mittr. r out (9.8) and A v o s βrl rs + r + r + ( β + 1)( r + rx ) π (9.9) assuming β is larg, thn th gain rducs to A v o s rl r x (9.10) Th common mittr canonic cll is usd to achiv an invrting gain that is indpndnt of th transistor β. R in dpnds on what th valu of r x, ut sinc it is multiplid y β it is assumd not to too small. R out is vry larg. With a R in that can mad fairly larg and a R out is vry larg, th common mittr is not a vry idal voltag amplifir. Additional transistors can usd to nhanc prformanc, so that th common-mittr canonic can usd as a good voltag amplifir. 5

6 Common Collctor Canonic Cll. A common collctor canonic cll is shown in figur 9.5. Notic, th input nor th output of th canonic cll is connctd to th collctor of th transistor. R l r y R s s r x o R Figur 9.5 An ac schmatic of a common-collctor (a.k.a. an mittr followr) BJT canonic cll. Using th Small signal modl it can shown that th gain, input rsistanc and th output rsistanc ar th following A o s ( β + 1) r r + r + r + ( β + 1)( r s + r ) π x (9.11) In this xampl, choosing a small R th gain will rduc to A o s 1 (9.12) with r r + r + β + 1)( r + r ) in ( x π (9.13) and 6

7 r out r r + + r π + r ( β +1) y (9.14) Sinc th gain can dsignd narly qual on, r in can mad fairly larg, whil r out is small (du to it ing invrsly proportional to β) th common collctor canonic cll can dsignd to a dcnt voltag uffr. Sinc th common collctor is usually usd as a voltag uffr, it is somtims rfrrd to as a mittr followr du to th mittr following (or matching) th voltag that is connctd to th as. Common Bas Canonic Cll. Th common as canonic cll is shown in figur 9.9. Th input is a currnt sourc at th mittr, whil th output is takn at th collctor. Hnc, this is a common as configuration of a BJT. R l R 1 r y r out r in I s Figur 9.9 An AC common as BJT canonic cll. Using th small-signal modl it can shown that th currnt gain (A i ), r in, and r out ar th following. A i Io β α 1 I β + 1 s (9.15) r out (9.19) 7

8 r in r r + + r π + r ( β +1) y (9.17) Th common as has a currnt gain of aout on, a larg output rsistanc and a small input rsistanc. Thrfor, it is commonly usd as a currnt uffr. Common Emittr Amplifir Exampl In th prvious la, th common-mittr amplifir was iasd, ut no mntion was mad of why it is calld an amplifir. To answr this, w analyz th circuit in th prvious la, with a fw modifications. First, w nd to fd our input signal into th as, without th DC ias of th signal sourc and th commonmittr amplifir intrfring with ach othr. This is accomplishd y adding an AC coupling capacitor (C in ) to th input port, larg nough so that it will act lik an AC short at th frquncis at which w oprat, thus liminating any transfr of DC offsts. Scond, th amplifir nds to driv a rsistiv load which w don t want to upst our ias point, so w appnd anothr AC coupling capacitor (C out ) to th output port. Third, w rplac th transistor symol usd in th prvious la with th small-signal modl, lading to th following circuit: C in r c µ r c C out out i s R 1 R 2 r π c π βi r o R c R load r + R Figur 9.7 An AC common-mittr amplifir with rsistiv load for AC analysis (from xprimnt #5 figur 5.5) Assuming that w ar at low-nough frquncis that th parasitic capacitancs of th BJT don t affct our rsults, ut a high nough frquncy whr th coupling capacitors ar acting lik shorts, and furthr nglcting th Early, sourc, and intrnal mittr rsistancs, analysis of our modl lads to: v A v ( ) out β Rload Rc vs r + rπ + ( β + 1) R (9.18) With larg ta, this rducs to R R R A v load c (9.19) 8

9 ( ) a rathr simpl xprssion indpndnt of transistor paramtrs. As long as R load Rc > R, th transfr function has a magnitud gratr than 1, xplaining why th common-mittr is calld an amplifir. For th valus drivd in th prvious la, this rquirs that R load at last 375Ω for gain. Notic: th sourc rsistanc in this xampl was ignord, which is only valid in an idal world. This assumption causs th voltag division ffcts, which would normally caus y th iasing transistors R 1 and R 2, to ignord. Howvr, if on was to uild this circuit, any sourc rsistanc would caus ths two iasing rsistors to diminish th gain and thus would nd to accountd for during dsign. Conclusion: Th dynamic us of th BJT transistor was xplord in this xprimnt. Thr wr four fundamntal configurations covrd that ar known as th BJT canonical clls. Each canonic cll has diffrnt uniqu nficial charactristics as wll as limitations. Exprimnt #10 will dal with comining canonic clls to ovrcom th limitations inhrnt of a singl cll topology. It is vry crucial that th canonic clls ar wll undrstood as thy will giv a circuit dsignr th aility to rakdown and valuat complicatd circuit topologis virtually y inspction. 9

10 Rfrnc rading 1) John Choma, Jr. EE348 lctur nots. Univrsity of Southrn California. Spring ) David Johns & Kn Martin. Analog intgratd Circuit Dsign. John Wily & Sons, Inc., Nw York, ) Paul R. Gray & Rort G. Myr. Analysis and Dsign of Analog Intgratd Circuits. John Wily & Sons, Inc., Nw York,

11 Pr-la Exrciss 1) Givn th dfinitions of th small-signal paramtrs for th ipolar transistor, xprss r π, g m, and r o in trms of ias paramtrs (.g., collctor currnt, c, tc.). For a 1mA currnt and c of 3.2 as wll as an Early voltag of 200 and a Bta of 100, what ar th valus of r π, g m and r o? 2) Using figur 9.2, dsign an amplifir with a small signal gain magnitud of 7. Your jo is to choos th corrct rsistor valus that dtrmin th iasing point and corrct gain magnitud. Assum you ar using a 10kHz sin wav input with a magnitud of 50m (100m pak-to-pak). B sur that your signal dosn t driv th transistor out of th linar rgion. Your dsign must us a ground to 5 powr supply and not draw mor than 5mA through any givn ranch. rify your dsign using Spic. Is it possil to mt th rquird spcifications? If, not why not? 3) Nglcting any iasing issus, if th rsistors you us in th prvious prolm hav a tolranc of ±5%, what is th maximum rror th gain can xprinc du xclusivly to th tolrancs of th rsistors? 4) Driv th xprssions givn for th voltag gain, input rsistanc and output rsistanc for th common collctor circuit in figur ) Driv th xprssions givn for th currnt gain, input rsistanc and output rsistanc for th common as circuit in figur ) Driv th xprssions for th gain, input rsistanc, and output rsistanc for th low-frquncy common-mittr amplifir in figur ) Building upon th common-mittr iasing xampl picturd in figur 5.5 from xprimnt #5, what is th maximum gain that can achivd if th collctor currnt is fixd at 1mA and th as voltag is fixd at 1? Assum s is a 10kHz sin wav with a magnitud 50m (100m pak-to-pak) Can a gain of 50 achivd? Why or why not? Whil nsuring that th transistor nvr lavs linar opration, what is th maximum gain that can otaind? What R C valu givs you th maximum gain? Us SPICE to vrify your dsign and your suspnsions aout th maximum amount of gain that you can otain. Us th.op command to vrify th ias currnts and voltags for your circuit, and an.ac or.tran analysis to osrv th voltag gain. 8) Plac a larg (.g., 0.1 uf) capacitor across rsistor R in th prvious prolm. By inspction can you thoriz what happns to th gain and why? Do a SPICE simulation to confirm your rspons. 9) Exprss th output currnt of th Wilson currnt, figur 8.7, sourc in trms of th rfrnc currnt. Do not nglct as currnts in your analysis, and assum ach transistor has th sam β. Your final answr should in trms of th rfrnc currnt and β. (Hint: your final answr I I ( rror) should look lik out rf 1 2, whr th rror dpnds invrsly on β.) Do a small signal analysis to dtrmin a symolic xprssion for th output rsistanc of th Wilson currnt sourc. Assum vry transistor has idntical small-signal paramtrs. Assum you dsir you an output currnt of 1 ma, and your supply, cc, is 5. What is th approximat siz of th rquird rfrnc rsistor, R? 11

12 La Exrcis 1) Build th dsign you can up for qustion #2 in th prla. Masur th gain and th currnt through ach ranch and compar it to your spic rsults. Ar your rsults within 5% of spcifications givn in th prla? Prform any ncssary changs or twaking of rsistor valus to gt within 5% of spcs. Nxt, Chang th input signal lvl y ±9-dB. Dos th circuit still hav linarly? Why or why not? 2) Build th dsign which givs you th maximum achival gain that you dtrmind is possil from th common mittr amplifir in prolm #7 of th prla. rify it opration y comparing th magnitud of th input signal to th magnitud of th output signal. 3) Kp th circuit from th prvious prolm, ut rplac R C with a potntiomtr. ary th pot until you rach th maximum achival gain whil still maintaining a as-collctor rvrs ias to nsur linarity. Masur th valu of th potntiomtr that givs you th maximum possil gain. Dos this valu agr with what you drivd in qustion #7 of th prla? Why or why not? 4) Plac a larg (.g., 0.1 uf) capacitor across rsistor R of th last prolm. Using a function gnrator, swt th frquncy from 1kHz to 35kHz taking a masurmnt of th magnitud vry 1kHz. What dos adding th capacitor do to th gain? Dos this agr with your prdiction for qustion #8 in th prla? 5) Dsign th mittr followr in figur 9.5. Choos th DC voltag of th sourc, s, and th rsistor valus that ias th transistor with 1mA. Givn: cc 5, and s is a 10kHz sin wav input with a magnitud of 50m (100m pak-to-pak). Masur th gain of your circuit? Now slct rsistor valus that maximiz th output swing (ac signal magnitud). Did this affct th gain of your circuit? If so, y how much? 6) Add a 300Ω and th capacitor C D to th mittr followr, as sn in figur 9.8. Th capacitor, C D, should vry larg. What is th purpos of this capacitor? Estimat th gain and thn masur it. Dos driving this small rsistanc affct th ac gain of you circuit? Why is this nficial? Could you driv th sam small rsistanc with a common-mittr? Why or why not? cc R cc C D out s R R L Figur 9.8 7) Dsign th common mittr circuit with th mittr dgnration rsistor R. Using what you drivd in th pr-la, what ffct dos R hav on th prformanc of th circuit? Using a sourc dc offst of 1, us what you larnd in xprimnt #5 to ias this circuit so that it has an mittr currnt of 1mA. Choos a valu for R l, so that th output has maximum swing capaility: For 12

13 linarity purposs, don t lt th collctor-mittr voltag ( CE ) drop low 0.7 (It should larg than SAT 0.2, ut to saf, kp it aov BE. Masur th gain of this circuit. Can you otain a gain of 50 givn th sam supply voltag and currnt limitations? 8) Add a 300Ω and th capacitor C D to th common mittr, as sn in figur 9.9. Estimat th gain using what you drivd in th pr-la. Masur th gain. Is th gain th sam as masur in part (a)? Basd on your rsults, what is a asic limitation of th common mittr amplifir? 9) Build th common-mittr amplifir of Figur 9.2. Dtrmin an appropriat input signal lvl so that th output signal is larg nough to masur, ut small nough so that th transistor acts linarly. Dtrmin th low-frquncy gain at 10 khz. Dos it match rasonaly wll with your hand rsults? Chang Plac a 0.1µF capacitor across R and r-masur th AC gain (you may nd to adjust your input signal amplitud onc mor to nsur linar havior). 13