Summary. Computation Tree logic Vs. LTL. CTL at a glance. KM,s =! iff for every path " starting at s KM," =! COMPUTATION TREE LOGIC (CTL)

Size: px
Start display at page:

Download "Summary. Computation Tree logic Vs. LTL. CTL at a glance. KM,s =! iff for every path " starting at s KM," =! COMPUTATION TREE LOGIC (CTL)"

Transcription

1 Summary COMPUTATION TREE LOGIC (CTL) Slides by Alessandro Artale artale/ Some material (text, figures) displayed in these slides is courtesy of: M. Benerecetti, A. Cimatti, M. Fisher, F. Giunchiglia, M. Pistore, M. Roveri, R.Sebastiani. p. 1/35 p. 2/35 Computation Tree logic Vs. LTL LTL implicitly quantifies universally over paths. KM,s =! iff for every path " starting at s KM," =! Properties that assert the existence of a path cannot be expressed. In particular, properties which mix existential and universal path quantifiers cannot be expressed. The Computation Tree Logic, CTL, solves these problems! CTL explicitly introduces path quantifiers! CTL is the natural temporal logic interpreted over Branching Time Structures. CTL at a glance CTL is evaluated over branching-time structures (Trees). CTL explicitly introduces path quantifiers: All Paths: A Exists a Path: E. Every temporal operator (G), (F), (X), U (U) preceded by a path quantifier (A or E). Universal modalities: AF, AG, AX, AU The temporal formula is true in all the paths starting in the current state. Existential modalities: EF, EG, EX, EU The temporal formula is true in some path starting in the current state. p. 3/35 p. 4/35

2 Summary CTL: Syntax Countable set # of atomic propositions: p, q,... the set FORM of formulas is: $,% p $ $ % $ % AX$ AG$ AF$ $AU%) Intuition: EX$ EG$ EF$ $EU%) E A F there Exists a path in All paths sometime in the Future p. 5/35 G Globally in the future p. 6/35 CTL: Semantics We interpret our CTL temporal formulas over Kripke Models linearized as trees (e.g. AFdone).!done CTL: Semantics (Cont.) Let # be a set of atomic propositions. We interpret our CTL temporal formulas over Kripke Models:!done done KM = S,I,R,#,L!done done!done done done!done done done done The semantics of a temporal formula is provided by the satisfaction relation: Universal modalities (AF, AG, AX, AU): the temporal formula is true in all the paths starting in the current state. =: (KM S FORM) {true,false} Existential modalities (EF, EG, EX, EU): the temporal formula is true in some path starting in the current state. p. 7/35 p. 8/35

3 CTL Semantics: The Propositional Aspect We start by defining when an atomic proposition is true at a state/time s i KM, s i = p iff p L(s i ) (for p #) The semantics for the classical operators is as expected: KM, s i = $ iff KM, s i = $ KM, s i = $ % iff KM, s i = $ and KM, s i = % KM, s i = $ % iff KM, s i = $ or KM, s i = % KM, s i = $ % iff if KM, s i = $ then KM, s i = % KM, s i = KM, s i = CTL Semantics: Intuitions p. 9/35 CTL Semantics: The Temporal Aspect Temporal operators have the following semantics where "=(s i,s i+1,...) is a generic path outgoing from state s i inkm. KM,s i = AX$ iff " =(s i,s i+1,...) KM,s i+1 = $ KM,s i = EX$ iff " =(s i,s i+1,...) KM,s i+1 = $ KM,s i = AG$ iff " =(s i,s i+1,...) j i.km,s j = $ KM,s i = EG$ iff " =(s i,s i+1,...) j i.km,s j = $ KM,s i = AF$ iff " =(s i,s i+1,...) j i.km,s j = $ KM,s i = EF$ iff " =(s i,s i+1,...) j i.km,s j = $ KM,s i =($AU%) iff " =(s i,s i+1,...) j i.km,s j = % and i k < j : M,s k = $ KM,s i = $EU%) iff " =(s i,s i+1,...) j i.km,s j = % and CTL Semantics: Intuitions (Cont.) i k < j : KM,s k = $ p. 10/35 CTL is given by the standard boolean logic enhanced with temporal operators. Necessarily Next. AX$ is true in s t iff $ is true in every successor state s t+1 Possibly Next. EX$ is true in s t iff $ is true in one successor state s t+1 Necessarily in the future (or Inevitably ). AF$ is true in s t iff $ is inevitably true in some s t with t t Possibly in the future (or Possibly ). EF$ is true in s t iff $ may be true in some s t with t t Globally (or always ). AG$ is true in s t iff $ is true in all s t with t t Possibly henceforth. EG$ is true in s t iff $ is possibly true henceforth Necessarily Until. ($AU%) is true in s t iff necessarily $ holds until % holds. Possibly Until. ($EU%) is true in s t iff possibly $ holds until % holds. p. 11/35 p. 12/35

4 CTL Semantics: Intuitions (Cont.) A Complete Set of CTL Operators finally P globally P next P P until q AFP AGP AXP A[ P U q ] All CTL operators can be expressed via: EX,EG,EU AX$ EX $ AF$ EG $ EF$ ( EU$) AG$ EF $ ( EU $) ($AU%) EG % ( %EU( $ %)) EFP EGP EXP E[ P U q ] p. 13/35 p. 14/35 Summary Safety Properties Safety: something bad will not happen Typical examples: AG (reactor_temp > 1000) AG (one_way AXother_way) AG ((x = 0) AXAXAX(y = z/x)) and so on... Usually: AG... p. 15/35 p. 16/35

5 Liveness Properties Fairness Properties Liveness: something good will happen Typical examples: AFrich AF(x > 5) AG(start AFterminate) and so on... Usually: AF... Often only really useful when scheduling processes, responding to messages, etc. Fairness: something is successful/allocated infinitely often Typical example: AG(AFenabled) Usually: AGAF... p. 17/35 p. 18/35 Summary The CTL Model Checking Problem The CTL Model Checking Problem is formulated as: KM =! Check if KM,s 0 =!, for every initial state, s 0, of the Kripke structure KM. p. 19/35 p. 20/35

6 Example 1: Mutual Exclusion (Safety) Example 1: Mutual Exclusion (Safety) KM = AG (C 1 C 2 )? KM = AG (C 1 C 2 )? YES: There is no reachable state in which (C 1 C 2 ) holds! (Same as the (C 1 C 2 ) in LTL.) p. 21/35 p. 21/35 Example 2: Liveness Example 2: Liveness KM = AG(T 1 AFC 1 )? KM = AG(T 1 AFC 1 )? YES: every path starting from each state where T 1 holds passes through a state where C 1 holds. (Same as (T 1 C 1 ) in LTL) p. 22/35 p. 22/35

7 Example 3: Fairness Example 3: Fairness KM = AGAFC 1? KM = AGAFC 1? NO: e.g., in the initial state, there is the blue cyclic path in which C 1 never holds! (Same as C 1 in LTL) p. 23/35 p. 23/35 Example 4: Non-Blocking Example 4: Non-Blocking KM = AG(N 1 EFT 1 )? KM = AG(N 1 EFT 1 )? YES: from each state where N 1 holds there is a path leading to a state where T 1 holds. (No corresponding LTL formulas) p. 24/35 p. 24/35

8 Summary LTL Vs. CTL: Expressiveness Many CTL formulas cannot be expressed in LTL (e.g., those containing paths quantified existentially) E.g., AG(N 1 EFT 1 ) Many LTL formulas cannot be expressed in CTL E.g., T 1 C 1 (Strong Fairness in LTL) i.e, formulas that select a range of paths with a property ( p q Vs. AG(p AFq)) Some formluas can be expressed both in LTL and in CTL (typically LTL formulas with operators of nesting depth 1) E.g., (C 1 C 2 ), C 1, (T 1 C 1 ), C 1 p. 25/35 p. 26/35 LTL Vs. CTL: Expressiveness (Cont.) Summary CTL and LTL have incomparable expressive power. The choice between LTL and CTL depends on the application and the personal preferences. LTL CTL p. 27/35 p. 28/35

9 The Computation Tree Logic CTL* CTL*: Syntax CTL* is a logic that combines the expressive power of LTL and CTL. Temporal operators can be applied without any constraints. A(X$ XX$). Along all paths, $ is true in the next state or the next two steps. E(GF$). There is a path along which $ is infinitely often true. Countable set # of atomic propositions: p, q,... we distinguish between States Formulas (evaluated on states): $,% p $ $ % $ % A& E& and Path Formulas (evaluated on paths): &,' $ & & ' & ' X& G& F& (&U') The set of CTL* formulas FORM is the set of state formulas. p. 29/35 p. 30/35 CTL* Semantics: State Formulas We start by defining when an atomic proposition is true at a state s 0 KM, s 0 = p iff p L(s 0 ) (for p #) The semantics for State Formulas is the following where " =(s 0,s 1,...) is a generic path outgoing from state s 0 : KM, s 0 = $ iff KM, s 0 = $ KM, s 0 = $ % iff KM, s 0 = $ and KM, s 0 = % KM, s 0 = $ % iff KM, s 0 = $ or KM, s 0 = % KM, s 0 = E& iff " =(s 0,s 1,...)such that KM," = & KM, s 0 = A& iff " =(s 0,s 1,...)then KM," = & CTL* Semantics: Path Formulas The semantics for Path Formulas is the following where " =(s 0,s 1,...) is a generic path outgoing from state s 0 and " i denotes the suffix path (s i,s i+1,...): KM, " = $ iff KM, s 0 = $ KM, " = & iff KM, " = & KM, " = & ' iff KM, " = & and KM, " = ' KM, " = & ' iff KM, " = & or KM, " = ' KM, " = F& iff i 0such that KM," i = & KM, " = G& iff i 0then KM," i = & KM, " = X& iff KM," 1 = & KM, " = &U' iff i 0such that KM," i = ' and j.(0 j i) then KM," j = & p. 31/35 p. 32/35

10 CTLs Vs LTL Vs CTL: Expressiveness CTL* subsumes both CTL and LTL $ in CTL = $ in CTL* (e.g., AG(N 1 EFT 1 )) $ in LTL = A$ in CTL* (e.g., A(GFT 1 GFC 1 )) LTL CTL CTL* (e.g., E(GFp GFq)) CTL* Vs LTL Vs CTL: Complexity The following Table shows the Computational Complexity of checking Satisbiability Logic Complexity LTL CTL* CTL LTL CTL CTL* PSpace-Complete ExpTime-Complete 2ExpTime-Complete p. 33/35 p. 34/35 CTL* Vs LTL Vs CTL: Complexity (Cont.) The following Table shows the Computational Complexity of Model Checking (M.C.) Since M.C. has 2 inputs the model, M, and the formula, $ we give two complexity measures. Logic Complexity w.r.t. $ Complexity w.r.t. M LTL PSpace-Complete P (linear) CTL P-Complete P (linear) CTL* PSpace-Complete P (linear) p. 35/35

FORMAL METHODS LECTURE IV: COMPUTATION TREE LOGIC (CTL)

FORMAL METHODS LECTURE IV: COMPUTATION TREE LOGIC (CTL) Alessandro Artale (FM First Semester 2007/2008) p. 1/37 FORMAL METHODS LECTURE IV: COMPUTATION TREE LOGIC (CTL) Alessandro Artale Faculty of Computer Science Free University of Bolzano artale@inf.unibz.it

More information

FORMAL METHODS LECTURE III: LINEAR TEMPORAL LOGIC

FORMAL METHODS LECTURE III: LINEAR TEMPORAL LOGIC Alessandro Artale (FM First Semester 2007/2008) p. 1/39 FORMAL METHODS LECTURE III: LINEAR TEMPORAL LOGIC Alessandro Artale Faculty of Computer Science Free University of Bolzano artale@inf.unibz.it http://www.inf.unibz.it/

More information

Computation Tree Logic

Computation Tree Logic Computation Tree Logic Computation tree logic (CTL) is a branching-time logic that includes the propositional connectives as well as temporal connectives AX, EX, AU, EU, AG, EG, AF, and EF. The syntax

More information

Lecture 16: Computation Tree Logic (CTL)

Lecture 16: Computation Tree Logic (CTL) Lecture 16: Computation Tree Logic (CTL) 1 Programme for the upcoming lectures Introducing CTL Basic Algorithms for CTL CTL and Fairness; computing strongly connected components Basic Decision Diagrams

More information

FORMAL METHODS LECTURE V: CTL MODEL CHECKING

FORMAL METHODS LECTURE V: CTL MODEL CHECKING FORMAL METHODS LECTURE V: CTL MODEL CHECKING Alessandro Artale Faculty of Computer Science Free University of Bolzano Room 2.03 artale@inf.unibz.it http://www.inf.unibz.it/ artale/ Some material (text,

More information

Temporal Logic Model Checking

Temporal Logic Model Checking 18 Feb, 2009 Thomas Wahl, Oxford University Temporal Logic Model Checking 1 Temporal Logic Model Checking Thomas Wahl Computing Laboratory, Oxford University 18 Feb, 2009 Thomas Wahl, Oxford University

More information

Model for reactive systems/software

Model for reactive systems/software Temporal Logics CS 5219 Abhik Roychoudhury National University of Singapore The big picture Software/ Sys. to be built (Dream) Properties to Satisfy (caution) Today s lecture System Model (Rough Idea)

More information

Guest lecturer: Prof. Mark Reynolds, The University of Western Australia

Guest lecturer: Prof. Mark Reynolds, The University of Western Australia Università degli studi di Udine Corso per il dottorato di ricerca: Temporal Logics: Satisfiability Checking, Model Checking, and Synthesis January 2017 Lecture 01, Part 02: Temporal Logics Guest lecturer:

More information

Verification. Arijit Mondal. Dept. of Computer Science & Engineering Indian Institute of Technology Patna

Verification. Arijit Mondal. Dept. of Computer Science & Engineering Indian Institute of Technology Patna IIT Patna 1 Verification Arijit Mondal Dept. of Computer Science & Engineering Indian Institute of Technology Patna arijit@iitp.ac.in Introduction The goal of verification To ensure 100% correct in functionality

More information

Computation Tree Logic (CTL)

Computation Tree Logic (CTL) Computation Tree Logic (CTL) Fazle Rabbi University of Oslo, Oslo, Norway Bergen University College, Bergen, Norway fazlr@student.matnat.uio.no, Fazle.Rabbi@hib.no May 30, 2015 Fazle Rabbi et al. (UiO,

More information

Temporal Logic. M φ. Outline. Why not standard logic? What is temporal logic? LTL CTL* CTL Fairness. Ralf Huuck. Kripke Structure

Temporal Logic. M φ. Outline. Why not standard logic? What is temporal logic? LTL CTL* CTL Fairness. Ralf Huuck. Kripke Structure Outline Temporal Logic Ralf Huuck Why not standard logic? What is temporal logic? LTL CTL* CTL Fairness Model Checking Problem model, program? M φ satisfies, Implements, refines property, specification

More information

Chapter 4: Computation tree logic

Chapter 4: Computation tree logic INFOF412 Formal verification of computer systems Chapter 4: Computation tree logic Mickael Randour Formal Methods and Verification group Computer Science Department, ULB March 2017 1 CTL: a specification

More information

Model checking (III)

Model checking (III) Theory and Algorithms Model checking (III) Alternatives andextensions Rafael Ramirez rafael@iua.upf.es Trimester1, Oct2003 Slide 9.1 Logics for reactive systems The are many specification languages for

More information

Finite-State Model Checking

Finite-State Model Checking EECS 219C: Computer-Aided Verification Intro. to Model Checking: Models and Properties Sanjit A. Seshia EECS, UC Berkeley Finite-State Model Checking G(p X q) Temporal logic q p FSM Model Checker Yes,

More information

Model Checking I. What are LTL and CTL? dack. and. dreq. and. q0bar

Model Checking I. What are LTL and CTL? dack. and. dreq. and. q0bar Model Checking I What are LTL and CTL? q0 or and dack dreq q0bar and 1 View circuit as a transition system (dreq, q0, dack) (dreq, q0, dack ) q0 = dreq and dack = dreq & (q0 + ( q0 & dack)) q0 or and D

More information

NPTEL Phase-II Video course on. Design Verification and Test of. Dr. Santosh Biswas Dr. Jatindra Kumar Deka IIT Guwahati

NPTEL Phase-II Video course on. Design Verification and Test of. Dr. Santosh Biswas Dr. Jatindra Kumar Deka IIT Guwahati NPTEL Phase-II Video course on Design Verification and Test of Digital VLSI Designs Dr. Santosh Biswas Dr. Jatindra Kumar Deka IIT Guwahati Module IV: Temporal Logic Lecture I: Introduction to formal methods

More information

Model Checking with CTL. Presented by Jason Simas

Model Checking with CTL. Presented by Jason Simas Model Checking with CTL Presented by Jason Simas Model Checking with CTL Based Upon: Logic in Computer Science. Huth and Ryan. 2000. (148-215) Model Checking. Clarke, Grumberg and Peled. 1999. (1-26) Content

More information

Overview. overview / 357

Overview. overview / 357 Overview overview6.1 Introduction Modelling parallel systems Linear Time Properties Regular Properties Linear Temporal Logic (LTL) Computation Tree Logic syntax and semantics of CTL expressiveness of CTL

More information

Formal Methods Lecture VII Symbolic Model Checking

Formal Methods Lecture VII Symbolic Model Checking Formal Methods Lecture VII Symbolic Model Checking Faculty of Computer Science Free University of Bozen-Bolzano artale@inf.unibz.it http://www.inf.unibz.it/ artale/ Academic Year: 2006/07 Some material

More information

Temporal Logic. Stavros Tripakis University of California, Berkeley. We have designed a system. We want to check that it is correct.

Temporal Logic. Stavros Tripakis University of California, Berkeley. We have designed a system. We want to check that it is correct. EE 244: Fundamental Algorithms for System Modeling, Analysis, and Optimization Fall 2016 Temporal logic Stavros Tripakis University of California, Berkeley Stavros Tripakis (UC Berkeley) EE 244, Fall 2016

More information

LTL and CTL. Lecture Notes by Dhananjay Raju

LTL and CTL. Lecture Notes by Dhananjay Raju LTL and CTL Lecture Notes by Dhananjay Raju draju@cs.utexas.edu 1 Linear Temporal Logic: LTL Temporal logics are a convenient way to formalise and verify properties of reactive systems. LTL is an infinite

More information

Model checking the basic modalities of CTL with Description Logic

Model checking the basic modalities of CTL with Description Logic Model checking the basic modalities of CTL with Description Logic Shoham Ben-David Richard Trefler Grant Weddell David R. Cheriton School of Computer Science University of Waterloo Abstract. Model checking

More information

MODEL CHECKING. Arie Gurfinkel

MODEL CHECKING. Arie Gurfinkel 1 MODEL CHECKING Arie Gurfinkel 2 Overview Kripke structures as models of computation CTL, LTL and property patterns CTL model-checking and counterexample generation State of the Art Model-Checkers 3 SW/HW

More information

Model Checking: An Introduction

Model Checking: An Introduction Model Checking: An Introduction Meeting 3, CSCI 5535, Spring 2013 Announcements Homework 0 ( Preliminaries ) out, due Friday Saturday This Week Dive into research motivating CSCI 5535 Next Week Begin foundations

More information

3-Valued Abstraction-Refinement

3-Valued Abstraction-Refinement 3-Valued Abstraction-Refinement Sharon Shoham Academic College of Tel-Aviv Yaffo 1 Model Checking An efficient procedure that receives: A finite-state model describing a system A temporal logic formula

More information

Model Checking. Temporal Logic. Fifth International Symposium in Programming, volume. of concurrent systems in CESAR. In Proceedings of the

Model Checking. Temporal Logic. Fifth International Symposium in Programming, volume. of concurrent systems in CESAR. In Proceedings of the Sérgio Campos, Edmund Why? Advantages: No proofs Fast Counter-examples No problem with partial specifications can easily express many concurrency properties Main Disadvantage: State Explosion Problem Too

More information

Chapter 6: Computation Tree Logic

Chapter 6: Computation Tree Logic Chapter 6: Computation Tree Logic Prof. Ali Movaghar Verification of Reactive Systems Outline We introduce Computation Tree Logic (CTL), a branching temporal logic for specifying system properties. A comparison

More information

CTL Model checking. 1. finite number of processes, each having a finite number of finite-valued variables. Model-Checking

CTL Model checking. 1. finite number of processes, each having a finite number of finite-valued variables. Model-Checking CTL Model checking Assumptions:. finite number of processes, each having a finite number of finite-valued variables.. finite length of CTL formula Problem:Determine whether formula f 0 is true in a finite

More information

Computation Tree Logic

Computation Tree Logic Chapter 6 Computation Tree Logic Pnueli [88] has introduced linear temporal logic to the computer science community for the specification and verification of reactive systems. In Chapter 3 we have treated

More information

Double Header. Model Checking. Model Checking. Overarching Plan. Take-Home Message. Spoiler Space. Topic: (Generic) Model Checking

Double Header. Model Checking. Model Checking. Overarching Plan. Take-Home Message. Spoiler Space. Topic: (Generic) Model Checking Double Header Model Checking #1 Two Lectures Model Checking SoftwareModel Checking SLAM and BLAST Flying Boxes It is traditional to describe this stuff (especially SLAM and BLAST) with high-gloss animation

More information

Computation Tree Logic

Computation Tree Logic Computation Tree Logic Hao Zheng Department of Computer Science and Engineering University of South Florida Tampa, FL 33620 Email: zheng@cse.usf.edu Phone: (813)974-4757 Fax: (813)974-5456 Hao Zheng (CSE,

More information

Verification Using Temporal Logic

Verification Using Temporal Logic CMSC 630 February 25, 2015 1 Verification Using Temporal Logic Sources: E.M. Clarke, O. Grumberg and D. Peled. Model Checking. MIT Press, Cambridge, 2000. E.A. Emerson. Temporal and Modal Logic. Chapter

More information

Probabilistic Model Checking Michaelmas Term Dr. Dave Parker. Department of Computer Science University of Oxford

Probabilistic Model Checking Michaelmas Term Dr. Dave Parker. Department of Computer Science University of Oxford Probabilistic Model Checking Michaelmas Term 2011 Dr. Dave Parker Department of Computer Science University of Oxford Overview Temporal logic Non-probabilistic temporal logic CTL Probabilistic temporal

More information

What is Temporal Logic? The Basic Paradigm. The Idea of Temporal Logic. Formulas

What is Temporal Logic? The Basic Paradigm. The Idea of Temporal Logic. Formulas What is Temporal Logic? A logical formalism to describe sequences of any kind. We use it to describe state sequences. An automaton describes the actions of a system, a temporal logic formula describes

More information

Computation Tree Logic (CTL) & Basic Model Checking Algorithms

Computation Tree Logic (CTL) & Basic Model Checking Algorithms Computation Tree Logic (CTL) & Basic Model Checking Algorithms Martin Fränzle Carl von Ossietzky Universität Dpt. of Computing Science Res. Grp. Hybride Systeme Oldenburg, Germany 02917: CTL & Model Checking

More information

CS357: CTL Model Checking (two lectures worth) David Dill

CS357: CTL Model Checking (two lectures worth) David Dill CS357: CTL Model Checking (two lectures worth) David Dill 1 CTL CTL = Computation Tree Logic It is a propositional temporal logic temporal logic extended to properties of events over time. CTL is a branching

More information

A brief history of model checking. Ken McMillan Cadence Berkeley Labs

A brief history of model checking. Ken McMillan Cadence Berkeley Labs A brief history of model checking Ken McMillan Cadence Berkeley Labs mcmillan@cadence.com Outline Part I -- Introduction to model checking Automatic formal verification of finite-state systems Applications

More information

Model Checking I. What are LTL and CTL? dack. and. dreq. and. q0bar

Model Checking I. What are LTL and CTL? dack. and. dreq. and. q0bar Model Checking I What are LTL and CTL? and dack q0 or D dreq D q0bar and 1 View circuit as a transition system (dreq, q0, dack) (dreq, q0, dack ) q0 = dreq dack = dreq and (q0 or (not q0 and dack)) q0

More information

MODEL-CHECKING IN DENSE REAL-TIME SHANT HARUTUNIAN

MODEL-CHECKING IN DENSE REAL-TIME SHANT HARUTUNIAN MODEL-CHECKING IN DENSE REAL-TIME SHANT HARUTUNIAN 1. Introduction These slides are for a talk based on the paper Model-Checking in Dense Real- Time, by Rajeev Alur, Costas Courcoubetis, and David Dill.

More information

Introduction to Temporal Logic. The purpose of temporal logics is to specify properties of dynamic systems. These can be either

Introduction to Temporal Logic. The purpose of temporal logics is to specify properties of dynamic systems. These can be either Introduction to Temporal Logic The purpose of temporal logics is to specify properties of dynamic systems. These can be either Desired properites. Often liveness properties like In every infinite run action

More information

Scuola Estiva di Logica, Gargnano, 31 agosto - 6 settembre 2008 LOGIC AT WORK. Formal Verification of Complex Systems via. Symbolic Model Checking

Scuola Estiva di Logica, Gargnano, 31 agosto - 6 settembre 2008 LOGIC AT WORK. Formal Verification of Complex Systems via. Symbolic Model Checking 1. Logic at Work c Roberto Sebastiani, 2008 Scuola Estiva di Logica, Gargnano, 31 agosto - 6 settembre 2008 LOGIC AT WORK Formal Verification of Complex Systems via Symbolic Model Checking Roberto Sebastiani

More information

SMV the Symbolic Model Verifier. Example: the alternating bit protocol. LTL Linear Time temporal Logic

SMV the Symbolic Model Verifier. Example: the alternating bit protocol. LTL Linear Time temporal Logic Model Checking (I) SMV the Symbolic Model Verifier Example: the alternating bit protocol LTL Linear Time temporal Logic CTL Fixed Points Correctness Slide 1 SMV - Symbolic Model Verifier SMV - Symbolic

More information

An Introduction to Temporal Logics

An Introduction to Temporal Logics An Introduction to Temporal Logics c 2001,2004 M. Lawford Outline Motivation: Dining Philosophers Safety, Liveness, Fairness & Justice Kripke structures, LTS, SELTS, and Paths Linear Temporal Logic Branching

More information

3. Temporal Logics and Model Checking

3. Temporal Logics and Model Checking 3. Temporal Logics and Model Checking Page Temporal Logics 3.2 Linear Temporal Logic (PLTL) 3.4 Branching Time Temporal Logic (BTTL) 3.8 Computation Tree Logic (CTL) 3.9 Linear vs. Branching Time TL 3.16

More information

Computation Tree Logic (CTL)

Computation Tree Logic (CTL) Computation Tree Logic (CTL) 1 CTL Syntax P - a set of atomic propositions, every p P is a CTL formula. f, g, CTL formulae, then so are f, f g, EXf, A[fUg], E[fUg] E, A path quantifiers, X, U, G, F temporal

More information

Topics in Verification AZADEH FARZAN FALL 2017

Topics in Verification AZADEH FARZAN FALL 2017 Topics in Verification AZADEH FARZAN FALL 2017 Last time LTL Syntax ϕ ::= true a ϕ 1 ϕ 2 ϕ ϕ ϕ 1 U ϕ 2 a AP. ϕ def = trueu ϕ ϕ def = ϕ g intuitive meaning of and is obt Limitations of LTL pay pay τ τ soda

More information

Introduction to Model Checking. Debdeep Mukhopadhyay IIT Madras

Introduction to Model Checking. Debdeep Mukhopadhyay IIT Madras Introduction to Model Checking Debdeep Mukhopadhyay IIT Madras How good can you fight bugs? Comprising of three parts Formal Verification techniques consist of three parts: 1. A framework for modeling

More information

Chapter 5: Linear Temporal Logic

Chapter 5: Linear Temporal Logic Chapter 5: Linear Temporal Logic Prof. Ali Movaghar Verification of Reactive Systems Spring 94 Outline We introduce linear temporal logic (LTL), a logical formalism that is suited for specifying LT properties.

More information

Lecture 2: Symbolic Model Checking With SAT

Lecture 2: Symbolic Model Checking With SAT Lecture 2: Symbolic Model Checking With SAT Edmund M. Clarke, Jr. School of Computer Science Carnegie Mellon University Pittsburgh, PA 15213 (Joint work over several years with: A. Biere, A. Cimatti, Y.

More information

Reasoning about Strategies: From module checking to strategy logic

Reasoning about Strategies: From module checking to strategy logic Reasoning about Strategies: From module checking to strategy logic based on joint works with Fabio Mogavero, Giuseppe Perelli, Luigi Sauro, and Moshe Y. Vardi Luxembourg September 23, 2013 Reasoning about

More information

Temporal logics and model checking for fairly correct systems

Temporal logics and model checking for fairly correct systems Temporal logics and model checking for fairly correct systems Hagen Völzer 1 joint work with Daniele Varacca 2 1 Lübeck University, Germany 2 Imperial College London, UK LICS 2006 Introduction Five Philosophers

More information

Models. Lecture 25: Model Checking. Example. Semantics. Meanings with respect to model and path through future...

Models. Lecture 25: Model Checking. Example. Semantics. Meanings with respect to model and path through future... Models Lecture 25: Model Checking CSCI 81 Spring, 2012 Kim Bruce Meanings with respect to model and path through future... M = (S,, L) is a transition system if S is a set of states is a transition relation

More information

Computer-Aided Program Design

Computer-Aided Program Design Computer-Aided Program Design Spring 2015, Rice University Unit 3 Swarat Chaudhuri February 5, 2015 Temporal logic Propositional logic is a good language for describing properties of program states. However,

More information

Guest lecturer: Mark Reynolds, The University of Western Australia

Guest lecturer: Mark Reynolds, The University of Western Australia Università degli studi di Udine Laurea Magistrale: Informatica Lectures for April/May 2014 La verifica del software: temporal logic Lecture 05 CTL Satisfiability via tableau Guest lecturer: Mark Reynolds,

More information

Modal and Temporal Logics

Modal and Temporal Logics Modal and Temporal Logics Colin Stirling School of Informatics University of Edinburgh July 23, 2003 Why modal and temporal logics? 1 Computational System Modal and temporal logics Operational semantics

More information

Explicit State Model Checking Algorithm for CTL. CSE 814 CTL Explicit-State Model Checking Algorithm

Explicit State Model Checking Algorithm for CTL. CSE 814 CTL Explicit-State Model Checking Algorithm Explicit State Model Checking for CTL 1 CTL Model Checking Problem Given A model describing the behaviors of a system A set of specifications expressed in CTL ically Check that every behavior satisfies

More information

Abstraction for Falsification

Abstraction for Falsification Abstraction for Falsification Thomas Ball 1, Orna Kupferman 2, and Greta Yorsh 3 1 Microsoft Research, Redmond, WA, USA. Email: tball@microsoft.com, URL: research.microsoft.com/ tball 2 Hebrew University,

More information

From Liveness to Promptness

From Liveness to Promptness From Liveness to Promptness Orna Kupferman Hebrew University Nir Piterman EPFL Moshe Y. Vardi Rice University Abstract Liveness temporal properties state that something good eventually happens, e.g., every

More information

Temporal Logics for Specification and Verification

Temporal Logics for Specification and Verification Temporal Logics for Specification and Verification Valentin Goranko DTU Informatics FIRST Autumn School on Modal Logic November 11, 2009 Transition systems (Labelled) transition system (TS): T = S, {R

More information

Digital Systems. Validation, verification. R. Pacalet January 4, 2018

Digital Systems. Validation, verification. R. Pacalet January 4, 2018 Digital Systems Validation, verification R. Pacalet January 4, 2018 2/98 Simulation Extra design tasks Reference model Simulation environment A simulation cannot be exhaustive Can discover a bug Cannot

More information

Principles. Model (System Requirements) Answer: Model Checker. Specification (System Property) Yes, if the model satisfies the specification

Principles. Model (System Requirements) Answer: Model Checker. Specification (System Property) Yes, if the model satisfies the specification Model Checking Princiles Model (System Requirements) Secification (System Proerty) Model Checker Answer: Yes, if the model satisfies the secification Counterexamle, otherwise Krike Model Krike Structure

More information

Automata-Theoretic Model Checking of Reactive Systems

Automata-Theoretic Model Checking of Reactive Systems Automata-Theoretic Model Checking of Reactive Systems Radu Iosif Verimag/CNRS (Grenoble, France) Thanks to Tom Henzinger (IST, Austria), Barbara Jobstmann (CNRS, Grenoble) and Doron Peled (Bar-Ilan University,

More information

Models for Efficient Timed Verification

Models for Efficient Timed Verification Models for Efficient Timed Verification François Laroussinie LSV / ENS de Cachan CNRS UMR 8643 Monterey Workshop - Composition of embedded systems Model checking System Properties Formalizing step? ϕ Model

More information

Model checking, verification of CTL. One must verify or expel... doubts, and convert them into the certainty of YES [Thomas Carlyle]

Model checking, verification of CTL. One must verify or expel... doubts, and convert them into the certainty of YES [Thomas Carlyle] Chater 5 Model checking, verification of CTL One must verify or exel... doubts, and convert them into the certainty of YES or NO. [Thomas Carlyle] 5. The verification setting Page 66 We introduce linear

More information

Alternating Time Temporal Logics*

Alternating Time Temporal Logics* Alternating Time Temporal Logics* Sophie Pinchinat Visiting Research Fellow at RSISE Marie Curie Outgoing International Fellowship * @article{alur2002, title={alternating-time Temporal Logic}, author={alur,

More information

Reasoning about Time and Reliability

Reasoning about Time and Reliability Reasoning about Time and Reliability Probabilistic CTL model checking Daniel Bruns Institut für theoretische Informatik Universität Karlsruhe 13. Juli 2007 Seminar Theorie und Anwendung von Model Checking

More information

Bounded Model Checking with SAT/SMT. Edmund M. Clarke School of Computer Science Carnegie Mellon University 1/39

Bounded Model Checking with SAT/SMT. Edmund M. Clarke School of Computer Science Carnegie Mellon University 1/39 Bounded Model Checking with SAT/SMT Edmund M. Clarke School of Computer Science Carnegie Mellon University 1/39 Recap: Symbolic Model Checking with BDDs Method used by most industrial strength model checkers:

More information

CTL Model Checking. Wishnu Prasetya.

CTL Model Checking. Wishnu Prasetya. CTL Model Checking Wishnu Prasetya wishnu@cs.uu.nl www.cs.uu.nl/docs/vakken/pv Background Example: verification of web applications à e.g. to prove existence of a path from page A to page B. Use of CTL

More information

Decision Procedures for CTL

Decision Procedures for CTL Decision Procedures for CTL Oliver Friedmann 1 Markus Latte 1 1 Dept. of Computer Science, Ludwig-Maximilians-University, Munich, Germany CLoDeM Edinburgh, 15 July 2010 Introduction to CTL Origin: Emerson

More information

Temporal & Modal Logic. Acronyms. Contents. Temporal Logic Overview Classification PLTL Syntax Semantics Identities. Concurrency Model Checking

Temporal & Modal Logic. Acronyms. Contents. Temporal Logic Overview Classification PLTL Syntax Semantics Identities. Concurrency Model Checking Temporal & Modal Logic E. Allen Emerson Presenter: Aly Farahat 2/12/2009 CS5090 1 Acronyms TL: Temporal Logic BTL: Branching-time Logic LTL: Linear-Time Logic CTL: Computation Tree Logic PLTL: Propositional

More information

ESE601: Hybrid Systems. Introduction to verification

ESE601: Hybrid Systems. Introduction to verification ESE601: Hybrid Systems Introduction to verification Spring 2006 Suggested reading material Papers (R14) - (R16) on the website. The book Model checking by Clarke, Grumberg and Peled. What is verification?

More information

p,egp AFp EFp ... p,agp

p,egp AFp EFp ... p,agp TUESDAY, Session 2 Temoral logic and model checking, cont 1 Branching time and CTL model checking In a branching time temoral logics, we consider not just a single ath through the Krike model, but all

More information

Crash course Verification of Finite Automata CTL model-checking

Crash course Verification of Finite Automata CTL model-checking Crash course Verification of Finite Automata CTL model-checking Exercise session - 07.12.2016 Xiaoxi He 1 Reminders Big picture Objective Verify properties over DES models Formal method Absolute guarantee!

More information

Reasoning about Equilibria in Game-like Concurrent Systems

Reasoning about Equilibria in Game-like Concurrent Systems Reasoning about Equilibria in Game-like Concurrent Systems Julian Gutierrez, Paul Harrenstein, Michael Wooldridge Department of Computer Science University of Oxford Abstract In this paper we study techniques

More information

Efficient Model-Checking of Weighted CTL with Upper-Bound Constraints

Efficient Model-Checking of Weighted CTL with Upper-Bound Constraints Software Tools for Technology Transfer manuscript No. (will be inserted by the editor) Efficient Model-Checking of Weighted CTL with Upper-Bound Constraints Jonas Finnemann Jensen, Kim Guldstrand Larsen,

More information

Model-Checking Games: from CTL to ATL

Model-Checking Games: from CTL to ATL Model-Checking Games: from CTL to ATL Sophie Pinchinat May 4, 2007 Introduction - Outline Model checking of CTL is PSPACE-complete Presentation of Martin Lange and Colin Stirling Model Checking Games

More information

T Reactive Systems: Temporal Logic LTL

T Reactive Systems: Temporal Logic LTL Tik-79.186 Reactive Systems 1 T-79.186 Reactive Systems: Temporal Logic LTL Spring 2005, Lecture 4 January 31, 2005 Tik-79.186 Reactive Systems 2 Temporal Logics Temporal logics are currently the most

More information

THEORY OF SYSTEMS MODELING AND ANALYSIS. Henny Sipma Stanford University. Master class Washington University at St Louis November 16, 2006

THEORY OF SYSTEMS MODELING AND ANALYSIS. Henny Sipma Stanford University. Master class Washington University at St Louis November 16, 2006 THEORY OF SYSTEMS MODELING AND ANALYSIS Henny Sipma Stanford University Master class Washington University at St Louis November 16, 2006 1 1 COURSE OUTLINE 8:37-10:00 Introduction -- Computational model

More information

Linear-Time Logic. Hao Zheng

Linear-Time Logic. Hao Zheng Linear-Time Logic Hao Zheng Department of Computer Science and Engineering University of South Florida Tampa, FL 33620 Email: zheng@cse.usf.edu Phone: (813)974-4757 Fax: (813)974-5456 Hao Zheng (CSE, USF)

More information

Overview. Discrete Event Systems Verification of Finite Automata. What can finite automata be used for? What can finite automata be used for?

Overview. Discrete Event Systems Verification of Finite Automata. What can finite automata be used for? What can finite automata be used for? Computer Engineering and Networks Overview Discrete Event Systems Verification of Finite Automata Lothar Thiele Introduction Binary Decision Diagrams Representation of Boolean Functions Comparing two circuits

More information

Computation Tree Logic

Computation Tree Logic Comutation Tree Logic Finite State Model Checking of Branching Time Logic Kim Guldstrand Larsen BRICS@Aalborg 1 Tool Suort Finite State Systems System Descrition A Reuirement F CTL TOOL Course Objectives:

More information

Chapter 3: Linear temporal logic

Chapter 3: Linear temporal logic INFOF412 Formal verification of computer systems Chapter 3: Linear temporal logic Mickael Randour Formal Methods and Verification group Computer Science Department, ULB March 2017 1 LTL: a specification

More information

Graded Computation Tree Logic

Graded Computation Tree Logic Graded Computation Tree Logic Alessandro Bianco Fabio Mogavero Aniello Murano Universitá degli Studi di Napoli "Federico II", 80126 Napoli, Italy. {alessandrobianco, mogavero, murano}@na.infn.it http://people.na.infn.it/

More information

Linear Temporal Logic (LTL)

Linear Temporal Logic (LTL) Linear Temporal Logic (LTL) Grammar of well formed formulae (wff) φ φ ::= p (Atomic formula: p AP) φ (Negation) φ 1 φ 2 (Disjunction) Xφ (successor) Fφ (sometimes) Gφ (always) [φ 1 U φ 2 ] (Until) Details

More information

PSPACE-completeness of LTL/CTL model checking

PSPACE-completeness of LTL/CTL model checking PSPACE-completeness of LTL/CTL model checking Peter Lohmann April 10, 2007 Abstract This paper will give a proof for the PSPACE-completeness of LTLsatisfiability and for the PSPACE-completeness of the

More information

a Hebrew University b Weizmann Institute c Rice University

a Hebrew University b Weizmann Institute c Rice University Once and For All Orna Kupferman a, Amir Pnueli b,1, Moshe Y. Vardi c a Hebrew University b Weizmann Institute c Rice University Abstract It has long been known that past-time operators add no expressive

More information

Theoretical Foundations of the UML

Theoretical Foundations of the UML Theoretical Foundations of the UML Lecture 17+18: A Logic for MSCs Joost-Pieter Katoen Lehrstuhl für Informatik 2 Software Modeling and Verification Group moves.rwth-aachen.de/teaching/ws-1718/fuml/ 5.

More information

Timo Latvala. February 4, 2004

Timo Latvala. February 4, 2004 Reactive Systems: Temporal Logic LT L Timo Latvala February 4, 2004 Reactive Systems: Temporal Logic LT L 8-1 Temporal Logics Temporal logics are currently the most widely used specification formalism

More information

Optimal Decision Procedures for Satisfiability in Fragments of Alternating-time Temporal Logics

Optimal Decision Procedures for Satisfiability in Fragments of Alternating-time Temporal Logics Optimal Decision Procedures for Satisfiability in Fragments of Alternating-time Temporal Logics Valentin Goranko a,b Steen Vester a 1 a Department of Applied Mathematics and Computer Science Technical

More information

Symmetry Reductions. A. Prasad Sistla University Of Illinois at Chicago

Symmetry Reductions. A. Prasad Sistla University Of Illinois at Chicago Symmetry Reductions. A. Prasad Sistla University Of Illinois at Chicago Model-Checking Concurrent PGM Temporal SPEC Model Checker Yes/No Counter Example Approach Build the global state graph Algorithm

More information

Alternating-Time Temporal Logic

Alternating-Time Temporal Logic Alternating-Time Temporal Logic R.Alur, T.Henzinger, O.Kupferman Rafael H. Bordini School of Informatics PUCRS R.Bordini@pucrs.br Logic Club 5th of September, 2013 ATL All the material in this presentation

More information

QBF Encoding of Temporal Properties and QBF-based Verification

QBF Encoding of Temporal Properties and QBF-based Verification QBF Encoding of Temporal Properties and QBF-based Verification Wenhui Zhang State Key Laboratory of Computer Science Institute of Software, Chinese Academy of Sciences P.O.Box 8718, Beijing 100190, China

More information

SUPERVISORY CONTROL AND FAILURE DIAGNOSIS OF DISCRETE EVENT SYSTEMS: A TEMPORAL LOGIC APPROACH

SUPERVISORY CONTROL AND FAILURE DIAGNOSIS OF DISCRETE EVENT SYSTEMS: A TEMPORAL LOGIC APPROACH University of Kentucky UKnowledge University of Kentucky Doctoral Dissertations Graduate School 2002 SUPERVISORY CONTROL AND FAILURE DIAGNOSIS OF DISCRETE EVENT SYSTEMS: A TEMPORAL LOGIC APPROACH Shengbing

More information

Homework 2: Temporal logic

Homework 2: Temporal logic ICS-E5010 Computer-Aided Verification and Synthesis, Spring 2016 Stavros Tripakis Homework 2: Temporal logic Assigned: January 20, 2016 Due: February 1, 2016 Total: 235 points. 1. (20 points) Two formulae

More information

Finite State Model Checking

Finite State Model Checking Finite State Model Checking Finite State Model Checking Finite State Systems System Descrition A Requirement F CTL TOOL No! Debugging Information Yes, Prototyes Executable Code Test sequences Tools: visualstate,

More information

Logic-Based Modeling in Systems Biology

Logic-Based Modeling in Systems Biology Logic-Based Modeling in Systems Biology Alexander Bockmayr LPNMR 09, Potsdam, 16 September 2009 DFG Research Center Matheon Mathematics for key technologies Outline A.Bockmayr, FU Berlin/Matheon 2 I. Systems

More information

A tableau-based decision procedure for a branching-time interval temporal logic

A tableau-based decision procedure for a branching-time interval temporal logic A tableau-based decision procedure for a branching-time interval temporal logic Davide Bresolin Angelo Montanari Dipartimento di Matematica e Informatica Università degli Studi di Udine {bresolin, montana}@dimi.uniud.it

More information

First-Order Predicate Logic. Basics

First-Order Predicate Logic. Basics First-Order Predicate Logic Basics 1 Syntax of predicate logic: terms A variable is a symbol of the form x i where i = 1, 2, 3.... A function symbol is of the form fi k where i = 1, 2, 3... und k = 0,

More information

CIS 842: Specification and Verification of Reactive Systems. Lecture Specifications: Specification Patterns

CIS 842: Specification and Verification of Reactive Systems. Lecture Specifications: Specification Patterns CIS 842: Specification and Verification of Reactive Systems Lecture Specifications: Specification Patterns Copyright 2001-2002, Matt Dwyer, John Hatcliff, Robby. The syllabus and all lectures for this

More information

Semantic Equivalences and the. Verification of Infinite-State Systems 1 c 2004 Richard Mayr

Semantic Equivalences and the. Verification of Infinite-State Systems 1 c 2004 Richard Mayr Semantic Equivalences and the Verification of Infinite-State Systems Richard Mayr Department of Computer Science Albert-Ludwigs-University Freiburg Germany Verification of Infinite-State Systems 1 c 2004

More information