Tel: Simulation of a Stand- Alone Photovoltaic System

Transcription

1 EDLC * * ** ** * Tl: **NTT Tl: hiro-k@cc.tuat.ac.jp EDLC Simulation of a Stand- Alon Photovoltaic Systm Using Elctric Doul Layr Capacitors and Lad Acid Battris Hiroshi Kawaguchi *, Kosuk Kurokawa * and Yousuk Nozaki **, Toshiaki Yachi ** *Tokyo Univrsity of Agricultur & Tchlogy -4-16, Naka-cho, Kogani-shi, Tokyo, , Japan **NTT Tlcommunications Enrgy Laoratoris , Midori-Cho, Musashi-shi, Tokyo, , Japan hiro-k@cc.tuat.ac.jp ABSTRACT: W prviously proposd a stand-alon photovoltaic ( systm using lctric doul layr capacitors (EDLC and lad acid attris as powr dvics. Hr, w simulatd this systm s opration and its charactristics and valuatd th array powr mismatching loss ratio, attry contriution factor, and minimum stat of charg (SOC. Th rsults provid furthr dat showing that th proposd systm is ffctiv at rducing th mismatching loss ratio and attry contriution factor and incrasing th minimum SOC. Consquntly, th proposd systm should hav a longr attry liftim than a convntional systm. Ky words: Stand-alon photovoltaic systm, EDLC, attry

2 1. EDLC A. B. EDLC [1] [] [3] ~ [7] C.. Fig.. Opration of th proposd systm using MET EDLCs and attris systm SOC EDLC 1 V V1m EDLC 1 MPPT V Vm MPPT V1m>Vm MPPT EDLC V 1. V m = 3.5V V 1m = 3.6V Fig. 1. Configuration of th proposd systm using EDLCs and attris. MPPT EDLC V >V 1m V <V m EDLC Fig. 3. Control of convrtr 1. ys ys

3 4. 3 EDLC C Ploss1 1 P1 K 1V C EDLC KC1V KE1 V KR1 V P1 = K 1= KC1= V >V r C V V V r = 1.5V V r1 = 1.1V V r = 19.V V opt = 13.3V ys ys V <V r1 V > V opt ys + ( KE1 + V 4K R1( P1 1V C1V W ys V <V r 4. Fig. 4 Control of convrtr. 5. P loss = P ö V C V E i R (5 i Ploss P K V KCV KEi t KRi 5 DC-DC P = K = KC = KE = KR= EDLC i V ç = (6 i V + P loss MET 0V i = (7 ç V 5.1D C-DC ( P + P = P V V (1 loss 1 1 ö 1 C 1 E 1 R1 KE1 = KR1= EDLC K E K R ( P V C V + V V C V ç 1 = ( V V + P loss 1 ç W 1 = (3 V 1 EDLC V ç 1 = { ( K E1 + V (4 K W R (1 EDLC EDLC ç 1 C V K E = + 1 (8 K V C V V }

4 ( 1 1 ( 1 5. t Fig. 5. Systm simulation flow. 5. E c = E 1 + k0 ln(1 Qc / CT (15 Q c = ñ C c (16 Rc = R0 + R ( R1 Qc / Cc + RX G( t (17 G ( t = xp{ á ( T } [8] G t U ( TG t (9 ( [ xp{ á ( t T G } U ] (18 ( t TG V = E R 9 t ñ = 1 G ( t dt / G dt ( ( t E = E 0 + k0 ln(1 Q / C T (10 Ec Rc c Q = dt (11 (=- E1 TG G(t R = R [ 1 + B ln{ ã /( ã Q / C }] (1 0 C T C = (13 d {1 + ( C T / C R 1( / R } á1 á = á 0 c 1 E R E0 Q R 1 R X X = R X 0 c CT C CR R k0 Bd T 1 T G G = TG 0 3 c V = E + R 14 c c c U(tR0 R1RRx RXTG

5 5.3E DLC EDLC EDLC [9] 18 EDLC 1 EDLC 7 EDLC 3V V = E + R 4 SOC 95 EDLC Q E Q 5.4 MET EDLC DSP EDLC MOS-FET 6. Fig. 6. Circuit configuration of th proposd systm. 6. E = Q / C 5 EDLC = dt 6 EDLC 5 [ ] Tal1. Systm spcifications [ ] 7.E DLC Fig. 7. Voltag charactristics of EDLCs and attris. [ ]

6 Fig. 8. Convntional systm. 7. MET MET 1 SOC 1 MET EDLC 9 30 EDLC 3V EDLC 50W 150W EDLC W 9. Fig. 9. Systm downtim of convntional systm

7 7.4.3 SOC SOC 1 SOC 30 SOC 30 EDLC SOC SOC 1. SOC EDLC Fig. 1. Minimum stat of charg W 10W Fig. 10. mismatching loss ratio. 11. Fig. 11. Battry contriution factor. EDLC EDLC

8 13. 1 Fig.13. Annual charactristics of th convntional systm [ 7 ] Y. Nozaki, K.Akiyama, H. Kawaguchi, 14. K.Kurokawa: Evaluation of an EDLC-attry Fig.14. Annual charactristics of th proposd systm 8. EDLC P [ 9 ] SOC EDLC SOC [ 1 ] NEC Vol.46No10P [ ] 1998 [ 3 ] 11 / P [ 4 ] 7P [ 5 ] 1 [ A] P [ 6 ] Y. Nozaki, K.Akiyama, H. Kawaguchi, K.Kurokawa: An mprovd for Controlling an EDLC-attry Hyrid Stand-alon Photo- voltaic Powr Systm, EEE APEC000, P , 000 Hyrid Stand-alon Photovoltaic Powr Systm, 8s SC EEE, 000 [ 8 ]