Analog Electronic Circuits. Prof. Mor M. Peretz

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1 Pr. Mr M. Peretz Analg Electrnic ircuits [1] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY Analg Electrnic ircuits Pr. Mr M. Peretz The enter r Pwer Electrnics and MixedSignal Department Electrical and mputer Engineering BenGurin University the Negev, SRAEL s: mrp@bgu.ac.il Website: Pr. Mr M. Peretz Analg Electrnic ircuits [2] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY Slewrate (summary) nput mpedances Dierential mmnmde MRR Eect eedback n impedances Blackman s therem Output urrent and vltage eedback nput Series and parallel summatin nstrumentatin ampliier Stability Lessn #4 Outline 1

2 Pr. Mr M. Peretz Analg Electrnic ircuits [3] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY SR = i B eq Transient respnse SlewRate Sine wave V m_ut = min SR 2π m, V sat V ut V m_ut V sat V ut_sr 8V 800mV 80mV 1K 10K 100K 1M m [Hz] Pr. Mr M. Peretz Analg Electrnic ircuits [4] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY nput mpedances R d Vd/2 V1 R cm R cm V cm = 2 V d = Vcm Vd/2 V2 2

3 Pr. Mr M. Peretz Analg Electrnic ircuits [5] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY nput mpedances Dierential h ie = V T e h e 1 R d =2h ie = 2 V T e h e 1 V OUT N Q 1 Q 2 N R in VEE Pr. Mr M. Peretz Analg Electrnic ircuits [6] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY nput mpedances mmnmde V OUT R e = 1 h e R cm =2R e h e 1 N Q 1 Q 2 N V EE R in VEE 3

4 Pr. Mr M. Peretz Analg Electrnic ircuits [7] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY mmnmde Rejectin Rati (MRR) V cm = 0 V in MRR A d A cm = A da 2 A 3 A cm A 2 A 3 V cm = 2 V d = V ut_cm = A cm V cm = A cm 2 V cm = Pr. Mr M. Peretz Analg Electrnic ircuits [8] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY mmnmde Rejectin Rati (MRR) V cm = 0 V ut =A cm V cm A d V d V ut A d = V cm MRR V d Relected t input (as dne t ALL nnidealities) V cm = 4

5 Pr. Mr M. Peretz Analg Electrnic ircuits [9] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY Blackman s Therem Z F =Z NF 1βA S 1βA O Lad V in V e G A OL V ut V in V e G A OL Lad V V ut β β Vltage eedback urrent eedback Z F = Z NF 1βA Z F =Z NF 1 βa Pr. Mr M. Peretz Analg Electrnic ircuits [10] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY Vltage eedback Eect eedback Output impedance urrent eedback V re ut R Z ut_f =R 0 1βA S 1βA O Z ut_f =R 0 1βA S 1βA O 5

6 Pr. Mr M. Peretz Analg Electrnic ircuits [11] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY 100 [db] A OL Eect eedback Example /β R 0 [Hz] R1=10k R2=1k R0= Z ut_f Pr. Mr M. Peretz Analg Electrnic ircuits [12] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY Linear regulatr LwDrp Out (LDO) Z ut_f Vut Z Lad 6

7 Pr. Mr M. Peretz Analg Electrnic ircuits [13] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY Eect eedback nput impedance V e A β V e V Series (vltage) summatin Z in_f =Z NF 1 βa Parallel (current) summatin Z in_f = Z NF 1βA Pr. Mr M. Peretz Analg Electrnic ircuits [14] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY nput mpedances R in = r 0 1βA R 3 R 4 V Ɛ R in_1 = R in_2 =R 3 R 4 R in_1,2 = R 3 R in =R d 1 βa 7

8 Pr. Mr M. Peretz Analg Electrnic ircuits [15] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY Dierence Ampliier R 3 R 4 V Ɛ V ut_1 = V ut_2 = R 4 R 3 R 4 1 = R 3 R 4 V ut = R 3 R 4 V Ɛ Pr. Mr M. Peretz Analg Electrnic ircuits [16] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY nstrumentatin Ampliier V ut = V R amp_b V amp_a V amp_a 2 x = R x R a V amp_b V amp_a = x R x R a R b V ut = 1 R a R b R x R x R b V amp_b R 3 V Ɛ R 4 8

9 Pr. Mr M. Peretz Analg Electrnic ircuits [17] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY LpGain Nyquist riterin A L = G s A OL s 1 βa OL s The system is unstable i the characteristic equatin {1βA OL (s)} has rts in the right hal the cmplex plane Nyquist criterin is a test r lcatin {1βA OL (s)} rts Nyquist criterin can be viewed n the requency dmain (Bde) Pr. Mr M. Peretz Analg Electrnic ircuits [18] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY LG [db] Lpgain n the requency dmain A X in X in X e X G A ut OL X n negative eedback systems At 0 β 180 ( 180 ) 9

10 Pr. Mr M. Peretz Analg Electrnic ircuits [19] [db] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY A A 1 Bde plt Phase margin m ( 180 ) m A 1 A Pr. Mr M. Peretz Analg Electrnic ircuits [20] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY A[dB] A Graphical representatin βa OL cnventinal methd AB[dB] [Hz] AB B[dB] B 1 2 [Hz] 3 [Hz] Tedius need t replt BA Analysis (nt design) riented Requires iteratins 10

11 Pr. Mr M. Peretz Analg Electrnic ircuits [21] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY Graphical Representatin βa OL A[dB] A LG() BA BA 1 1 B BA 1 BA 1 20lg A 20lg 1 20lg(BA) B 1 20lgA 20lg B A 1 B [Hz] Pr. Mr M. Peretz Analg Electrnic ircuits [22] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY Pssible cmpensatins Rate lsure (RO) m 90 1 m 45 m 90 m 45 m 90 m 45 A 20 db dec 1 B db 0 db dec A db s 0 db dec u s 20 db 20 db dec dec u s 40 db dec 40 db dec 60 db dec s 11

12 Pr. Mr M. Peretz Analg Electrnic ircuits [23] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY Excitatin Oversht and Q in lsed Lp in Respnse t step in S in Oversht t Q cs sin m m r m 50 A L Q Design target m 45 Oversht 50 m Pr. Mr M. Peretz Analg Electrnic ircuits [24] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY 12

13 Pr. Mr M. Peretz Analg Electrnic ircuits [25] THE ENTER FOR POWER ELETRONS AND MXEDSGNAL, BENGURON UNVERSTY 13

ECE 2100 Circuit Analysis

ECE 2100 Circuit Analysis Lessn 25 Chapter 9 & App B: Passive circuit elements in the phasr representatin Daniel M. Litynski, Ph.D. http://hmepages.wmich.edu/~dlitynsk/ ECE 2100 Circuit Analysis Lessn