Integrating Circuit Simulation with EIT FEM Models
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1 Integrating Circuit Simulation with EIT FEM Models Alistair Boyle and Andy Adler University of Ottawa Carleton University Ottawa, Canada EIT2018, June 11 13, 2018
2 Circuits and FEM + Step 1: forward solution improve hardware designs with accurate simulations Step later: inverse solution handle hardware imperfections and aging EIT + SPICE 2 / 16
3 example: EIT simulations model reconstruction measurements EIT + SPICE 3 / 16
4 example: circuit simulation (spice) Non-linear circuit analysis (opamps, I/O models) and signal integrity (transmission lines) 1kHz Band-Pass Filter Vin 1 0 DC 0 AC 1 R k R C nF C nF R k Eopamp frequency domain time domain and detailed non-linear semiconductor and IBIS device models EIT + SPICE 4 / 16
5 EIT + spice 1 EIT spice 2 EIT spice EIT + SPICE 5 / 16
6 EIT + spice 1 EIT spice EIT + SPICE 6 / 16
7 EIT spice blockwise matrix inverse: a model reduction [ ] [ ] 1 [ VA A B 0 = B T D V D X D ] (1) D = D B T A 1 B (2) V D = D 1 X D (3) EIT + SPICE 7 / 16
8 EIT spice a R ab b resistor equivalence: D = D B T A 1 B D is an N-port full mesh resistor network D off-diagonal values are 1/R ab between electrode a and b delta-wye conversion for 2D models, but its not worth the trouble complex-valued extension: R to RLC network General FEM spice methods used in EMI and antenna analysis EIT + SPICE 8 / 16
9 example: EIT spice (forward solution) spice input files: file: stim.s Test circuit for EIT.inc eit.s rgnd e1 0 1e-16 isrc e1 e2 dc 1A Xeit e1 e2 e3 e4 e5 e6 e7 e8 eit.control print V(e1,e2) V(e2,e3) V(e3,e4) + V(e4,e5) V(e5,e6) V(e6,e7) + V(e7,e8) v(e8,e1).endc.end file: eit.s * full-mesh R network of 8-electrode EIT FEM.subckt eit e1 e2 e3 e4 e5 e6 e7 e8 re01 e1 e re02 e1 e re03 e1 e [... ] re25 e5 e re26 e6 e re27 e6 e re28 e7 e ends eidors output: = spice output: Circuit: test circuit for eit [... ] v(e1,e2) = e+00 v(e2,e3) = e-01 v(e3,e4) = e-01 v(e4,e5) = e-02 v(e5,e6) = e-01 v(e6,e7) = e-02 v(e7,e8) = e-01 v(e8,e1) = e-01 EIT + SPICE 9 / 16
10 EIT + spice 2 EIT spice EIT + SPICE 10 / 16
11 spice EIT Input: spice netlist Modified Nodal Analysis (MNA) circuit analysis ideal elements: 2 node elements Rn resistor Cn capacitor Ln inductor Vn voltage source In current source [ ] [ ] 1/sL 1/sL V+ ind: 1/sL 1/sL V 4 node elements En voltage controlled voltage source (VCVS) Fn current controlled current source (CCCS) Gn voltage controlled current source (VCCS) Hn current controlled voltage source (CCVS) VCVS: s = jω Grounded nodes are a special case G 1 1 G 0 We use the FEM connectivity matrix to stitch nodes in FEM (electrodes) to circuit nodes V i+ V o+ V o V i I o EIT + SPICE 11 / 16
12 Step later: inverse problem Nonlinear components (opamp, diode, transmission line, transistor) modelled by linearizing to ideal components spice implementations provide algorithms to find operating points for small signal nonlinear models, including those that exhibit hystersis (ex. Schmitt triggers) EIT + SPICE 12 / 16
13 Challenges 1 1 c Gary Larson, The Farside EIT + SPICE 13 / 16
14 Challenges On the failure of the Cadence Spectre Spice simulator to penetrate the market, despite being faster, more accurate, more robust: [... we] completed the first version in two weeks [...] One can find serious faults in any SPICE simulator you try. Ironically, the faults are one of the things that make it hard to replace. 2 HSpice Synopsys PSpice Cadence Spectre Cadence LTspice IV Linear Technologies TINA Texas Instruments 5Spice Cadence SuperSpice AnaSoft NI Multisim National Instruments TopSpice Penzar ngspice GPL EveryCircuit MuseMaze Qucs GPL 2 K. Kundert (2011) The Life After Spice, IEEE Solid-State Circuits Magazine EIT + SPICE 14 / 16
15 Possible directions 1 EIT spice support grounding current complex-valued conductivities (RLC networks) time/frequency-dependent models 2 EIT spice spice library integration a (ngspice) solve inverse problem for circuit parameters a not with matlab EIT + SPICE 15 / 16
16 Available now at a code repository near you 1 EIT spice for real-valued conductivities at a single-frequency generates standard spice netlist (sub-circuit) eidors/solvers/forward/eit spice.m 2 EIT spice parses standard spice netlist for linear circuits forward model a eidors/solvers/forward/spice eit.m a MNA stitching not yet implemented EIT + SPICE 16 / 16
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