Registration Error Terms: Grid: Wafer Terms and Field IFD

Transcription

1 Registration Error Terms: Grid: Wafer Terms and Field IFD Grid Rotat ion Grid Skew System Skew Field Skew Field Rotation Grid Y Mag Grid X Mag Field IsoMag Field Y (optical) Mag Field X (scan) Mag Grid or wafer terms Field terms 0.50 PPM scale PPM scale 1

2 Projection lens 1. Image placement Aberrations: Distortion Coma. Lens to lens matching Scanner : less lens area : <30 nm Stepper: full lens spec: <60 nm Tool to Tool matching (lens and stage) 1. ASML 5500: <10 nm. SVGL MSIII+: <65 nm 3. ASML-SVGL: <10 nm Interferometic wafer stage precision Registration Error Budget: Major sources for Mis-placement errors Alignment System 1. Alignment marker quality. Detection system : center of gravity 3. Correction model applied Specs include lens errors: ASML: 63 nm Phase grating Process insensitive: 10 nm SVGL: Darkfield signal chevron marker (±1 orders): Process dependent: 55 nm Interferometic reticlewafer stage synchronization Scanner only 1. ASML 5500: <15 nm 1. SVGL MSIII+:. SVGL MSIII+: <17 nm. Left-Right scan direction delta 3. Canon ES3: <9.5nm Alignment Strategy Definition of what layer aligns to what Reticle Fabrication 1. Reticle to reticle pattern placement errors. 5X to 4X reticle errors 4X: 5nm 5X: 50nm Field magnification control 1. ASML 5500: ISO-MAG: reticle platen height. SVGL MSIII+: X-Mag: wafer stage speed Y-Mag: move optics

3 Registration : Layer to layer placement 5X ASML Phase grating alignment Markers to 4 locations on wafer: Global align and blind step 4X SVGL etched Chevron alignment Markers 6 align tracks in horizontal scribe lines on wafer: Align to 8 to 1 markers per track and blind step; Total per wafer: 56 markers/wafer 3

4 Registration Specifications Registration: Specifications by GST 40 layer.. This is what we SPC: mean + 3 sigma or Max error # Process Chart Type USL SPC: X+3S nm USL SPC: Y+3S nm USL SPC: Max Error nm 1 GST40 DI-DT Control 10 GST40 DR-DT Control 10 3 GST40 BW-DI Control 10 4 GST40 LC-BW Control 70 5 GST40 BI-BW Control 10 6 GST40 EW-BW Control GST40 P-EW Control GST40 P1-D1 Control GST40 CT- P1 Control GST40 RT-CR Control GST40 M1-CT Control 50 1 GST40 V1-M1 Control GST40 M-V1 Control GST40 V-M Control GST40 M3-V Control 00 1 GST35 DI-DT Control 10 GST35 BW-DI Control GST35 LC-DI Control GST35 EC-BW Control 70 6 GST35 P-EC Control GST35 P1-DI Control GST35 V1-M1 Control 00 9 GST35 V-M Control 00 1 CB40 EW-DI Control GST30 P1-DI Control 170 4

5 Registration Sources of Error Registration: Sources of error: Problem with the Walk out idea. This walk out has been defined as systematic and not random. If it is truly random, then propagation of errors apply. Systematic 'walk" idea = 10 nm "DC Bias" Any event has equal probability of occurance! Sample input Layer 0 Layer 1 Layer Layer 3 Layer 4 Layer 5 Layer 6 Layer 7 Layer 8 Layer 9 Mean reg nm SD nm n sample Sp Standard deviation pooled t value All Align back to AL tail AREA under Curve All Align back to AL AREA under Curve P! Probabilty of All Align back to AL "walk" 8.037% 0.515% % % % % % % % Probabilty of "walk" Probabilty in PPM of systematic walk being due to random chance Probabilty in PPM of systematic walk being due to random chance Align back to subequent layer 8.037% % 0.004% % % % % % % All Align back to AL Align back to subequent layer

6 6 Registration Sources of Error Registration: Problem with the random walk idea. A random walk has been defined as systematic and not random. If it is truly random, then propagation of errors apply. This is the model used for GST 40 alignment paths. The formula for error propagation If f=f(x,y,z ) and you want σ f and you have σ x, σ y, σ z, then use the following formula: = z y x f z F y F x F σ σ σ σ

7 Registration Sources of Error Registration: Problem with the random walk idea. A random walk has been defined as systematic and not random. If it is truly random, then propagation of errors apply. Statistical Treatment of Data Low accuracy, low precision High accuracy, low precision Low accuracy, high precision High accuracy, high precision 7

8 Registration Sources of Error Registration: A random walk has been defined as systematic and not random. If it is truly random, then propagation of errors apply

9 Registration: Sources of error WHY does this occur? Registration Sources of Error Equal probablity of registration error for each alignment if no systematic error exists. Systematic error: If it is stable and if it exists need to be understood and corrected if possible. Alignment corrections (constants) should be correcting for this systematic error. If a systematic error exists in output (I,e, not corrected and hidden in the statistic mean = 3 sigma, we need to correct. I.e. put Tx and Ty offset as constants in job. Why to we need any other alignment corrections besides Tx, Ty, and W rot if process and tools are stable? Variation sources: Tool to tool field errors, SVGL ASML matching, Process thermal cycles, Field magnification correction on ASML, tool pressure compensation, Telecentric errors 9

10 Old process: Statistical comparison Registration Control Registration: Analysis of one lot s XY registration errors as run through DI-DT to CT - P1: WC19Y N9J0BA05 run AL ASML 13; DT ASML 13; and CT ASML 13 CT aligning to SVGL P1 defined marker Normal Probability Plot - GST40 Critical alignments> resulting X-Y errors NORMSINV Parameter A05 X DI-DT A05 Y DI-DT A05 X BW-DI A05 Y BW-DI A05 X EW-BW A05 Y EW-BW A05 X P-EW A05 Y P-EW A05 X P1-P A05 Y P1-P A05 X CT-P1 A05 Y CT-P1 99.9% 99.4% 97.7% 93.% 84.1% 69.% 50% 30.9% 15.9% 6.7%.3% 0.6% 0.1% 10

11 Statistical comparison Registration Control Registration: Analysis of one lot as run through Multiple layers CT aligning to SVGL P1 defined marker Lot 05 Reg error IVS data A05 X DI-DT A05 Y DI-DT A05 X BW-DI A05 Y BW-DI A05 X EW-BW A05 Y EW-BW A05 X P-EW A05 Y P-EW A05 X P1-P A05 Y P1-P A05 X CT-P1 A05 Y CT-P1 Mean nm Mean um Standard Error Median Mode Standard Deviation um Standard Deviation nm SD nm mean +3 sd SPEC Sample Variance Kurtosis Skewness Range Minimum Maximum Sum Count

12 Statistical comparison Registration Control Registration: Analysis of one lot s XY registration errors as run through DI-DT to CT - P1: CT aligning to SVGL P1 defined marker OLD Process NORMSINV IVS X Y Registration error: WC19Y N9J0BA03 - GST % 99.4% 97.7% 93.% 84.1% 69.% 50% 30.9% 15.9% A03 X DI-DT A03 Y DI-DT A03 X BW-DI A03 Y BW-DI A03 X EW-BW A03 Y EW-BW A03 X P-EW A03 Y P-EW A03 X P1-P A03 Y P1-P A03 X CT-P1 A03 Y CT-P %.3% A03 X CT-P1 rw A03 Y CT-P1 rw % % Registration error um 1

13 Old process: Statistical comparison Registration Control Registration: Analysis of one lot as run through DI-DT to CT - P1: WC19Y N9J0BA03 run AL ASML 13; DT ASML 13; and CT ASML 13 Reworking at CT did not improve registration distribution! CT aligning to SVGL P1 defined marker Lot 03 Reg error IVS data A03 X DI-DT A03 Y DI-DT A03 X BW-DI A03 Y BW-DI A03 X EW-BW A03 Y EW-BW A03 X P-EW A03 Y P-EW A03 X P1-P A03 Y P1-P A03 X CT-P1 A03 Y CT-P1 A03 X CT-P1 RW A03 Y CT-P1 RW Mean nm E Mean um Standard Error Median Mode #N/A #N/A #N/A Standard Deviation um Standard Deviation nm SD nm mean +3 sd SPEC Sample Variance Kurtosis Skewness Range Minimum Maximum Sum Count

14 Old process: Statistical comparison Registration Control Registration: Analysis of one lot as run through DI-DT to CT - P1: WC19Y N9J0B3030 run AL ASML 13; DT ASML 13; and CT ASML 13 CT aligning to SVGL P1 defined marker IVS X Y Registration error: WC19Y N9J0B GST40 A030 X DI-DT NORMSINV % 99.4% 97.7% 93.% 84.1% 69.% 50% 30.9% 15.9% 6.7% A030 Y DI-DT A030 X BW-DI A030 Y BW-DI A030 X EW-BW A030 Y EW-BW A030 X P-EW A030 Y P-EW A030 X P1-P A030 Y P1-P A030 X CT-P1 A030 Y CT-P1 -.3% % % Registration Error um 14

15 Old process: Statistical comparison Registration Control Registration: Analysis of one lot as run through DI-DT to CT - P1: WC19Y N9J0B3030 run AL ASML 13; DT ASML 13; and CT ASML 13 CT aligning to SVGL P1 defined marker Lot 030 Reg error IVS data A030 X DI-DT A030 Y DI-DT A030 X BW-DI A030 Y BW-DI A030 X EW-BW A030 Y EW-BW A030 X P-EW A030 Y P-EW A030 X P1-P A030 Y P1-P A030 X CT-P1 A030 Y CT-P1 Mean nm Mean um Standard Error Median Mode #N/A Standard Deviation um Standard Deviation nm SD nm mean +3 sd SPEC Sample Variance Kurtosis Skewness Range Minimum Maximum Sum Count

16 New process: Statistical comparison Registration Control Registration: Analysis of six lots run CT ASML 13 CT aligning to ASML AL defined marker NORMSINV Normal Probability Plot - GST40 CT-P1 Registration error for CT aligned to Al ASML marker Registration Error microns 99.9% 99.4% 97.7% 93.% 84.1% 69.% 50% 30.9% 15.9% 6.7%.3% 0.6% 0.1% X lot 066 Y lot 066 X lot 069 Y lot 069 X lot 070 Y lot 070 X lot 071 Y lot 071 X lot 076 Y lot 076 X lot 079 Y lot

17 New process: Statistical comparison Registration Control Registration: Analysis of six lots run CT ASML 13 CT aligning to ASML AL defined marker Note Y mean offset!! Reg error IVS data CT- P1 X lot 066 Y lot 066 X lot 069 Y lot 069 X lot 070 Y lot 070 X lot 071 Y lot 071 X lot 076 Y lot 076 X lot 079 Y lot 079 Mean nm E Mean um Standard Error Median Mode Standard Deviation um Standard Deviation nm SD nm mean +3 sd SPEC Sample Variance Kurtosis Skewness Range Minimum Maximum Sum Count

18 New process Vs Old: Statistical comparison Registration Control ASML marker Vs Align to SVGL P1 marker: Normal Probability Plot - GST % % 97.7% % NEW % NORMSINV % 50% 30.9% 15.9% % -.3% -.5 OLD 0.6% % X lot 066 Y lot 066 X lot 069 Y lot 069 X lot 070 Y lot 070 X lot 071 Y lot 071 X lot 076 Y lot 076 X lot 079 Y lot 079 WC19Y A03 X CT-P1 WC19Y A03 Y CT-P1 WC19Y A05 X CT-P1 WC19Y A05 Y CT-P1 WC19Y A030 X CT-P1 WC19Y A030 Y CT-P1 Parameter 18

19 Semiconductor Example Integrated circuit Manufacturing Registration control Mixing tools: %X ASMl to 4X SVGL: ASML Align to AL ASML M-PA SPC REG spec SPC REG spec ASML V1 P1 SPC REG spec 180 new SVGL ASML M1 P < > EW SVGL 30 ASML CT BW 70 BI SVGL ASML RT < > DI SVGL ASML NI DT ASML ASML CR AL ASML 19

20 Statistical comparison Registration Control Alignment - Registration-Overlay Model: RSS (root sum of squares method: 4 Basic alignment types Explanation : Why are we using 10nm for AMSL spec? A. Single tool matching spec is 10nm. B. In GST 40 production we run lots on multiple tools the difference between tools is 135nm. We do not mix tools within a lot of wafers but dedicate lots to tools with common offsets. The overlay tolerances on these go into the common layer overlay population. EXAMPLE 1 : ASML layer to layer Registration or Overlay ( fct( reg,cd): Alignment is to a common layer marker. 1 Align layer 1: 10 nm Registration layer to layer 1: 170 nm Marker layer Matching tools 3 sigma 1 sigma TYPE Tool 1 Tool ASML ASML Different Tools 1 1 SVGL SVGL Different Tools 1 ASML SVGL SVGL ASML Align layer : 10 nm Example 1: ASML layers run on tools aligned to common marker AL (in this case) RSS registration= (40^+40^)^0.5 x 3 = 170nm 0

21 Statistical comparison Registration Control: RSS OVERLAY MARKER OVERLAY Tool 1 Tool #1 ASML- ASML # SVGL- SVGL #3 ASML-SVGL #4 SVGL- ASML RSS Registration Marker ALIGN ALIGN ALIGN ALIGN Error nm AL AL AL /100 /100 BP AL AL /100 / BN AL AL /100 / PW AL AL /100 / DT AL AL /100 / DI DT DT AL /100 SVGL NF DI AL DT SVGL / IE DI AL DT SVGL / DR DI DI DT SVGL SVGL CC DI AL DT SVGL / SD DI AL DT SVGL / VD DI AL DT SVGL / PC DI AL DT SVGL / NC DI AL DT SVGL / LE DI AL DT SVGL / BW DI DI DT SVGL SVGL BI DI BW DT SVGL SVGL 141 1

22 Statistical comparison Registration Control: RSS OVERLAY MARKER OVERLAY Tool 1 Tool #1 ASML- ASML # SVGL- SVGL #3 ASML-SVGL #4 SVGL- ASML RSS Registration Marker ALIGN ALIGN ALIGN ALIGN Error nm HC DI AL DT SVGL / EW BW BW DI SVGL SVGL EW DI BW DT SVGL SVGL 141 Comment EW BI BW BW SVGL SVGL 141 P EW DI DT SVGL SVGL new P-EW:180 P1 P DI DI SVGL SVGL 141 was P1-P: 70 P1 DI DI DT SVGL SVGL was P1-P: 140 PL DI AL DT SVGL / NL DI AL DT SVGL / PS DI AL DT SVGL / NS DI AL DT SVGL / SP DI AL DT SVGL / PR DI AL DT SVGL / CR DI AL DT SVGL / Degraded 184 CT DI AL DT SVGL / Degraded CT P AL DI SVGL / Spec is 50 nm CT P1 AL DI SVGL / Degraded

23 Statistical comparison Registration Control: RSS OVERLAY MARKER OVERLAY Tool 1 Tool #1 ASML- ASML # SVGL- SVGL #3 ASML-SVGL #4 SVGL- ASML RSS Registration Marker ALIGN ALIGN ALIGN ALIGN Error nm NI DI AL DT SVGL / RT CR CT P1 /100 / RT CR AL AL /100 / M1 CT AL AL /100 / M1 RT AL AL /100 / V1 M1 AL AL /100 / M V1 AL AL /100 / MM M AL AL /100 / V M AL AL /100 / M3 V AL AL /100 / V3 M3 AL AL /100 / M4 V3 AL AL /100 / PA M4 AL AL /100 /