On the Energy Complexity of LDPC Decoder Circuits

Transcription

1 O th Ergy Complxity of LDPC Dcodr Circuits Christophr Blk d Frk R. Kschischg Dprtmt of Elctricl & Computr Egirig Uivrsity of Toroto christophr.blk@mil.utoroto.c frk@comm.utoroto.c rxiv: v [cs.it] 7 Fb 05 Abstrct It is show tht i squc of rdomly grtd biprtit cofigurtios with umbr of lft ods pprochig ifiity, th probbility tht prticulr cofigurtio i th squc hs miimum bisctio width proportiol to th umbr of vrtics i th cofigurtio pprochs so log s sufficit coditio o th od dgr distributio is stisfid. This grph thory rsult implis lmost sur Ω ) sclig rul for th rgy of cpcity-pprochig LDPC dcodr circuits tht dirctly isttit thir Tr Grphs d r grtd ccordig to uiform cofigurtio modl, whr is th block lgth of th cod. For squc of circuits tht hv full st of chck ods but do ot cssrily dirctly isttit Tr grph, this implis Ω.5) sclig rul. I othr thorm, it is show tht ll s opposd to lmost ll) cpcity-pprochig LDPC dcodig circuits tht dirctly implmt thir Tr grphs must hv rgy tht scls s Ω log ) ). Ths rsults furthr imply sclig ruls for th rgy of LDPC dcodr circuits s fuctio of gp to cpcity. I. INTRODUCTION Low dsity prity chck cods r clss of cods first itroducd by Gllgr i []. This ppr fids fudmtl lowr bouds o th rgy of VLSI implmttios of cpcity-pprochig LDPC dcodrs. Ctrl to th costructio d lysis of LDPC cods is th rdomly grtd Tr grph with giv dgr distributio. A widly usd mthod of lysis ivolvs lyzig smbl of LDPC cods whos Tr grphs r grtd ccordig to som distributio. It hs b show tht thr xist dgr distributios tht rsult i LDPC cods d dcodrs tht c gt rbitrrily clos to cpcity for rsur chl []. Th first mi rsult of this ppr is lmost-sur sclig rul for th rgy of cpcity-pprochig LDPC dcodrs whos Tr grphs r grtd ccordig to uiform cofigurtio modl. Th scod mi rsult of this ppr is sclig rul for th rgy of ll, s opposd to lmost ll, cpcity-pprochig LDPC dcodrs. Wht w m by lmost sur d sur sclig rul will b md mor prcis ltr i th ppr. To fid rgy-complxity lowr bouds o clss of lgorithms computtio modl is dd. W us stdrd circuit modl tht ws first prstd by Thompso i [3]. I this modl, w cosidr th rgy of circuit implmttio of lgorithm to b th r of th circuit multiplid by th umbr of clock cycls rquird to xcut th lgorithm. W will giv mor dtild discussio of this modl ltr i th ppr. Th uthors of [4] usd th Thompso modl to lyz th rgy complxity of ll dcodig lgorithms by showig tht s th trgt block rror probbility pprochs 0, th totl rgy must pproch ifiity. I [5] th uthors showd tht y fully-prlll dcodig schm tht symptoticlly hs block rror probbility lss th must hv rgy complxity which scls s Ω log ). Ths rsults, though grl, do ot suggst th xistc of y dcodr implmttios tht rch ths lowr bouds. I this ppr, w i prticulr show tht th rgy of LDPC dcodig schms tht dirctly-implmt thir Tr grphs cot rch th Ω log ) rgy lowr boud, d i fct must hv rgy tht scls t lst s Ω log ) ). Submittd for publictio o Fbrury 5th, 05. Prstd i prt t th 04 IEEE North Amric School of Iformtio Thory, Ju 8, Toroto, Cd.

2 W bgi th ppr i Sctio II with discussio of th grph thory usd i th ppr, d w lso discuss som prior work tht rchs similr coclusios to our ppr. Th, i Sctio III w itroduc grph thory dfiitios d th circuit modl tht w will us. W lso prst som importt lmms tht will b usd i our thorms. Th, i Sctio IV, ftr dfiig som proprtis of od dgr distributios, w prst th mi thorm which shows tht lmost ll LDPC Tr grphs hv miimum bisctio width proportiol to th umbr of vrtics. W procd to show how this thorm llows us to fid sclig lws for th rgy of dirctly-implmtd LDPC dcodrs i Sctio V. Th rsults prstd i ths sctios r tru for lmost ll LDPC dcodrs i.., for st of dcodrs with probbility pprochig o), but it is ot clr whthr thr is st of LDPC dcodrs of probbility pprochig 0 tht c pproch cpcity. Thus, i Sctio VI w prst thorm tht rlts th umbr of dgs d vrtics i grph to th r of its circuit isttitio to show sclig rul tht is pplicbl to y LDPC dcodig lgorithm tht pprochs cpcity. This rsults i sur s opposd to lmost sur sclig lw for th rgy pr itrtio of dirctly-isttitd LDPC dcodr of O log ) ). A. Rltd Work o LDPC Sclig Ruls II. BACKGROUND Thr r som rsults o fudmtl limits o wirig complxity of LDPC dcodrs. I prticulr, i [6], th uthors ssum tht th vrg wir lgth i VLSI isttitio of Tr grph is proportiol to logst wir i symptotic ss, d tht th logst wir is proportiol to th digol of th circuit upo which th LDPC dcodr is lid out. Th implictio of ths ssumptios is Ω ) sclig rul for th r of dirctly-implmtd LDPC circuits, which is th sm rsult of this ppr. Howvr, ths ssumptio r tk s xioms without big fully justifid; thr crtily c xist biprtit Tr grphs tht c b isttitd i circuit without such r. Th rsult of this ppr suggsts tht, i fct, th Ω ) sclig rul is justifid for lmost ll VLSI isttitios of LDPC Tr grphs s th block lgth of ths LDPC cods grow lrg, whr th Tr grphs r grtd from uiform cofigurtio modl d sufficit coditio o th od dgr distributios is stisfid. This sclig rul is implictio of th mi thorticl cotributio of this ppr: rsult i rdom grph thory tht w prst s Thorm. I dditio to this, w provid supr-lir rgy sclig rul for ll dirctly-implmtd LDPC dcodrs, v if th Tr grph of such dcodrs is ot grtd ccordig to th uiform cofigurtio modl. B. Rltd work o Grph Thory I grph thory, thr r umbr of rsults tht study th miimum-bisctio width of grphs. Oft this work looks t grph s Lplci, which is mtrix qul to th diffrc i th grph s dgr mtrix d djccy mtrix. I [7] grph s Lplci is lyzd d it is show tht th scod lrgst igvlu, λ, c b usd to fid lowr boud of λ o th grph s miimum bisctio width. I 4 [8], th uthors fid som bouds o th bisctio width of grphs tht r rltd to this λ vlu. Th uthors i [9] provid lmost sur uppr bouds for th bisctio width of rdomly grtd rgulr grphs. Our rsult dos ot cosidr th scod grtst igvlu of th Lplci of grph to boud th miimum bisctio width. Istd, w us uiqu purly combitoril pproch to rch our lmost sur lowr bouds. Furthrmor, our lysis is of rdom biprtit grphs, s opposd to rdom rgulr grphs. As wll, our rsult mks oly wk ssumptios o th od dgr distributio to gt our lowr boud, without rquirig dgr-rgulrity ssumptio. Th grlity of th rsult llows us to pply th thorm to fid sclig rul for th r of lmost ll cpcity-pprochig dirctly-implmtd LDPC dcodig circuits.

3 3 Fig.. Exmpl of two grphs with miimum bisctio lblld. Nods r rprstd by circls d dgs by lis joiig th circls. A dottd li crosss th dgs of ch grph tht form miimum bisctio. A. Grph Thory Dfiitios III. DEFINITIONS AND MAIN LEMMAS Th mi rsult of our ppr ivolvs th miimum bisctio width of grph. Th miimum bisctio width is proprty of y grph. A bisctio is st of dgs tht oc rmovd divids th grph ito two subgrphs tht hv th sm umbr of vrtics. A forml dfiitio is giv blow. Dfiitio. Cosidr grph G with vrtics V d dgs E. Lt E s E b subst of th dgs. Th E s biscts G if rmovl of E s cuts V ito ucoctd sts V d V i which V V. A miiml bisctio is bisctio of grph whos siz is miiml ovr ll bisctios. Th miimum bisctio width is th siz of miiml bisctio. Grlly spkig, fidig th miimum bisctio width of grph is difficult problm it is i fct NP-Complt [0]). Th digrm i Fig. shows miiml bisctios of fw simpl grphs. Associtd with bisctio E s of grph G r two ucoctd grphs G = V, E ) d G = V, E ) iducd by th bisctio. W will rfr to th st of vrtics V d V ch s bisctd st of vrtics iducd by bisctio or, mor compctly, bisctd st of vrtics, whr th ssocitio with th prticulr bisctio is to b implicit. Not tht i this ppr w will oft cosidr dividig th vrtics of subst ito two disjoit sts V d V i which V V. For covic of discussio, w cll this procss dividig th vrtics i hlf. W mk prticulr ot of this to void i vry cs hvig to distiguish btw if th crdility of th st of vrtics i qustio is v or odd. B. Circuit Modl Ctrl to our discussio is th rltio btw miimum bisctio width of grph d th r d thus rgy) of circuit tht implmts tht grph. Our discussio pplis dirctly to LDPC dcodrs, d withi our modl w must dfi LDPC dcodr, s wll s mor grl circuit. I this ppr, th dfiitio of circuit is dptd from Thompso [3] d is cosidrd to b mthmticl objct cosistt with th followig circuit xioms. This modl ws lso usd i [4] to fid bouds o th rgy complxity of codig d dcodig lgorithms. W lso provid digrm of xmpl circuit i Figur. A circuit is collctio of ods d wirs lid out o plr grid of squrs. Ech grid squr c b mpty, c coti computtiol od somtims rfrrd to mor simply s od), wir, or wir crossig. A circuit lso hs som spcil ods clld iput ods d lso output ods. Th purpos of circuit is to comput fuctio f : 0, ) 0, ) k. Such circuit is sid to hv iputs d k outputs. Th computtio is dividd ito τ clock cycls. Th iputs ito computtio r to b lodd ito th iput ods, d th outputs r to ppr i th output ods durig som st clock cycl of th computtio. Ech grid squr hs width λ w, kow s th wir width d thus hs r λ w. It is i this prmtr tht this circuit modl subsums diffrt VLSI implmttio tchiqus. I rl circuits, this

4 4 Fig.. Digrm of possibl VLSI circuit. Grid squrs tht r fully filld i rprst computtio ods d th lis btw thm rprst wirs. prmtr my b vlu lik 4 omtrs. Our cocr i this ppr is ot wht this vlu is, but rthr i providig sclig ruls i trms of th VLSI implmttio tchology usd. Th computtiol ods r th computig prts of th circuit. A od hs t most 4 bidirctiol wirs coctd to it, which r usd to fd i bits ito th od d fd out th bits computd by th od. Ech od is cpbl of computig fixd fuctio of th bits fd ito it by th wirs coctd to thm durig ch clock cycl. I prticulr, od with f 4 wirs ldig ito it c comput y fuctio g : {0, } f {0, } f. Howvr, computtiol od is rstrictd to oly b bl to comput th sm fuctio t ch clock cycl. W ot, of cours, tht th output of prticulr od could chg with ch clock cycl bcus, i grl, th iputs ito th fuctio could chg with ch clock cycl. Th wirs r th commuictio prt of circuit. Wirs i circuit r coctios btw computtiol ods, d r ssumd i our modl to b bidirctiol. At ch clock cycl wir c crry o bit i ch dirctio. Th bits commuictd r output of th fuctio computd by th computtiol od to which th wir is coctd. A wir c b plcd i grid squr i wy tht cocts o dg of th grid squr to som othr dg. Thus, grid squrs cotiig wirs c b coctd to form wir ldig from o od to othr od. A iput od is spcil od i th circuit. I dditio to big bl to comput y fixd fuctio mppig its f 4 iputs to its f 4 outputs, this od is lso giv iput bit ito th circuit. I grl, t ch clock cycl iput od c hv s its iput w iput ito th fuctio. Thus, w sy tht iputs, i grl, c b srilizd; tht is, thy c b ijctd ito th circuit t diffrt clock cycls of th computtio. Usully it is ssumd tht th iputs ito iput od r chos from th st {0, }; howvr, somtims spcilly for th purpos of lowr boud) w c ssum tht th iputs ito iput od r chos from lrgr st of vlus. I [5] it ws ssumd tht iput od tht is ttchd to f wirs c comput y fuctio g : {0,,?} {0, } 4 {0, } 4, {i.., th od c prform y fuctio of its 4-bit iput from th wirs coctig to it, s wll s its iput, tk from th symbols {0,,?}, whr i th cs of this ssumptio? is cosidrd rsur symbol. I our lysis w c ssum tht rsur is vlid iput s wll, howvr this is ot ctrl ssumptio of this ppr d th rsults pply to iputs big tk from th st {0, }. A output od is othr spcil od i circuit. It is prmittd to, lik y othr od, comput y fuctio of its iputs, but it is giv dditiol output. Thus, i th cs of output od with f 4 wirs ldig from it, th output od c prform y fuctio g : {0, } f {0, } f+ whr o of th bits i th output is distiguishd s output bit. Th output od is rquird to hold i its output bit som circuit output durig st clock cycls. I fully prlll computtio

5 5 th output od is rquird to hold o output bit of th computtio t th d of th computtio, but i grl th outputs my b srilizd, d o output od c b rsposibl for outputtig umbr of th outputs of th computtio, whr ch output hs spcifid clock cycl durig which it is to ppr. A wir crossig i circuit is grid squr tht cotis two wirs tht cross ch othr. A xmpl of circuit with computtiol ods, wirs, d wir crossig is giv i Fig.. Th ormlizd r of circuit is th umbr of grid squrs occupid, d it is dotd with th symbol A. Th umbr of grid squrs occupid with ods/wirs is th ormlizd r of th ods/wirs of th circuit, d is dotd Ā/Āw. Thus, th ctul r of th circuit is A = λ wā d th r of th ods/wirs r dfid similrly by multiplyig th ormlizd vlu by λ w, th r of uit grid squr. Th rgy of computtio is proportiol to th product of th r of th circuit, tims th umbr of clock cycls. Rl VLSI circuits r md of coductig mtril lid out sstilly flt; thus, i our modl, w sy tht th cpcitc of circuit is proportiol to its r. A circuit works by, t vry clock cycl, chrgig or dischrgig its wirs. It is thus ssumd tht th rgy of computtio is proportiol to CV dd τ whr C = C uit-ra. Thus, w c dot th rgy of computtio s E comp = ξ tch A c τ whr ξ tch = C uit-rvdd is costt tht vris dpdig o th tchology usd to implmt th circuit. For dcodr circuits w oft dot th rgy of computtio s E dc whr th subscript idicts th typ of computtio prformd by th circuit udr cosidrtio. Not tht th rstrictio tht ch od hs t most four iputs d four outputs is somwht rbitrry; it is lso rbitrry tht ch od is prmittd to comput y fuctio of its iputs ll t th sm cost. I rl VLSI implmttios it my b tht rrgmt of trsistors c comput som fuctios mor fficitly th othrs. Howvr, our modl dos ot cosidr wht gis could b md if crti fuctios r chpr i rgy ss to comput. O th othr hd, th modl subsums th itrcoctio complxity of th iputs of th fuctio to thir outputs. I th fild of rror cotrol cods, this itrcoctio complxity hs b show to b sigifict fctor i th rgy of computtio i, for xmpl, [], []. C. Rltioship Btw Circuit Modl d Grphs This ppr lyticlly chrctrizs rltioship btw th rgy of LDPC dcodrs s fuctio of block lgth d gp to cpcity. To udrstd this w must first dfi wht is mt by LDPC dcodr implmtd ccordig to th Thompso VLSI modl. To udrstd this w must first udrstd th coctio btw circuit d th grph corrspodig to circuit. Not tht circuit is collctio of ods coctd by wirs. Ech of th computtiol ods of circuit c b thought of s th vrtics of grph, G = V, E). Th wirs of circuit corrspod to th dgs of grph. I prticulr, two vrtics v d v r coctd i th grph G by dg if d oly if thr is wir coctig th two computtiol ods tht corrspod to v d v. Thus, y circuit c b cosidrd grph. As wll, y grph c b implmtd s circuit lthough of cours thr my b my wys to implmt prticulr grph o circuit). Not tht lthough circuit, ccordig to our modl, must b plr, sic w lso llow wir crossigs, y grph c b implmtd, though it my b tht mor complx grphs rquir fr mor circuit r. Not tht syig tht circuit hs corrspodig grph is slight bus of trmiology: grph, ccordig to commo dfiitios, dos ot llow for two dgs btw th sm ods, but obviously two computtiol ods r prmittd to hv two or mor wirs coctig thm. Mor prcisly, w m tht circuit hs corrspodig multi-grph. Howvr, for th sk of simplicity w simply cll circuit s corrspodig multigrph grph, d w hop tht this dos ot cus cofusio for th rdr. Somtims i our discussio w my wt to rfr ot to prticulr od of th circuit corrspodig to th od of grph), but rthr to th ods ssocitd with subcircuit, which lds to th followig dfiitio.

6 6 A subcircuit is circuit corrspodig to subst of ods of th grph d th wirs coctig thm. I prticulr, it is th circuit iducd by dltig ll wirs ot coctig th ods of itrst d by dltig ll th othr ods i th grph. Ay subcircuit hs ssocitd with it both itrl wirs th wirs coctig th ods of this circuit) d lso xtrl wirs, th wirs ldig from ods withi th subcircuit to ods from outsid th subcircuit. Not tht th otio of subcircuit corrspods to prticulr subgrph of th grph of th circuit. I th lgug of grph thory [3], w c sy tht subcircuit with computtiol ods corrspodig to som subst of V V corrspods to th subgrph iducd by th vrtics i V. Not tht y subst of th computtiol ods of grph iducs subcircuit d lso subgrph of th circuit s grph. D. LDPC Dcodrs A LDPC cod is lir cod first ivtd by Gllgr i []. All lir cods c b spcifid by prity chck mtrix. Ctrl to th costructio LDPC cods is th Tr grph of th cod corrspodig to prity chck mtrix of th cod. A Tr grph is biprtit grph. Thus, such grph hs two prtit sts, or sts of ucoctd vrtics which r rfrrd to s th chck ods d th vribl ods. A, k) LDPC cod hs ssocitd with it Tr grph with vribl ods d t lst k chck ods w sy t lst bcus it my b tht som of th lir costrits iducd by th chck ods r ot lirly idpdt). Th vribl ods corrspod to th symbols of block lgth codword i th LDPC cod. A codword c {0, } is i th LDPC cod grtd by Tr grph if, for ch chck od i th Tr grph of th cod, th mod sum of th vlus of th vribl ods to which thy r coctd is 0. Th ssocitio of st of lir costrits with Tr grph lds to turl d vry fficit mthods of dcodig tht xploit th sprs tur of th Tr grph. A LDPC dcodig lgorithm ssocitd with Tr grph is mssg-pssig procdur. Ech vribl od is thought cocptully to b coctd to thir chck ods, d ch chck od corrspodigly to thir vribl ods. I grl, vribl od hs s its iputs mssg pssd to it from ch of th chck ods to which it is coctd, s wll s th output of oisy chl. A vribl od, i grl, is bl to comput y fuctio of ths iputs d pss th outputs of this computtio to its djct chck ods. Th chck ods r similrly llowd to comput y fuctio of thir iputs which will b i grl th outputs of th vribl ods to which thy r coctd). A itrtio of LDPC dcodr is o istc of this procdur: th vribl ods computig fuctio tht is th pssd to th chck ods, d th th chck ods computig fuctio of ths mssgs d pssig th output of ths fuctios bck to th vribl ods to which thy r coctd. A good LDPC dcodig lgorithm should choos ths fuctios wll, so tht, t th d of crti umbr of clock cycls τ, th vribl ods hold withi thm stimt of th origil iput ito oisy chl. I th most grl cs, w llow th chck d vribl ods to comput diffrt fuctios of thir iputs durig diffrt itrtios i.., th fuctio thy comput i grl my vry i tim). Gllgr discussd vrity of ths mssg pssig procdurs i []. To isttit LDPC dcodig lgorithm i circuit, w cosidr two possibl prdigms, dirctlyimplmtd tchiqu i which th Tr grph of LDPC cod is dirctly isttitd i som ss by th circuit, d complt-chck od srilizd tchiqu, i which th Tr grph is ot cssrily dirctly implmtd, but thr r subcircuits i th grph corrspodig to ch chck od d LDPC mssg pssig procdur is prformd. A dirctly-isttitd LDPC dcodr c b thought of s circuit tht hs grph tht is implmttio of Tr grph of th udrlyig LDPC cod. To b prcis, w will us trmiology borrowd from grph thory rgrdig th subdivisio of grph. Dfiitio. Suppos grph hs dg,, coctig vrtics v d v. Th subdivisio of dg i grph is procss tht tks th grph G d forms w grph G with dditiol vrtx v

7 7 d two dditiol dgs coctig v d v to v by rplcig with two dgs. A subdivisio of grph G is grph obtid by th succssiv subdivisios of dgs i th grph. If grph G hs subgrph tht is subdivisio of grph G, th w sy tht th grph G cotis grph G. This lds to importt lmm tht will llow us to coct bouds o grph proprtis of Tr grph to th r of dirctly-implmtd LDPC dcodrs. Dfiitio 3. A dirctly-implmtd LDPC dcodr is circuit ssocitd with LDPC cod with Tr grph T. Cosidr th grph ssocitd with th circuit. Th circuit is dirctly-implmtd LDPC dcodr if its grph cotis T. This ms tht circuit is dirctly-implmtd LDPC dcodr if thr r subcircuits corrspodig to ch vribl od d dgs ldig from ths blck boxs tht coct to subcircuits tht corrspod to th chck ods of th Tr grph. Associtd with y grph G is qutity tht w will cll th miimum r of circuit implmttio of G, or, to b mor cocis, th r of G. Th r of grph G is th circuit with corrspodig grph G with th miimum umbr of grid squrs occupid. W dot this qutity s A mi G). Lmm. If grph G cotis grph G, th A mi G) A mi G ). Rmrk. This is vry ituitiv id. If grph cotis othr grph, th turlly o would rgrd th origil grph s lrgr i som ss th th grph tht it cotis. This otio will b usd to coct boud o th r of circuit implmtig th Tr grph of LDPC cod to boud o dirctly-implmtd LDPC dcodrs. Proof: Suppos tht A mi G) < A mi G ). Cosidr th circuit with miiml r tht implmts G. W c us this circuit to costruct circuit for G with r lss th A mi G ), rsultig i cotrdictio. Sic G cotis G, thr is subgrph of G tht is subdivisio of G. Cosidr th subcircuit ssocitd with tht subgrph. Clrly, this subcircuit hs r lss th or qul to A mi G). Dlt thos ods of this subgrph tht corrspod to subdivisios of dgs of G. O circuit, this corrspods to rplcig computtiol od with mrly wir. This procss dos ot chg th r of this subgrph, d it will rsult i circuit for G lss th A mi G ), cotrdictio. Thr is ky rsult ttributd to Thompso [3] tht rlts grph s miimum bisctio width to th r of circuit implmtig tht grph, prstd i th followig lmm. Lmm. If grph hs miimum bisctio width ω, th th r of circuit implmtig this grph is lowr boudd by A c λ wω 4. Proof: S Thompso [3] for dtild proof. Currtly, our dfiitio of dirctly-implmtd LDPC dcodr subsums my prcticl implmttios of LDPC dcodig lgorithms, but i prctic circuits c b implmtd tht prform LDPC dcodig lgorithm d do ot dirctly isttit th Tr grph of th cod. This thus motivts th followig dfiitio of mor grl typ of LDPC dcodr. Dfiitio 4. A, k) complt-chck-od LDPC dcodr ssocitd with Tr grph T is circuit with sprt subcircuits ch corrspodig to vribl od i T d o subcircuit corrspodig to ch chck od i T. Durig o itrtio mssg must b pssd from ch vribl-od subcircuit to ch djct chck-od subcircuit, d lso from ch chck-od subcircuit to ch djct vriblod subcircuit. To b prcis, th chck-od subcircuits tht r djct to vribl-od subcircuit r thos chck-od subcircuits tht corrspod to chck ods i T tht r djct to th vribl od tht corrspods to th vribl-od subcircuit of itrst. Th vribl-od subcircuits tht r djct to chck-od subcircuit r dfid similrly.

8 8 Not tht for such circuit w do ot rquir tht wir xists i th circuit for ch dg i th Tr grph. Thus, it is possibl tht complt-chck-od LDPC dcodr c us th sm wir multipl tims, but i diffrt clock cycls to commuict iformtio durig itrtio. Our rsults rly o th vlutio of som limits, which w prst s lmms blow. Lmm 3. Suppos P ) = O k) for som k > 0 d is positiv for sufficitly lrg, d thr is squc,,... tht icrss without boud. Th: lim i) xp i f )) i = 0 if lim f ) > 0. Proof: Sic lim f ) > 0 d th squc i icrss without boud, th for sufficitly lrg i, f i ) > c for som c > 0 i prticulr for y c strictly lss th th vlu of th limit). Th, for sufficitly lrg i, P i ) xp i f i )) P i ) xp c i ). Clrly, lim i P i ) xp c i ) = 0 d bcus P ) is positiv for lrg ough, P i ) xp i f i )) > 0 for lrg ough i. Th limit thus follows from th squz thorm. Lmm 4. For y two positiv itgrs m d i which for itgr Y > 0 whr Y Z d both m Z d Z, m + Y ) m!! Z! Y Z)!. ) Proof: Sic m + Y, th = Y m surly mximizs th product m!! rgrdlss of y dditiol rstrictio o ). Suppos possibl choic of m = Z c d m = Y Z + c, for som c > 0 i which Y Z + c Z. W divid Z! Y Z)! by th qutity Z c)! Y Z + c)! d show tht this qutity is grtr th or qul to, mig tht Z! Y Z)! mximizs th product: Z! Y Z)! Z c)! Y Z + c)! = Z Z )... Z c + ) Y Z + c) Y Z + c )... Y Z + ) Not tht th umrtor d domitor hv prcisly c trms. Sic Z Y Z + c th trms i th umrtor r strictly grtr th corrspodig trm i th domitor, ulss Y Z + c = Z, but of cours i this cs th product is mrly qul to th uppr boud i ). IV. MAIN THEOREM Our mi thorm is fudmtlly grph-thortic i tur d pplis to grphs grtd ccordig to stdrd uiform rdom cofigurtio modl. W prst this thorm i grl form d th spciliz it to crt lmost sur sclig rul for cpcity-pprochig LDPC cods. Cosidr th st of biprtit grphs G = V L V R, E) i which V L =, V R = m, d with lft od dgr squc Λ = λ, λ,..., λ ) N) d right od dgr squc P = ρ, ρ,..., ρ m ) N) m. I othr words, for prticulr grph i this st, λ i is th dgr of v i V L, th ith lft od i th grph, d ρ i is th dgr of r i V R, th ith right od i th grph. Without loss of grlity, ssum tht th dgr squcs r ordrd, i.. tht λ λ... λ d ρ ρ... ρ m, d lso, without loss of grlity, ssum m. Dot this st G Λ, P ). Not tht th umbr of dgs i ch prticulr grph i G Λ, P ) is E = i= λ i = m i= ρ i.

9 9 For covic of coutig, w will cosidr ot th st of grphs with prticulr dgr squc, but rthr th st of cofigurtios with this dgr squc. W c ssocit ch od i grph with umbr of sockts qul to its dgr. Th, w c lbl ch sockt, so tht, for xmpl, th first od i th lft sid of th biprtit grph would hv sockts lblld L, L,... L λ, whr th symbol L ij is usd to dot th jth sockt o th ith lft od. Thus, th ith lft od would hv λ i sockts lblld L i, L i,... L iλi. Also, th right ods would hv sockts lblld R ij, whr R ij dots th jth sockt o th ith right od. This od d sockt cofigurtio modl is stdrd wy to cosidr th st of biprtit grphs tht form th Tr grphs of LDPC smbls, d i prticulr is discussd i lgth i [4]. A multigrph togthr with lbllig of th sockts of ch od is clld cofigurtio. Ay prticulr lft d right dgr squcs Λ d P hv ssocitd with thm th st of ll cofigurtios with ths od dgr squcs, d this st is clld th cofigurtio spc ssocitd with th dgr squcs. Clrly, cofigurtio is dtrmid by prmuttio mppig th E lft od sockts to th E right od sockts. Not tht thr r E! cofigurtios withi th spc of cofigurtios with dgr squcs Λ d P. Lt th st of cofigurtios with dgr squcs Λ d P b dotd B Λ, P ). Sic cofigurtio is mrly grph with lbllig of sockts for ch od, grph proprtis c b xtdd to dscrib cofigurtios i th turl wy, icludig miimum bisctio width. Dfi B = {G B λ, ρ) : bisctio K E such tht K = } or i othr words lt B b th st of cofigurtios i B λ, ρ) tht hv bisctio of siz. Not tht B dos ot rprst th st of cofigurtios i B Λ, P ) with miimum bisctio width, but rthr th st of grphs with y bisctio of siz. Dfi B to b th st of ll cofigurtios i B Λ, P ) tht hv bisctio of siz or lss, or i prticulr B = B i. Dfi δ L Λ) = i=0 fuctio of prticulr lft dgr squc) d lt i= λ i 3) σ L Λ) = E δ L. W dfi ths qutitis so tht y subst of hlf th lft ods c hv t most δ sockts ldig from ths ods. Similrly, dfi δ R P ) = m ρ i m i= m d σ R P ) = E m δ R Th qutitis δ L Λ) d σ L Λ) r fuctios of th lft dgr distributio. As wll, δ R P ) d σ R P ) r fuctios of th right dgr distributio. For covic, w my somtims dot ths qutitis s δ L, σ L,δ R d σ R, d thir dpdc o th dgr distributios is to b implicit. Thus, it is clr tht th totl umbr of dgs i such cofigurtio is δ L + σ L = δ R m + σ R m. Dfi δ Λ, P ) = mx δ Λ), mδ P )) 4)

10 0 d dfi σ Λ, P ) = E δ. For ottiol covic w will bbrvit ths two qutitis s δ d σ d thir dpdc o th od dgr distributio udr discussio is to b implicit. Not tht E =. Ths qutitis r dfid so tht i y subst of hlf th ods ) +m of cofigurtio i B Λ, P ), th miimum of th umbr of lft sockts d right sockts cot xcd δ. This obsrvtio will b usful i drivig th bouds i this d will b md mor forml i Lmm 5. Cosidr giv st of ods N V for biprtit multigrph s dfid bov, with lft dgr squcs Λ d right dgr squcs P. For giv subst of vrtics N w c thus divid this st ito two disjoit sts, N L d N R, whr N L is th st of ll thos vrtics i N tht r lft ods, d N R ll thos vrtics i N tht r right ods. Lt R N) = v N R dg v) d L N) = v N L dg v) b th umbr of sockts ttchd to th lft ods i N d right ods i N rspctivly. Lmm 5. For y biprtit multigrph G = V L V R, E) with lft dgr squcs Λ d right dgr squcs P, for y collctio N of +m vrtics, mi L N), R N)) δ. Rmrk. W will us this lmm i coutig uppr-boudig rgumt. Spcificlly, w will cout th umbr of grph cofigurtios tht hv bisctio of siz by dividig th vrtics tht form grph ito two qully-sizd sts. Th qutity mi L N), R N)) will b importt for our coutig bouds. Proof: Suppos ot. This implis tht both L N) > δ d R N) > δ. Divid th vrtics i N ito th lft ods N L d right ods N R. It must b tht N L + N R = +m. Thus, it must b tht N L or N R m m+ othrwis thir sum would xcd ). Lt us cosidr th cs i which N L th othr cs lds to logous rgumt). If N L d L N) > δ, th, i prticulr L N) > δ L Λ) by th dfiitio of δ. But δ L Λ) by dfiitio 3 is th sum of th highst dgr lft ods. A collctio of t most hlf ths ods cot xcd this qutity, ldig to cotrdictio. Lmm 6. If cofigurtio G = V L V R, E) with dgr squcs P d Λ is grtd ccordig to th uiform cofigurtio modl, th th probbility tht this cofigurtio is i th st B d hc hs bisctio of siz or lss, wh 0 < σ 5) is uppr boudd by P B ) + ) ) E ) 4! δ)! σ )!. 6) )! Proof: Follows from strightforwrd coutig uppr-boudig tchiqu giv i th ppdix. This lmm c b usd to prov our mi thorm which shows tht if squc of od-dsockt cofigurtios is grtd uiformly ovr ll such cofigurtios, d th qutitis δ d σ qutitis tht could i grl chg with ch lmt of th squc) scl ccordig to prticulr coditio, th th probbility tht cofigurtio i this rdomly grtd squc hs smll bisctio proportiol to or lss) pprochs 0. Our mi thorm cocrs squcs of rdom cofigurtios. Spcificlly, w cocr ourslvs with squc of rdom cofigurtios G, G,... whr ch G i i th squc is cofigurtio grtd ccordig to th uiform cofigurtio modl, i which th ith cofigurtio is drw ccordig to od dgr distributios Λ i d P i. Not tht th rdomss for ch lmt of such squc dos ot com from th dgr distributios: w r ssumig tht ths distributios r fixd. It is th itrcoctios btw ods tht is rdom. W spcificlly cocr ourslvs with squc i which th umbr of lft ods icrss without boud. For such squc, dot th umbr of

11 lft ods of th ith cofigurtio s i. W will bbrvit th qutitis δ Λ i, P i ) d σ Λ i, P i ) with th symbols δ i d σ i rspctivly, whr w rcll thir dfiitios i 4) d IV). Wh th dpdc o i is clr, th subscript for ths symbols my b omittd for covic. Thorm. Suppos tht thr is squc of rdomly grtd biprtit cofigurtios with sris of dgr squcs i which i which th umbr of lft ods pprochs ifiity, d if ) )) lim H δi + δ i l + i δ i + σ i )) σi σ i l < 0 7) δ i + σ i th thr xists som β > 0 i which lim P ) Bβ i i 0 d i prticulr, this occurs for y vlu of 0 < β < σ tht stisfis: ) ) )) β β lim H + 4H + β l i δ i + σ i σ i β )) )) δi σi β +δ i l + σ i l < 0. 8) δ i + σ i δ i + σ i Rmrk 3. This thorm sys tht subjct to som coditio o th vrg dg dgrs of th cofigurtios, s ths cofigurtios gt lrgr th probbility tht th cofigurtio grtd hs bisctio proportiol to or lss gts vishigly smll. W will us this rsult to show tht for cpcitypprochig LDPC dgr distributios, th miimum bisctio width must b lrg i som ss, implyig tht circuit implmttios of ths LDPC Tr grphs must grow quickly s wll, with high probbility. Th coditio i 7) rcogizs tht for squc of such grphs, th qutitis δ d σ could chg with icrsig. If th coditio is stisfid which w will s for cpcity-pprochig LDPC dgr squcs it must) th with high probbility th grphs do ot hv smll bisctio. Proof: of Thorm ) Cosidr first spcific rdom cofigurtio i th squc with block lgth d od dgr distributios tht rsult i vlus for δ d σ. W will us th bouds of Lmm 6 d th pply wll kow pproximtios. Firstly, w us th wll kow bouds tht d tht xp l )))! ) xp H k xp l )) k ))) + whr H x) = x log x x) log x). W us bs s opposd to bs i ordr to covitly simplify th xprssios tht follow. Applyig ths bouds ppropritly to th boud i Lmm 6, d groupig trms tht grow slowr th ito rbitrry polyomil trm P ) w gt th followig: ) )) P B) P ) + ) xp H + 4H E )) ) + δ + xp l + δ l )) σ + xp σ ) l xp ) l )).

12 Expdig th lst two trms i th xpot givs us: ) )) P B) P ) + ) xp H + 4H E )) ) + δ + xp l + δ l ) )) σ + σ + xp σ) l l ) )) xp δ) l σ) l. Fctorig th trms i th xpot with trm, δ trm, d σ trm givs us: ) )) P B) P ) + ) xp H + 4H E ) ))) + σ + xp l l ) ))) σ + xp σ) l l ) ))) δ + xp δ) l l. Simplifyig th logrithmic xprssios i ch li givs us: ) )) P B) P ) + ) xp H + 4H E ))) + xp l σ + ))) σ + xp σ) l ))) δ + xp δ) l. W ow lt = β, which will stisfy th coditio spcifid i 5) for β < σ. Mkig this substitutio d lso usig tht E = to xpd th E trm i th first li of th xprssio givs us: P Bβ) P ) β + ) ) )) β xp H + 4H ))) β + xp β l σ β + ))) σ β + xp σ) l ))) δ + xp δ) l.

13 3 Simplifyig ch quotit withi th logrithms, d groupig th β + ) trm ito our rbitrry polyomil trm: P ) )) ) β Bβ P ) xp H + 4H β + ))) xp β l σ β + σ β + ))) xp σ) l δ + ))) xp δ) l. By fctorig th trm d by pplyig Lmm 3, w s tht th bov xprssio will pproch 0 if ) ) β β + )) lim H + 4H + β l i σ β + σ β + )) δ + )) + σ) l + δ) l 0 whr w rcll gi tht th dpdc o i i this xprssio coms from th trms d th δ d σ trms whos dpdc o i w hv supprssd for ottiol compctss). This is tru if ) ) )) β β lim H + 4H + β l i σ β )) )) σ β δ +σ l + δ l 0. Also ot tht this is th coditio o β giv i 8). To driv th coditio i 7), w fid th limit s β pprochs 0 of this xprssio, d trtig th othr trms s costts, givig us: ) )) σ H + σ l )) δ +δ l 0 ) = 0 d limx x l x σ x)) = 0 to whr w hv pplid th sily vrifibl fcts tht lim x 0 H x c gt rid of th scod d third trms i th xprssio. Thus, if this coditio is stisfid, by th dfiitio of limit, thr xists sufficitly smll β i which lim i P Bβ) = 0. As w r cosidrig squc of cofigurtios, w lt ω i b th miimum bisctio width of th ith cofigurtio. This Thorm hs obvious corollry. Corollry. If thr is squc of cofigurtios s dscribd i Thorm, i which th coditio i 7) is stisfid th lim i P ω i β i ) =. Proof: Not tht th vt B is th vt tht rdom cofigurtio hs bisctio of siz or lss. Th complmt of this vt is th vt tht rdom cofigurtio hs o bisctio of siz or lss, d thus qul to th vt tht rdom cofigurtio hs miimum bisctio width grtr th or qul to. Th corollry flows dirctly from this obsrvtio.

14 4 A. Applictio to Spcific Squc of Rdom Cofigurtios Our rsult i Thorm c b dirctly pplid to th Tr grphs of spcific squcs of LDPC cods. For xmpl, cosidr rgulr LDPC smbl with vribl od dgr 6 d chck od dgr 3. A rdomly grtd Tr grph with this dgr distributio would hv δ = = 6 = 3 d σ = E 3 = 3. I this cs w c comput tht th coditio i 7) vluts to: ) H ) H δ )) δ l )) 3 l σ )) σ l = )) l.77 which w s is lss th. Thus, pplyig our thorm ms tht sic th coditio 7) is stisfid, if rdom Tr grphs r grtd with this dgr distributio, with probbility pprochig th miimum bisctio width of ths grphs will b proportiol to. V. ALMOST SURE BOUNDS ON CAPACITY APPROACHING LDPC CIRCUITS W will us th rsult bov to fid lmost sur sclig rul for th rgy of cpcitypprochig dirctly-implmtd dcodig schm i which th Tr grph of ch dcodr is grtd ccordig to uiform cofigurtio modl with st od dgr distributio. Cosidr dcodig schm C, C,... i which ch of th dcodrs i th schm r dirctlyimplmtd LDPC dcodrs, s i Dfiitio 3. W ssocit schm with chl tht th dcodrs r to dcod. Lt th cpcity of tht chl b C. Lt th ith dcodr hv ssocitd block lgth i. Lt th rt ssocitd with th ith dcodr b R i. Lt th gp to cpcity ssocitd with th ith dcodr b η i = R i. Lt th r of th ith dcodr b A C i, d th rgy of th ith dcodr b E i. Lt th miimum bisctio width of th Tr grph of th ith dcodr b ω i. W cosidr fmily of LDPC dcodig schms i which th Tr grph of ch dcodr i th schm is grtd ccordig to uiform cofigurtio modl. Thus, w sy tht th Tr grph of dcodr i is grtd uiformly from fmily B i Λ, P ) of cofigurtios. W c thus discuss th probbility of th ith dcodr hvig crti proprtis. I prticulr, i th corollry blow, w will lyz P ω i β i ), th probbility tht th ith dcodr hs Tr grph with miimum bisctio width grtr th β i, d show tht this pprochs, rsultig i lmost sur rgy sclig rul for cpcity-pprochig LDPC dcodrs. W lt th vt tht th ith dcodr hs bisctio of siz or lss to b Bi, Corollry. For fmily of cpcity-pprochig dirctly-implmtd LDPC dcodig schms whr th Tr grph of ch dcodr is grtd ccordig to uiform ) cofigurtio modl, lim i P A i c i ) = for som costt c > 0. Similrly, lim i P A i c = for costt c > 0. η i ) 4 Proof: Not tht Tr grph is i fct biprtit grph s dscribd i th Thorm i which th block lgth corrspods to d th umbr of chcks corrspods to m. For squc of LDPC cods to pproch cpcity, th rsult i [5] implis tht E R) Ω l η Thus, s cpcity is pprochd, th umbr of dgs pr od must pproch ifiity, d thus th qutity δ must pproch ifiity. W c thus show tht th xprssio: ) )) )) δ σ H + δ l + σ l < 0 9) ))

15 5 must b stisfid for sufficit closss to cpcity. To s this, ot tht δ pprochs for cpcity-pprochig cod. Wht hpps to σ is ithr δ ) lim < or b) lim δ+σ δ =, or c) this limit dos ot xist. Not tht this vlu cot δ+σ xcd bcus cssrily σ δ. I th cs of c), it must b tht th vlu of σ ltrts d o limit c b dfid. I this cs, howvr, w should cosidr th spcific subsquc of dcodrs i which ithr ) or b) pplis. It will b clr tht sic for ch subsquc th pproprit sclig rul holds, thus it must b tru for th tir squc. I cs ): I th limit, l ) δ δ+σ < 0 d so δ l δ δ+σ)), s δ pprochs. Sic σ l σ δ+σ)) < 0 i y cs cosquc of σ δ), thus i th limit th iqulity 9) will b stisfid. For cs b), i which l ) σ δ+σ, ot tht σ is positiv, so σ l σ δ+σ)), d thus i th limit 9) will lso b stisfid. Not tht ch Tr grph i th squc udr cosidrtio is grtd ccordig to th uiform cofigurtio modl. Sic th squc is cpcity pprochig, by th rgumt bov th od dgr distributios stisfy th sufficit coditio of Thorm. Thus, by pplyig Corollry, lim P w i β i ) =. 0) i W combi this rsult with Thompso s [3] rsult prstd i Lmm tht th r of VLSI isttitio of grph with miimum bisctio width ω is lowr boudd by A c λ wω. Thus, th vt 4 tht ω i β i implis tht A i λ w β i) d thus, 4 ) lim P i A i λ w β i ) s xprssd i th thorm sttmt. This rsult c b usd to udrstd how th r of lmost ll circuits tht isttit rdom Tr grphs of LDPC cods must scl s cpcity is pprochd. It is wll kow from [6], [7] tht, s fuctio of frctio of cpcity η = R, th miimum block lgth rquird for y cod scls s: C 4 b η) for costt b tht dpds o th chl sttistics d lso th trgt probbilitis of rror. W r ot cocrd with th vlu of this costt but rthr th dpdc of this xprssio o η. W us this to ot tht, if ω i β i, th, rcogizig from Dfiitio 3 tht dirctly-isttitd LDPC dcodr must coti its Tr grph, d lso pplyig Lmm which sys tht circuit must b biggr th th miimum r of circuit isttitio of grph tht th circuit cotis, th A c λ wβ 4 λ wβ 4 b η) 4 Ω = Combiig this obsrvtio with th rsult i 0) rsults i ) lim P c A i i η i ) 4 = for costt c > 0, fiishig th proof. η) 4 ).

16 6 Applicbility of this Rsult Thr is mior dtil tht ds to b dlt with for this thorm to b truly usful. Our rsults ssum tht Tr grph is dirctly implmtd i wirs. This is idd prcticl wy to crt dcodig circuit. Howvr, ccordig to our cofigurtio modl, it is possibl tht two or mor dgs c b drw btw th sm two ods. This typ of coflict is usully dlt with by dltig v multi-dgs d rplcig odd multi-dgs with sigl dg s dfiitio 3.5, th Stdrd LDPC Esmbl i [4]). This lds to pottil problm with th pplicbility of our thorm: wht hpps if th dgs tht w dlt form miimum bisctio of th iducd grph? I tht cs it is possibl tht th grph w isttit o th circuit hs lowr miimum bisctio width th tht which w clcultd, d thus could possibly hv lss r. Howvr, this is rsolvd by th fct tht i th limit s pprochs ifiity for stdrd LDPC smbl, th grph is loclly tr-lik Thorm 3.49 i [4]) with probbility pprochig. This implis tht th probbility tht th umbr of multi-dgs i rdomly grtd cofigurtio is som frctio of must pproch 0 or ls th grph would ot b loclly tr-lik, cotrdictig th thorm). Hc, v if w did dlt ths multi-dgs from th rdomly grtd cofigurtio, this could t most dcrs th miimum bisctio width by th umbr of dltios, but this umbr of dltios, with probbility, cot grow lirly with. Hc, th miimum bisctio width must still, with probbility, grow lirly with, d our sclig ruls r still pplicbl. A. Ergy Complxity of Cpcity Approchig Complt-Chck-Nod LDPC Dcodrs Blow w will cosidr squc of cpcity-pprochig, complt-chck-od srilizd dcodrs. Rcll tht ths dcodrs do ot dirctly isttit thir Tr grph i wirs, but thy do hv subcircuits corrspodig to ch chck d vribl od. I ch itrtio, possibly ovr svrl clock cycls, mssgs r to b pssd from ch vribl od subcircuit to thir corrspodig chck od subcircuit d similrly for th chck od subcircuits pssig mssgs to thir corrspodig vribl od subcircuits. It my b tht th sm wir is usd to trsmit diffrt mssgs durig diffrt clock cycls of th sm itrtio of th computtio. It is thus possibl tht such mthod c dcrs wirig r by ot rquirig wir for ch dg of th Tr grph) t th cost of mor clock cycls. W prov blow tht such mthod still rsults i supr-lir lmost sur lowr boud o rgy complxity. So thr is o mbiguity, squc of dcodrs for chl with cpcity C with rts R, R,... is cpcity-pprochig if lim i R i = C. Corollry 3. For squc of cpcity-pprochig, complt-chck-od srilizd LDPC dcodrs whos Tr grphs r grtd ccordig to th uiform cofigurtio modl, ) lim i P E i c.5 i ) = for som c > 0. Also, lim i P E i = d lim i P =. ) c η) 3 E i k c η Proof: I cosidrig complt-chck-od srilizd LDPC dcodr, w ot tht such dcodr cotis grph with vribl ods d t lst k chck ods. W will us rgumts similr to thos usd by Thompso [3] d Grovr [4]. Lt th miimum bisctio width of th Tr grph of th ssocitd with th ith dcodr b ω i. Suppos tht th grph of th circuit implmtig this dcodr hs miimum bisctio width W i w us th symbol W i to distiguish this from th miimum bisctio width of th Tr grph ω i of th ith dcodr, rcllig tht w do ot rquir i this cs tht th circuit cotis th udrlyig Tr grph). Thus, i o itrtio, th umbr of bits commuictd btw y bisctio of th ods must t lst b ω i. O itrtio must b prformd, but sic th miimum bisctio width of th grph ssocitd with this circuit is W i, this rquirs tht mor clock cycls r usd to pss th iformtio btw th chck d vribl ods, d i prticulr τ i W i ω i. ) W lso kow from Lmm tht A i λ w W i 4 d so combiig with th iqulity i ) givs us:

17 7 A i τi λ wwi τi 4 λ wω i 4. ) Trivilly, bcus thr r i vribl od subcircuits i th circuit, A i i d thus combiig with ) w gt A i τi λ wωi i 4 d thus, tkig th squr root of both sids of this iqulity, A i τ i λ wω i 0.5 i. Sic rgy is proportiol to th product of circuit r d umbr of clock cycls, this implis tht for ch dcodr i th squc E i ξ tch ω i 0.5 i. for th costt ξ tch tht dpds o th spcific tchology usd to implmt th circuits. Usig th sm rgumts s Corollry w c show tht for cpcity-pprochig LDPC schm lim i P ω i β i ) = for som β > 0. Followig th logic bov, th vt tht ω i β i implis E i ξ tch βi.5 which thus implis lim i P E i c.5 i ) = for som costt c > 0, ) Also, followig th sm logic s i Corollry, lim i P B. Limittios of Rsult E i ) c η) 3 = d lim i P E i k c η A gol of this rsrch is to fid fudmtl bouds o th rgy complxity of cpcity-pprochig dcodrs s fuctio of η = R. Th rsult prstd hr dos ot quit do this, but it dos dvis C girig by suggstig tht if is vry lrg, o c b rsobly sur tht th r of circuit tht isttits rdomly grtd Tr grph will hv r tht scls s Ω ). Of cours, w hv ssumd tht this Tr grph hs b grtd by goig to ch sockt of th lft ods d rdomly fidig coctio to rmiig right sockt. This is of cours vry turl wy to grt Tr grph, d is i fct usd i th lysis of LDPC cods [4]. This is ot to sy, of cours, tht thr do t xist good LDPC codig schms with slowr sclig lws. Crtig squc of LDPC cods tht voids this sclig lw with probbility grtr th 0 would b possibl if th rdom grtio rul for th LDPC grph ws somhow ltrd. For xmpl, prhps th vribl ods d chck ods could b plcd uiformly scttrd through grid d th th rdomly plcd dgs, istd of big chos uiformly ovr ll possibl dgs, r chos uiformly ovr choic of dgs coctig vribl d chck ods tht r clos to ch othr. I prctic, Tr grph is oft modifid to prvt itrcoctios tht r too fr btw chck d vribl ods tht rsult i log wir lgth d thus highr rgy [8]. Simultio i prticulr cs c lyz whthr this tchiqu is worth th possibl cod prformc trd-off. Currtly, howvr, th commo tchiqu of grtig LDPC smbl d lyzig vrg cod prformc dos ot cosidr rgy complxity s fudmtl prmtr to b trdd-off with othr cod prmtrs. It sms likly tht if ighbors of vribl od r rstrictd to thos chck ods tht r sptilly clos by, LDPC cod could still hv good symptotic prformc if block lgths grow lrg. A lysis chllg of such schm my b to show tht symptoticlly Tr grph grtd from such distributio is loclly tr-lik. Furthrmor, lysis of th rquird block lgth usig such tchiqu to gt good prformc would b dd: v if symptoticlly such schms prform wll, it my b tht much logr block lgths r rquird for th sm prformc. Th cost of possibly lrgr block lgth for such schm would hv to b cosidrd to dtrmi whthr it is worth it to hv slowr sclig rul s fuctio of block lgth if it coms t cost of much logr block lgth. =.

18 8 Whthr or ot such squc of LDPC cods would giv good prformc is uclr. Howvr, i th followig sctio w c us kow bouds o th vrg od dgr of LDPC dcodr s wll s bouds o th r of grphs isttitd o circuit to gt sclig ruls tht r tru for ll dirctly-implmtd cpcity-pprochig LDPC dcodrs, ot just lmost ll. VI. BOUNDS FOR ALL LDPC DECODER CIRCUITS W c fid bouds for th rgy complxity for ll cpcity-pprochig dirctly-implmtd LDPC cods d ot just lmost ll) by usig th followig Thorm: Thorm. If circuit cotis grph G = V, E) tht hs o loops, ccordig to th stdrd VLSI modl, th totl r of circuit tht cotis tht grph is boudd s: ) A λ w E 4 V whr w rcll tht λ w is th wir width i th circuit, d E d V r th umbr of dgs d vrtics i th grph, rspctivly. Th proof of this thorm uss similr pproch s usd by Grovr t l. i [4], i which th A c τ complxity of circuits is rltd to th bits commuictd withi th circuit. Th rsult of this ppr, howvr, is boud o th r of circuit isttitio of grph s fuctio of th umbr of dgs d vrtics i th grph. W us similr std bisctio tchiqu s th Grovr t l. ppr. Th proof is giv i th ppdix. This rsult, combid with th rsults i [5] o th vrg dg dgr s fuctio of gp to cpcity, rsults i th followig corollry: Corollry 4. Th rgy of y dirctly-isttitd LDPC dcodr must hv symptotic rgy tht is lowr boudd by: )) N E dc Ω η) l η d vrg rgy pr bit dcodd tht scls s E dc k Ω whr N is th umbr of itrtios rquird to dcod. )) N l η Rmrk 4. Not tht th umbr of itrtios N i th bov Corollry i grl my b fuctio of th prticulr dcodig lgorithm isttitd d possibly th prticulr rcivd vctor. Our discussio dos ot lyz th umbr of itrtios rquird, so w simply writ our sclig ruls i trms of this qutity. Proof: W c combi Sso s [5] rsult tht th vrg )) prity od dgr of th Tr grph of cpcity-pprochig LDPC cod must scl s Ω l d tht th miimum block lgth of η ) [ )] y cod must scl s Ω [6], [7], mig tht E Ω k) l. Not lso tht η) η th umbr of ods i this grph must b t lst V = k = O ). Combiig ths rsults log with Thorm rsults i th sclig lws i th corollry. W ot tht this lowr boud o dirctly-implmtd Tr grphs cotrsts with th lowr bouds i [5], which show Ω l η )) ) lowr boud for th pr bit rgy complxity of fully-prlll dcodig lgorithms s fuctio of gp to cpcity. This rsult ms tht dirctly-isttitd LDPC dcodrs r cssrily symptoticlly wors th this lowr boud lbit lot closr th th Ω ) η)

19 9 Almost ll dirctly isttitd LDPC dcodrs Almost ll LDPC dcodrs All LDPC with Tr Grph Dirctly Implmtd All Fully-Prlll Dcodrs [5] Lowr Boud Sclig Rul Pr Bit E dc )) Ω N l η ) N Ω η) N )) l Ω Ω l η η ) ) k ) TABLE I SUMMARY OF THE SCALING RULE LOWER BOUNDS DERIVED IN THIS PAPER. WE PRESENT THESE BOUNDS AS A FUNCTION OF η = R C. IN THE FIRST THREE SCALING RULES PRESENTED, N IS THE NUMBER OF ITERATIONS REQUIRED WHICH IN GENERAL MAY BE A FUNCTION OF THE ACTUAL LDPC CODE INSTANTIATED, AS WELL AS THE PARTICULAR RECEIVED VECTOR). FOR COMPARISON, WE ALSO INCLUDE A RESULT ON LOWER BOUNDS FOR ALL FULLY-PARALLEL DECODERS GIVEN IN [5]. lmost sur lowr boud of Corollry ). Of cours, it is ot kow whthr th lowr bouds of th ppr i [5] r tight, but Corollry 4 provs tht dirctly isttitd LDPC dcodrs cot rch ths lowr bouds i symptotic ss. VII. CONCLUSION Th mi cotributio of this ppr is grph thortic i tur. W hv show tht subjct to mild coditio o od dgr distributios, lmost ll Tr grph isttitios hv miimum bisctio width tht scls s Ω ) whr is th umbr of lft ods. Th miimum bisctio width of grph is rltd to th r of circuit implmttios of ths grphs. W hv usd this rsult to show tht lmost ll LDPC dcodrs tht dirctly isttit thir Tr grph must hv circuit r, d thus rgy, tht scls s Ω ). W c us this rsult to provid sclig rul for th rgy complxity of lmost ll cpcity-pprochig LDPC dcodrs. W hv furthr prstd grl thorm o th r of circuits tht isttit y grph to furthr boud th r of y LDPC dcodr tht pprochs cpcity. Ths rsults r summrizd i Tbl I. Not tht our rsults show tht dirctly-isttitd LDPC cods cot rch th lowr bouds prstd i [5], thus idictd tht ithr th lowr boud citd is ot tight, or dirctly-isttitd LDPC cods symptoticlly ot optiml from this rgy prspctiv. It my lso b tht both r tru, mly tht kow lowr bouds r ot tight d LDPC cods r ot symptoticlly optiml. This rmis op qustio. APPENDIX A PROOF OF LEMMA 6 Proof: of Lmm 6) Lt th st of grphs i B Λ, P ) hvig bisctio of siz b dotd by B. Th w c sy tht, ccordig to th uiform cofigurtio modl, th probbility of th vt of grtig cofigurtio with bisctio of siz is giv by: P B ) = B E! i.., it is th crdility of th st of such cofigurtios dividd by th totl umbr of cofigurtios i with od dgrs Λ d P. W will ow boud th umbr of cofigurtios i B Λ, P ) with bisctio of siz, d w will ssum tht < σ. To do so, w will dfi qudrt cofigurtio, show tht th umbr of qudrt cofigurtios with bisctio of siz is grtr th or qul to B, d th uppr boud th umbr of qudrt cofigurtios with bisctio of siz or lss. A qudrt cofigurtio of biprtit cofigurtio G = V L V R, E) is ordrd-tupl Q = G, T L, T R, B L, B R ) whr th vrtics r dividd ito 4 disjoit sts, th top lft vrtics T L ), th top right vrtics T R ), th bottom lft vrtics B L ), d th bottom right vrtics B R ), i which

20 0 Fig. 3. A xmpl of qudrt cofigurtio ssocitd with dgr distributio whr ll th lft ods hv dgr d ll th right ods hv dgr 4, i which th umbr of lft ods = 8 d umbr of right ods m = 4. Th fully drw cofigurtio o th right is qudrt cofigurtio i Q 4, 4. Rcll tht th suprscript dots tht thr r i = 4 top lft ods d j = dgs ldig from top lft ods to bottom right ods. Th subscript idicts tht thr r = 4 dgs btw top d bottom ods, d i this cs w s tht thy cross dottd li, idictig whr th bisctio occurs. Th digrm o th lft shows th drwig of = 4 dgs crossig btw top d bottom ods. Th grph o th right shows prmuttio of th rmiig sockts i both th top d bottom ods. T L, B L V L, T R, B R V R d T R T L B L B R. Nturlly, vrtics i T L r cosidrd top lft vrtics, or, itrchgbly, top lft ods, d similrly for th othr sts of vrtics i qudrt cofigurtio. Furthrmor, vrtics i T L d T R r cosidrd to b top vrtics or top ods, d similrly for th bottom vrtics. Not tht vry biprtit grph hs t lst o qudrt cofigurtio iducd by rbitrrily dividig th vrtics i hlf, d dotig o hlf of ths vrtics top vrtics d th othr hlf bottom vrtics. Thus, th st of qudrt cofigurtios with prticulr dgr distributio is t lst s big s th st of cofigurtios with prticulr dgr distributio. Bcus qudrt cofigurtio Q = G, T L, T R, B L, B R ) cotis grph G, grph proprtis c b xtdd to dscrib qudrt cofigurtio. So, for xmpl, if w sy tht qudrt cofigurtio hs miimum bisctio width, w m prcisly tht th grph G withi th qudrt cofigurtio hs miimum bisctio width. Dot th st of qudrt cofigurtios with st od dgr distributios Λ d P i which is th umbr of dgs ldig from top vrtics to bottom vrtics s Q. Not tht th dpdc of Q o prticulr od dgr distributio is implicit. Obsrv tht vry cofigurtio with bisctio of siz hs corrspodig qudrt cofigurtio i Q crtd i th turl wy by dotig o bisctd st of vrtics s th top vrtics, d th othr th bottom vrtics. Thus B Q. For s of discussio, w will ssum tht th totl umbr of ods m+ i th st of cofigurtios udr discussio is v, so tht m+ is itgr. Dot th st of qudrt cofigurtios with bisctio of siz i which thr r i top lft ods d j dgs coctig top lft vrtics to th bottom right by Q i,j. This of cours implis tht thr r m+ i top right ods d j dgs ldig from th bottom lft to th top right ods. W c s i Figur 3 xmpl of such lmt tht w r coutig for th cs of = 8 d = 4, i = 4 d j =. Not th tht W boud th siz of Q i,j Q = Q i,j i=0 j=0 by coutig ll qudrt cofigurtios with bisctio of siz tht r th