COOLER- A Fast Multiobjective Fixed-outline Thermal Floorplanner

Transcription

1 COOLER- A Fast Multobectve Fxed-outlne Thermal Floorplanner Debarsh Chatteree Stanford Unversty debarsh@stanford.edu Theodore W. Mankas Unversty of Tulsa theodore-mankas@utulsa.edu Igor Markov Unversty of Mchgan markov@eecs.umch.edu Abstract In ths work, we study multobectve thermal-aware floorplannng n the fxed-outlne context. Our baselne mplementaton demonstrates a 14% average nterconnect mprovement over Parquet for am49, and can addtonally optmze peak on-chp temperature. To crcumvent the expense of Compact Thermal Models, we develop a novel approach to power-densty aware floorplannng, but rgorously evaluate fnal layouts usng a standard methodology based on the Hotspot tool. Wth these technques, our multobectve floorplanner COOLER, reduces peak temperature on MCNC crcuts by 15.3 C, whch s smlar to the 15.1 C reducton acheved by Hotfloorplan. However, our tool s tmes faster than Hotfloorplan. We also show that solutons found by Hotfloorplan le on the Pareto front generated by COOLER. 1. Introducton Automated floorplannng performs placement of on-chp blocks to facltate early estmaton, as well as to mprove crcut performance and yeld. These blocks typcally nclude crcut modules generated by parttonng, as well as embedded memores, IP blocks, and analog devces. The Classcal Floorplannng Problem CFP) seeks to optmze area and nterconnect, but has recently undergone several paradgm shfts due to maor changes n mcroarchtecture desgn flows. The ncreasng scale and complexty of Integrated Crcuts, as well as tme-tomarket pressures n commercal IC desgn, necesstate a top-down herarchcal approach [1]. Such an approach can be enabled by fxed-outlne floorplannng of crcut modules f module outlnes are vewed as outlnes of nested floorplans. However, n computatonal terms, fxed-outlne floorplannng s consderably harder than the correspondng CFP []. Another maor shft n floorplan desgn technology s the ntroducton of maxmum on-chp temperature as a key optmzaton obectve. Ths has become crucal n vew of the ncreasng power dsspaton n portable and statonary electroncs, due to consderable leakage current at the 65nm technology node and below, as well as ncreasng clock frequences. If ths trend contnues unchecked, power densty may reach 10,000 W/cm by the year 015 [3]. Operatng temperature may ncrease due to greater local power densty, trggerng several harmful effects, such as electromgraton and exponental ncrease n leakage, whch decreases mean tme-to-falure and ncreases the probablty of thermal runaways. Addtonally, the dependence of carrer moblty and nterconnect resstvty on temperature causes the current-drvng capablty of transstors to decrease and the nterconnect delay to ncrease as chps get hotter. As maxmum on-chp temperature T) ncreases, burnn tests used to weed out devces wth latent defects are becomng more and more tme-consumng [4]. Ths s because the dfference between maxmum burn-n temperature lmted by thermal runaway) and maxmum on-chp temperature s decreasng steadly, makng t dffcult to smulate accelerated use. Thermal optmzaton s partcularly mportant for future ICs wth memory stacked on top of random logc and for true-3d ICs, snce n both cases ar coolng s less effectve. As the peak on-chp temperature ncreases, the costs of packagng and coolng grow at the rate of $1/W above 40W [5]. Wthout proper desgn methodology, ths burgeonng overhead alone may hamper future devce scalng. In lght of thermal challenges, we consder the followng Modern Floorplannng Problem MFP): Gven a set of blocks Π = { B1, B,..., BN } wth fxed areas, a set of nets η = { N1, N,..., N m} specfyng the block nterconnectons and average power dsspaton values P = { P1, P,..., PN } of the modules, fnd the set of non-domnated W+T optmzed packngs of Π that ft n a fxed outlne specfed byw outlne H. A outlne non-domnated set also termed a Pareto-optmal set) by defnton excludes solutons whose all parameters are ether nferor or dentcal to those of another soluton. 1

2 Outlne Floorplans Fgure 1. Dependency of the fnal optmal soluton n a conventonal floorplanner on the slope of the ftness lne. To compare MFP and CFP, recall that CFP s typcally solved by mnmzng the obectve functon: f CFP = α * Area + β * Wrelength 1) where α and β are weghts determnng the relatve mportance of the obectves. Graphcally ths means that the constant-ftness lne wth slope m = α / β ) s shfted towards the orgn as far as possble to locate an optmal soluton, as llustrated n Fgure 1. Now consder the problem n whch the desgner wants to optmze wrelength subect to the constrant A A. max From the Pareto-optmal set n Fgure 1, soluton pont 4 can be quckly dentfed as optmal. However, the conventonal, sngle-obectve approach would requre a sweep through many m values to fnd ths soluton. A large m ensures that the optmal soluton wll satsfy the area constrant, but wll generate a poor wrelength soluton example: ponts 1,, and 3). However, a ftness lne wth low m may not satsfy the area constrant, as llustrated by ponts 5 and 6. In practce, the number of Pareto-optmal soluton ponts close to A = A may be so large that even max dynamcally updatng the weghts n dscrete steps mght not relably fnd the requred soluton. MFP nherts all dffcultes of the CFP, n the sense that t optmzes wrelength and temperature subect to the fxed-outlne constrant, but s much harder because the two optmzatons are performed smultaneously. The naïve approach to mappng out the Pareto front by varyng the weghts n Eqn. 1) s neffcent as t requres multple starts of the sngle-obectve annealer. Genetc Algorthms GA) promse better effcency n multobectve optmzaton by trackng multple solutons wth varyng ftness values, and can also employ annealng-style moves n the form of mutatons. Therefore we develop such a genetc Fgure. Possble varatons n floorplan aspect rato whle satsfyng the outlne constrant. algorthm and emprcally compare t wth a popular sngle-obectve floorplanner based on smulated annealng SA). The rest of the paper s organzed as follows, Secton covers necessary background and related work. Secton 3 ntroduces our multobectve floorplannng and fast thermal optmzaton technque for the MFP. Secton 4 dscusses emprcal valdaton, and Secton 5 concludes our work.. Background and prevous work Modern floorplannng has generated much nterest among researchers snce the year 000, and several sophstcated methods have been proposed to deal wth the manfold complextes of the MFP..1. Prevous work Prevous technques for fxed-outlne floorplannng rely on sngle-obectve optmzaton. In [], the fxedoutlne constrant was acheved by nvokng a specally desgned subroutne from tme to tme n course of floorplannng. The subroutne compared the aspect rato of the floorplan wth that of the prescrbed outlne and ntated slack-based moves to repar aspect rato dstortons. In [6] fxed-outlne floorplannng was acheved by ntroducng an aspect-rato dfference term n the ftness functon and dynamcally updatng the weghts. [, 6] assume that the aspect ratos of the outlne and the optmal floorplan would be the same. Fgure shows that the floorplan aspect rato can be sgnfcantly dfferent from outlne aspect rato and yet satsfy the fxed-outlne constrant. Ths flexblty n aspect rato can be exploted for better nterconnect optmzaton. An evolutonary technque for fxedoutlne area-packng was proposed n [7] but t does not consder nterconnect optmzaton.

3 The need for thermal-aware mcroarchtecture desgn has been establshed n [8]. The computatonal cost of embeddng a hghly accurate temperature smulator usng FEM, FDM or Green s functon method) wthn a floorplanner can be prohbtvely hgh. Thus Compact Thermal Model CTM) s used for temperature smulatons durng floorplannng. Tsa et al. [9] proposed a CTM that can be used to estmate temperature profle from a dstrbuton of power dsspatng sources on chp. Thermal floorplanners [10] and [11] use Hotspot wthn SA and GA procedures respectvely, but are very slow, especally on large crcuts, as CTM-based temperature smulaton domnates runtme. In contrast, the runtme of CFP s domnated by nterconnect evaluaton [1]. Alternatve approaches to thermal optmzaton based on power analyss, ncludng the matrx synthess approach n [13], have faled to reduce maxmum on-chp temperature. Skadron et al. [8] found very small correlaton between the total power dsspaton n a block and ts temperature. To ths end, our study reveals a hgh correlaton between the steady-state temperature at the center of a block and the gradent of power densty reducton computed at ts perphery. We thus ntroduce powerdensty aware thermal floorplannng and study ts role n reducng the maxmum on-chp temperature as well as mprovng the runtme of exstng thermal-aware floorplanners... Sequence par floorplan representaton Over the years a varety of floorplan data-structures such as Slcng Tree, Sequence Par SP), Bounded Slcng Grd, O-tree and B* tree have been proposed. Our mplementaton s based on the Sequence Par SP) [14] floorplan representaton, snce ths has been used by prevous fxed-outlne floorplanners []. In SP representaton, a par of permutaton of { 1,,..., N} s used to encode the floorplan. Dependng on the relatve order of elements n these pars, certan topologcal constrants are mposed. For example:.., B,.., B,..) &.., B,.., B,..) B s rght of B ).., B,.., B,..) &.., B,.., B,..) B s below B 3) Gven a sequence par, block locatons can be found n O n ) tme, and even faster n O nlog n)) or O nloglog n))) tme, usng more recent algorthms. However, t has been shown n [] that for n < 100, the O n ) tme algorthm by Tang et al. [15] outperforms more sophstcated algorthms. Therefore we adopted ths algorthm n our work..3. Hotspot Hotspot s a temperature smulator. The thermal model n Hotspot s based on the well-known dualty between electrc and thermal quanttes. The average power dsspaton wthn a block s modeled by a current source and the lateral heat flow from a block s modeled by thermal resstors connected to another block or the ambent. The values of resstors and capactors are calculated from the relatve postonng of the blocks, assumng typcal values for snk dmenson, conductvty etc. For steady-state analyss, the capactors are open-crcuted. The temperature at the center of each block s then computed by solvng the nodal equatons of the equvalent RC crcut. 3. Multobectve optmzaton To solve the MFP va multobectve optmzaton, we consder an obectve functon whch s a 3D vector of the form: F =< f1, f, f3 > 4) Where f1 = Φ and f = Θ are the wrelength obectve and thermal obectve respectvely. The functon f s 3 ether the outlne obectve Ω) or the area obectve Α ), dependng on the mode of operaton of the floorplanner. The followng defntons are useful n understandng the multobectve approach: DEFINITION 1: A floorplan a s sad to domnate a floorplan b also wrtten asa f b ) f and only f all elements n the obectve vector of a are greater than or equal to the correspondng elements n the obectve vector of b and at least one element n the obectve vector of a s strctly greater than the correspondng element n the obectve vector of b. Mathematcally, we saya f b ff: f a) f b) =1,, 3 {1,,3}: f a) > f b) 5) DEFINITION : A floorplan a s sad to cover a floorplan b f and only f a domnates b or ther obectve vectors are dentcal. Mathematcally, we say a covers b ff: a f b or F a) = F b) 6) DEFINITION 3: A floorplan a s called Pareto-optmal f and only f a s not domnated by any other floorplan. The set of all non-domnated floorplans consttutes the so-called Pareto-optmal set. 3

4 3.1. Genetc algorthm Our multobectve solver mplements a Genetc Algorthm GA). Fgure 3 shows the basc flowchart of the multobectve GA. In a Smple Genetc Algorthm, there s a sngle evolvng populaton. To generate the Pareto-optmal soluton set, an external non-domnated populaton has to be mantaned. At each step of the GA, non-domnated members from the evolvng populaton P are stored n the external populaton P. However, members whch are non-domnated n P may be covered or mght cover prevously stored members n P. Thus, each tme members are coped to the external populaton, the covered members have to be removed to ensure Pareto-optmalty of the external populaton. Parent selecton s done from the unon set of the external and evolvng populaton usng the Bnary Tournament Selecton scheme. Next Partally Mapped Crossover and Swap Mutaton are appled to the selected parents and a new populaton s generated. The ftness assgnment has been done accordng to the well-known Strength Pareto Evolutonary Approach SPEA) that ensures that members n the external populaton have hgher probablty of beng selected n the matng pool. The procedure for ftness assgnment n SPEA s a two-step process. At frst, each member n the external populaton s assgned a ftness value strength) gven by: n f = 7) N +1 where n denotes the number of ndvduals n P that are covered by and N s the sze of P. Once the ftness has been assgned to the members n the external populaton, ftness s assgned to each member n the evolvng populaton accordng to the followng equaton: f = 1 + 8) f, f 3.. Fxed-outlne mode For fxed-outlne floorplannng, the functon f 3 n the obectve vector s drven by the outlne-obectve Ω ) defned below: [ V V V )] f 3 = Ω = exp + 9) H VV = H chp H outlne ) U H chp H outlne ) 10) V = W W ) U W W ) 11) H chp outlne chp outlne where V V and V H are measures of the volaton of the outlne constrant n the vertcal and horzontal drectons respectvely and U x) s the step functon defned as: U x) = 1 when x > 0 and U x) = 0 when x 0. If the maxmum allowable percentage whtespace ω and outlne aspect rato ρ are provded, then the wdth and heght of the outlne can be easly computed from: W outlne + ω A 1/ = [ 1 /100) / ρ] 1) H outlne + ω A 1/ = [ 1 /100) ρ] 13) Fgure 3. Multobectve genetc algorthm. Theorem 1: Ω = 1 s a necessary and suffcent condton for satsfyng the fxed outlne constrant. Proof: Wchp W and oultne H chp H oultne W Woutlne) U W chp W ) = 0 and chp outlne H H ) U H chp H ) = 0 Ω = 1 chp outlne Random Intalzaton End? no Compute Φ, Θ, and Ω or Α for each populaton member Create external populaton and copy non-domnated members Remove covered members from external populaton Assgn ftness to members n the external populaton Selecton of the matng pool from unon set of the two populatons Crossover and Mutaton outlne Stop Note that Ω = 1 does not necesstate that the floorplan and outlne aspect ratos be dentcal. The fxed-outlne floorplanner works n two phases. In the frst phase, the external non-domnated populaton s not pruned. Durng ths phase the GA explores the soluton space unformly. In the second phase, a selectve prunng mechansm s appled on the external populaton to weed out solutons wth low Ω, whenever the sze of the external populaton ncreases a preset value ~5). yes 4

5 3.3. Outlne-free mode For outlne-free floorplannng, the functon f 3 n the obectve vector s drven by the area-obectve Α ) defned below: N f3 = Α = = A B ) A 14) 1 chp where AB ) s the area of block and A chp s the area of the chp represented by the sequence par Wrelength optmzaton The half-permeter of the boundng box of a net serves as a good approxmaton for the total wrelength n that net. The Half Permeter Wre Length HPWL) s used to defne the wrelength-obectve Φ ) as follows: Φ = x x ) + y y ) 15) [ ] η max mn max mn Where x max, ymax ) and xmn, y mn ) denote the coordnates of the top-rght and bottom-left corners of the boundng box of net. Fgure 4. Imagnary rectangular boundary surroundng a floorplan module for computng gradent of power-densty reducton Thermal obectves and optmzaton In ths secton, we ntroduce power-densty aware floorplannng for thermal optmzaton. Our ntenton s to model maxmum on-chp temperature T max ) usng a power-densty based metrc. Snce nformaton about the block power-densty s readly avalable, such an approach s computatonally effcent. To understand the relaton between power-densty and temperature, consder the equaton for steady-state temperature n a 3D substrate: T T T k + + +,, ) = 0 Q x y z 16) x y z Subect to the boundary condton: T k + h T = f x, y, z ) 17) n where T s the temperature as a functon of poston; k and ρ are thermal conductvty W/m C) and densty Kg/m 3 ) of the materal respectvely, h s the heat transfer coeffcent of the packagng components W/m C), Q s the power-densty W/m 3 ), / n represents the dfferentaton along the outward normal drawn at the boundary surface, and f s an arbtrary functon. If the power-densty Q s unformly dstrbuted across the spatal coordnates and the ntal and boundary condtons are dentcal for all ponts, then from symmetry of the dfferental terms n 16) t can concluded that the temperature dstrbuton wll also be unform. The assumpton of unform ntal and boundary condton s ustfed because any thermalaware methodology, ncludng CTMs must be Boundary and Intal Condton Independent [8]. Because power denstes are localzed and t s not possble to make any changes to the crcutry wthn a block, perfectly unform power densty or temperature dstrbuton cannot be acheved by redstrbutng the blocks. However, t s possble to dentfy modules wth hgh power densty as potental canddates for developng hotspots and surround them by whtespace or modules wth low power densty to cool down potental hotspots. In order to carry out a mathematcal analyss of the problem, let us defne the followng terms: H: Ordered set of hgh power-densty modules modules havng power denstes greater than the 80 percentle value) sorted n descendng order. λ : Set of all blocks adacent to block H W : Shared boundary-length between H and λ P : Surface power densty of block W, L : Wdth and length of module respectvely. Let us construct an magnary rectangle of length L + x and wdth W + x around block as shown n Fgure 4.The effectve power densty wthn the magnary rectangle s gven by: P eff PW L + W xp + O x ) = λ 18) W + x) L + x) The rate at whch power densty dmnshes wth x can be calculated from 18) and s gven by: P P P = x x eff = 1 P P ) W 19) W L λ 5

6 begn Input: Sequence Par, Module Dmensons, Power Densty Output: Θ 1: H vector of hgh power-densty blocks n descendng order : for all H 3: λ set of blocks adacent to, Scale 1 4: for all λ 5: Θ Θ + P P ) W / W L * Scale ) 6: Scale Scale* S End Fgure 5. Algorthm for calculatng the thermal obectve. Table 1. Correlaton coeffcents between thermal obectve Θ and maxmum and mean on-chp temperature. BENCHMARKS Θ VS TMAX Θ VS TMEAN apte xerox hp am am Runtmesec) Number of Modules CLRA+T) PQTA+W) HFPA+T) Fgure 6. Fxed-outlne W+T optmzed layouts of am49 wthω = 0. 0 and ρ = 1,,3. Fgure 7. Comparson of runtmes for A+T optmzaton usng Hotfloorplan HFP), A+T optmzaton usng COOLERCLR) and A+W optmzaton usng Parquet PQT). The dea s to determne a layout whch mnmzes the effectve power denstes around modules wth hgh power densty. Ths s equvalent to maxmzng the gradent of power-densty reducton H. In order to reduce T max, P / x for the frst element n H.e. the hghest power-densty block) must be maxmzed. Next, P / x for the second element n H s maxmzed keepng the relatve locaton of the hghest power-densty block and ts neghbours unaltered. Thus, t wll not be correct to develop a scalar thermalobectve smply by summng up P / x from dfferent blocks n H. Ths s because, the block wth second hghest power densty may have a much greater permeter, n whch case maxmzng P/ x would result n surroundng t wth blocks of low power densty. Ths wll neglect the block wth hghest power densty and hence would fal to reduce T max. To overcome ths problem, we defne the thermal obectve Θ as follows: Θ = H 1 1 P P ) W 0) S W L λ where S s the scalng factor ~10). The entre procedure s summarzed n Fgure 5. From expermental results we fnd that Θ as defned n 0) has hgh degree of correlaton wth maxmum and mean temperature across the chp. The correlaton coeffcents are gven n Table Smulaton Results All results were computed on an Intel Pentum IV laptop runnng at 1.8 GHz wth a 1GB RAM. In the absence of detals on power dsspaton for MCNC benchmarks, power denstes were randomly assgned n the range from 1mW/mm to 1W/mm. At frst we run Parquet n fxed-outlne mode on the largest MCNC benchmark am49). We also run COOLER under the same condtons and compare the HPWL for dfferent aspect ratos and percentage whtespace n Table. Block rotatons n Parquet were dsabled to make far comparson wth COOLER. It s observed that our approach mproves the average HPWL by 14.39%. Fgure 6 shows fxed outlne W+T optmzed layouts of am49 wth dfferent outlne aspect ratos. 6

7 Table. Comparson of average HPWL results over 10 ndependent runs) produced by Parquet and COOLER for fxed-outlne placements of am49 wthout block rotaton maxws ω ) HPWL mm) ρ = 1 ρ = ρ = 3 Parquet COOLER %dff Parquet COOLER %dff Parquet COOLER %dff Max. Temp. Kelvn) Percentage Deadspace CLR-APTE CLR-XEROX CLR-HP CLR-AMI33 CLR-AMI49 HFP-APTE HFP-XEROX HFP-HP HFP-AMI33 HFP-AMI49 Fgure 8. a) Thermal-aware layout of apte generated by COOLER and b) spatal dstrbuton of temperature for the same layout. Table 3. Percentage whtespace, maxmum and mean on-chp temperatures and runtme for A+T optmzaton usng Hotfloorplan MCNC Benchmarks Percentage Whtespace T max K) T mean K) Runtme sec) apte xerox hp am am For thermal-aware floorplannng, we use Hotfloorplan [10] to obtan area and temperature A+T) optmzed layouts for MCNC benchmarks. The percentage whtespace, mean and maxmum temperatures of the layouts are gven n Table 3. Next, we use Parquet for obtanng area and wrelength A+W) optmzed layouts for the same crcuts. The runtme for these two cases are compared n Fgure 7. It s found that for am33 and am49, A+T optmzaton usng Hotfloorplan s around 10,000-0,000 tmes longer than A+W optmzaton usng Parquet. Ths trend may become even more pronounced for larger crcuts. We thus conclude that temperature smulaton usng CTM can become a performance bottleneck for placng large benchmarks. Results n Table 3 show clearly a cubc growth n runtme as the number of modules ncrease. Fgure 9. Pareto-optmal solutons generated by COOLER CLR) and solutons produced by Hotfloorplan HFP) for MCNC benchmarks. It s also observed that reducton n peak temperature for am33 and am49 s accompaned by consderable ncrease n whtespace, whch may not ft desgn specfcatons. On the other hand for apte and xerox, t s possble to brng down the temperature further by relaxng the area constrant. In short, a sngle run of Hotfloorplan does not gve us a clear dea of the tradeoff surface or the Pareto-optmal solutons at our dsposal. Next we used COOLER n outlne-free mode) to generate thermal-aware layouts for all MCNC benchmarks. One such layout for apte s shown n Fgure 8a). It was found that the runtme for A+T optmzaton usng COOLER vares from 3 sec for apte to 401 sec for am49. Thus our method s around tmes faster than Hotfloorplan for MCNC benchmarks. Fgure 7 compares runtmes for COOLER and Hotfloorplan. Ths clearly demonstrates the superorty of our method over CTM-based floorplanners, especally when the number of modules s large. We use Hotspot [16] to analyze the spatal temperature dstrbuton at the block level for the layouts produced by COOLER. The temperature dstrbuton for the apte layout n Fgure 8a) s plotted n Fgure 8b). For each MCNC benchmark, COOLER produces a Pareto-optmal soluton set. T max for each 7

8 Max. Temp. Kelvn) HFP CLR ONLY AREA OPT apte xerox hp am33 am49 Fgure 10. Reducton n Tmax by COOLER CLR) and Hotfloorplan HFP) as compared to non-thermal floorplanner. layout n the Pareto-optmal set s extracted usng Hotspot and plotted n Fgure 9. The maxmum temperature and deadspace percentage correspondng to the layouts generated by Hotfloorplan are also plotted on the same fgure. It s observed that the solutons produced by Hotfloorplan le on the Pareto front generated by COOLER. We thus conclude that COOLER s as effectve n reducng T max as CTM-based temperature-aware floorplanners but runs much faster. Moreover, our method allows the desgner to explore varous desgn possbltes wthout havng to modfy the obectve functon n the source code. For example, Fgure 9 ndcates that T max n apte can be reduced from 357K to 347K by ncreasng the deadspace by 7%. In short, by usng Multobectve GA as opposed to conventonal SA t s possble to get a complete pcture of the tradeoff surface. Fgure 10 shows that COOLER and Hotfloorplan are capable of reducng T max by 15.3 C and 15.1 C on an average over smple area optmzed layouts. Fnally, COOLER was run n an outlne free mode and the Pareto-optmal soluton set for A+W+T optmzaton was generated. Fgure 11 shows the Pareto-optmal solutons for am49 benchmark n the outlne free mode. 5. Concluson In ths paper, we proposed a novel multobectve approach drven by a new outlne obectve functon for better nterconnect optmzaton n fxed-outlne context. We also presented a maxmum on-chp temperature reducton technque that mproves the runtme of exstng thermal floorplanners by several orders of magntude. Fgure 11. Non-domnated surface showng 38 Pareto-optmal soluton ponts for outlnefree A+W+T optmzed floorplannng of am References [1] A. B. Kahng, Classcal Floorplannng Harmful?, ISPD, 000, [] S. N. Adya, and I. L. Markov, Fxed Outlne Floorplannng: Enablng Herarchcal Desgn, IEEE Trans. on VLSI, 11, 6, 003, [3] /platform htm [4] A. Vassgh, O. Semenov, M. Sachdev, A. Keshavarz, and C. Hawkns, CMOS IC Technology and ts Impact on Burn-n, IEEE Trans. on devce and materals relablty, 4,, 004, [5] S. Borkar, Desgn Challenges of Technology Scalng, IEEE Mcro, Jul.-Aug. 1999, 3-9. [6] T.-C. Chen, and Y.-W. Chang, Modern Floorplannng Based on Fast Smulated Annealng, ISPD, 005. [7] C. T. Ln, D.-S. Chen, Y. W. Wang, Robust Fxed-outlne Floorplannng through Evolutonary Search, IEEE/ACM ASPDAC, 004, [8] K. Skadron, M. R. Stan, W. Huang, S. Velusamy, K. Sankaranarayanan, and D. Taran, Temperature-Aware Mcroarchtecture, 30th Intl. Symp. on Comp. Archtecture, June 003, -13. [9] C.-H. Tsa, and S.-M. Kang, Cell-Level Placement for Improvng Substrate Thermal Dstrbuton, IEEE Trans. on CAD of IC and Systems, 19,, Feb. 000, [10] K. Sankaranarayanan, S. Velusamy, M. R. Stan, and K. Skadron, A Case for Thermal-Aware Floorplannng at the Mcroarchtectural Level, Journal of Instructon-Level Parallelsm, Sept [11] W.-L. Hung, Y. Xe, N. Vaykrshnan, C. Addo-Quaye, T. Theochardes, and M. J. Irwn, Thermal Aware Floorplannng usng Genetc Algorthms, 6th ISQED, 005, [1] H. H. Chan, S. N. Adya, and I. L. Markov, Are Floorplan Representatons Important n Dgtal Desgn? Intl. Symposum on Physcal Desgn ISPD), San Francsco, Aprl 005, [13] C. N. Chu, and D. F. Wong, A Matrx Synthess Approach to Thermal Placement, IEEE Trans. on CAD of IC and Systems, 17, 11, Nov. 1998, [14] H. Murata, K. Fuyosh, S. Nakatake, and Y. Katan, VLSI Module Placement based on Rectangle-Packng by Sequence Par, IEEE Transactons on Computer Aded Desgn, 15, 1, 1996, [15] X. Tang, D. F. Wong, R. Tan, Fast Evaluaton of Sequence Par n Block Placement by Longest Common Subsequence Computaton,DATE, 000, [16] 8